JPS61206351U - - Google Patents
Info
- Publication number
- JPS61206351U JPS61206351U JP8763985U JP8763985U JPS61206351U JP S61206351 U JPS61206351 U JP S61206351U JP 8763985 U JP8763985 U JP 8763985U JP 8763985 U JP8763985 U JP 8763985U JP S61206351 U JPS61206351 U JP S61206351U
- Authority
- JP
- Japan
- Prior art keywords
- dial pulse
- circuit
- constant current
- mos transistor
- generating circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 101150068246 V-MOS gene Proteins 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000005669 field effect Effects 0.000 description 1
Description
第1図は本考案の一実施例を示す回路図、第2
図はダイヤルパルス送出時のタイミングを示すタ
イミングチヤート、第3図は定電流ダイオードの
電流―電圧特性を示す図である。
1…ダイヤルパルス発生回路、3…キーボード
、4…V―MOS電界効果トランジスタ、5…通
話回路、D1…定電流ダイオード、R2…定電流
ダイオード用負荷抵抗、L1,L2…線路端子。
Figure 1 is a circuit diagram showing one embodiment of the present invention;
The figure is a timing chart showing the timing when dial pulses are sent out, and FIG. 3 is a diagram showing the current-voltage characteristics of a constant current diode. DESCRIPTION OF SYMBOLS 1...Dial pulse generation circuit, 3...Keyboard, 4...V-MOS field effect transistor, 5...Speech circuit, D1...constant current diode, R2...load resistor for constant current diode, L1, L2...line terminal.
Claims (1)
イヤルパルス発生回路のキー入力に応じたダイヤ
ルパルス出力によつてループを断続するダイヤル
パルス送出回路において、前記定電流素子および
ダイヤルパルス発生回路と並列に接続されたV―
MOSトランジスタと、ダイヤルパルス発生回路
と並列に接続された定電流回路用負荷抵抗とを備
え、ダイヤルパルス発生回路のダイヤルパルス出
力によつて前記V―MOSトランジスタを直接オ
ン・オフするようにしたことを特徴とするダイヤ
ルパルス送出回路。 In a dial pulse sending circuit which intermittents a loop by dial pulse output in response to a key input of a dial pulse generating circuit to which a loop current is supplied via a constant current circuit, a dial pulse generating circuit is provided in parallel with the constant current element and the dial pulse generating circuit. Connected V-
The V-MOS transistor is equipped with a MOS transistor and a load resistor for a constant current circuit connected in parallel with a dial pulse generation circuit, and the V-MOS transistor is directly turned on and off by the dial pulse output of the dial pulse generation circuit. A dial pulse sending circuit featuring:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8763985U JPH0241973Y2 (en) | 1985-06-12 | 1985-06-12 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8763985U JPH0241973Y2 (en) | 1985-06-12 | 1985-06-12 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS61206351U true JPS61206351U (en) | 1986-12-26 |
JPH0241973Y2 JPH0241973Y2 (en) | 1990-11-08 |
Family
ID=30640046
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8763985U Expired JPH0241973Y2 (en) | 1985-06-12 | 1985-06-12 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0241973Y2 (en) |
-
1985
- 1985-06-12 JP JP8763985U patent/JPH0241973Y2/ja not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPH0241973Y2 (en) | 1990-11-08 |
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