JPS61205194U - - Google Patents
Info
- Publication number
- JPS61205194U JPS61205194U JP8976885U JP8976885U JPS61205194U JP S61205194 U JPS61205194 U JP S61205194U JP 8976885 U JP8976885 U JP 8976885U JP 8976885 U JP8976885 U JP 8976885U JP S61205194 U JPS61205194 U JP S61205194U
- Authority
- JP
- Japan
- Prior art keywords
- connector
- motherboard
- cable
- boards
- sub
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 1
Description
第１図は本考案の原理斜視図、第２図は本考案
により一実施例を示す説明図で、ａは斜視図、ｂ
は側面図、第３図は本考案による他の実施例の斜
視図、第４図は従来の説明図で、ａは斜視図、ｂ
は側面図を示す。
図において、１はマザーボード、２はサブボー
ド、３は電子部品、４は第１のコネクタ、５は第
２のコネクタ、６は第３のコネクタ、７は第１の
ケーブル、８は第２のケーブルを示す。
Fig. 1 is a perspective view of the principle of the present invention, Fig. 2 is an explanatory diagram showing an embodiment of the invention, a is a perspective view, b
3 is a side view, FIG. 3 is a perspective view of another embodiment of the present invention, and FIG. 4 is a conventional explanatory view, a is a perspective view, and b is a perspective view.
shows a side view. In the figure, 1 is the motherboard, 2 is the subboard, 3 is the electronic component, 4 is the first connector, 5 is the second connector, 6 is the third connector, 7 is the first cable, and 8 is the second connector. Cable shown.
Claims (1)
、 該サブボード２が第１のコネクタ４を介して接
続されるよう係止されたマザーボード１と、 該マザーボード１に固着された第２のコネクタ
５と、 該第２のコネクタ５に接続される第１のケーブ
ル７とを備えた実装構造であつて、 前記マザーボード１の外形より前記サブボード
２を突出させて突出部２Ａを形成すると共に、 該突出部２Ａには前記第１のコネクタ４に併設
して、第２のケーブル８が接続される第３のコネ
クタ６が設けられて成ることを特徴とする実装構
造。[Claims for Utility Model Registration] A plurality of sub-boards 2 on which electronic components 3 are mounted; a motherboard 1 to which the sub-boards 2 are connected via a first connector 4; and a motherboard 1. A mounting structure comprising a second connector 5 fixed to the motherboard 5 and a first cable 7 connected to the second connector 5, the subboard 2 protruding from the outer shape of the motherboard 1. A mounting characterized in that a protruding portion 2A is formed, and a third connector 6 to which a second cable 8 is connected is provided on the protruding portion 2A in parallel to the first connector 4. structure.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8976885U JPS61205194U (en) | 1985-06-14 | 1985-06-14 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8976885U JPS61205194U (en) | 1985-06-14 | 1985-06-14 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61205194U true JPS61205194U (en) | 1986-12-24 |
Family
ID=30644158
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8976885U Pending JPS61205194U (en) | 1985-06-14 | 1985-06-14 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61205194U (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06181372A (en) * | 1992-12-15 | 1994-06-28 | Mitsubishi Electric Corp | Printed-substrate mounting method |
| WO2010010625A1 (en) * | 2008-07-25 | 2010-01-28 | 富士通株式会社 | Electronic device and substrate unit |
| JP2010027705A (en) * | 2008-07-16 | 2010-02-04 | Alaxala Networks Corp | Electronic device |
| JP2011146470A (en) * | 2010-01-13 | 2011-07-28 | Alaxala Networks Corp | Electronic device |
| JP2012138642A (en) * | 2012-04-23 | 2012-07-19 | Fujitsu Ltd | Electronic apparatus and substrate unit |
-
1985
- 1985-06-14 JP JP8976885U patent/JPS61205194U/ja active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06181372A (en) * | 1992-12-15 | 1994-06-28 | Mitsubishi Electric Corp | Printed-substrate mounting method |
| JP2010027705A (en) * | 2008-07-16 | 2010-02-04 | Alaxala Networks Corp | Electronic device |
| WO2010010625A1 (en) * | 2008-07-25 | 2010-01-28 | 富士通株式会社 | Electronic device and substrate unit |
| JPWO2010010625A1 (en) * | 2008-07-25 | 2012-01-05 | 富士通株式会社 | Electronic device and substrate unit |
| JP2011146470A (en) * | 2010-01-13 | 2011-07-28 | Alaxala Networks Corp | Electronic device |
| JP2012138642A (en) * | 2012-04-23 | 2012-07-19 | Fujitsu Ltd | Electronic apparatus and substrate unit |
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