JPS61204920A - Forming of laminate ceramic element - Google Patents

Forming of laminate ceramic element

Info

Publication number
JPS61204920A
JPS61204920A JP60044917A JP4491785A JPS61204920A JP S61204920 A JPS61204920 A JP S61204920A JP 60044917 A JP60044917 A JP 60044917A JP 4491785 A JP4491785 A JP 4491785A JP S61204920 A JPS61204920 A JP S61204920A
Authority
JP
Japan
Prior art keywords
ceramic
sheet
conductive pattern
printed
organic binder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60044917A
Other languages
Japanese (ja)
Inventor
隆 井口
冨田 朝巳
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP60044917A priority Critical patent/JPS61204920A/en
Publication of JPS61204920A publication Critical patent/JPS61204920A/en
Pending legal-status Critical Current

Links

Landscapes

  • Ceramic Capacitors (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、−設電子機器に使用される積層セラミック回
路基板、積層セラミックコンデンサ、圧着セラミック振
動子等の電子部品の製造法に関し。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method for manufacturing electronic components such as multilayer ceramic circuit boards, multilayer ceramic capacitors, and press-bonded ceramic vibrators used in electronic equipment.

さらに具体的に述べれば、積層セラミック素子の成形方
法に関するものである。
More specifically, the present invention relates to a method for molding a laminated ceramic element.

(従来の技術) 従来の技術として、例えば特公昭38−14623号の
発明があるが、しかしこの方法では寸法精度の維持が難
しいため、特公昭40−19975号の発明が提案され
た。しかしこの方法にも自動化が難かしく量産性に問題
があった。さらに、この対策として特公昭59−456
31号の発明により自動化に適応する方法が提案されて
いる。
(Prior Art) As a conventional technique, for example, there is an invention disclosed in Japanese Patent Publication No. 38-14623, but since it is difficult to maintain dimensional accuracy with this method, the invention disclosed in Japanese Patent Publication No. 40-19975 was proposed. However, this method was also difficult to automate and had problems with mass production. Furthermore, as a countermeasure for this issue,
The invention of No. 31 proposes a method adapted to automation.

(発明が解決しようとする問題点) しかしながら、従来の方法では、積層数が多くなるとセ
ラミック生シートに印刷される導電パターンの厚さが累
積して大きな数値となり、加圧接着時に導電パターンの
厚さの累積分を全部吸収することができず、焼成したと
きに亀裂が生じたり。
(Problem to be solved by the invention) However, in the conventional method, as the number of laminated layers increases, the thickness of the conductive pattern printed on the raw ceramic sheet accumulates to a large value, and the thickness of the conductive pattern when bonded under pressure increases. It is not possible to absorb all the accumulated amount of heat, and cracks occur when fired.

あるいは部品の半田付けを行ったときに熱衝撃によって
ひび割れが入るという問題点があった。
Another problem is that when parts are soldered, cracks may occur due to thermal shock.

本発明は上記の問題点を解決するもので、亀裂やひび割
れの発生がない積層セラミック素子を提供しようとする
ものである。
The present invention is intended to solve the above-mentioned problems and to provide a multilayer ceramic element that is free from cracks and crazing.

(問題点を解決するための手段) セラミック生シートに導電パターンが印刷された部分と
、印刷されない生シートのままの部分とを同一の厚さに
する方法として、加熱、加圧して導電体をセラミック生
シートの中に埋設させる方法と、導電体を印刷したキャ
リアシー1〜上にセラミック生シートを形成した後、導
電体とともに剥離する方法とがある。しかし、前者では
厚さが減少すると同時に圧延されて導電パターンの面積
が変化する欠点があり、後者ではキャリアシー1−から
剥離を容易にするためキャリアシート上1こ離形剤を塗
布する必要があり、そのため導電パターンを印刷すると
きに印刷斑が生ずる欠点があった。
(Means for solving the problem) As a method to make the part of the raw ceramic sheet with the conductive pattern printed on it and the part of the raw sheet without printing to the same thickness, the conductor is heated and pressurized. There is a method of embedding it in a green ceramic sheet, and a method of forming a green ceramic sheet on a carrier sheet 1 to which a conductor is printed and then peeling it off together with the conductor. However, the former has the disadvantage that the area of the conductive pattern changes as it is rolled at the same time as the thickness decreases, and the latter requires a release agent to be applied on the carrier sheet to facilitate peeling from the carrier sheet. Therefore, there was a drawback that printing spots occurred when printing a conductive pattern.

本発明は、セラミック生シートを形成した後。After the present invention forms a ceramic raw sheet.

導電パターンとともに導電パターンの周辺にセラミック
ペーストを印刷することにより、厚みの均一なセラミッ
ク生シー1−を得ようとするものである。
By printing a ceramic paste along with a conductive pattern around the conductive pattern, it is attempted to obtain a ceramic green sheet 1- with a uniform thickness.

(作 用) このように、セラミック生シートに導電パターンを印刷
し、さらに導電パターンの印刷されない部分にセラミッ
クペ・−ス1−を印刷して厚さを均一化した生シートは
、これを多数積層して加圧接着しても、歪が発生せず、
従って焼成したときに歪が原因の亀裂の発生を防止する
ことができる。また、半田付は時の熱衝撃によるひび割
れの発生も防止できる。
(Function) In this way, a raw ceramic sheet with a uniform thickness by printing a conductive pattern on the raw ceramic sheet and printing ceramic paste 1 on the part where the conductive pattern is not printed can be produced by printing a large number of raw sheets. No distortion occurs even when laminated and bonded under pressure.
Therefore, it is possible to prevent the occurrence of cracks caused by strain during firing. Additionally, soldering can prevent cracks from occurring due to thermal shock.

(実施例) 本発明による積層セラミック素子の成形方法について第
1図ないし第3図により説明する。
(Example) A method for molding a multilayer ceramic element according to the present invention will be explained with reference to FIGS. 1 to 3.

第1図および第2図は、それぞれ本発明によるセラミッ
ク生シー[・の平面図およびA−A’で切断した断面図
である。
FIG. 1 and FIG. 2 are a plan view and a cross-sectional view taken along line AA' of a ceramic green seam according to the present invention, respectively.

セラミック生シート1の表面に導電パターン2を印刷し
、さらにこの導電パターン2の周辺にセラミックペース
1〜3を印刷する。
A conductive pattern 2 is printed on the surface of a raw ceramic sheet 1, and ceramic pastes 1 to 3 are further printed around the conductive pattern 2.

第3図は印刷の終了した上記のセラミック生シートを一
枚毎に左右が逆になるように積み重ねたもので、加圧接
着の後、破線に沿って切断することにより、複数個の積
層体が得ら九る。
Figure 3 shows the printed ceramic green sheets stacked one on top of the other with the left and right sides reversed. After pressure bonding, the sheets are cut along the broken lines to form a plurality of laminates. is obtained.

(発明の効果) 本発明によれば、印刷された導電パターンの厚さと同じ
厚さで、セラミックペーストが印刷されているため、セ
ラミック生シートを含め全面が同一の厚さとなり、積層
後加圧接着するときに歪が生ぜず、焼成時の亀裂や半田
付は時のひび割れの発生が皆無となり、製品の歩留りと
信頼性を向上する著しい効果がある。
(Effects of the Invention) According to the present invention, since the ceramic paste is printed with the same thickness as the printed conductive pattern, the entire surface including the raw ceramic sheet has the same thickness, and the pressure is applied after lamination. There is no distortion during bonding, no cracking during firing, and no cracking during soldering, which has the remarkable effect of improving product yield and reliability.

【図面の簡単な説明】[Brief explanation of drawings]

第1、図および第2図は本発明により印刷されたセラミ
ック生シー1−の平面図および断面図、第3図は上記の
セラミック生シートを積み重ねた状態を示す断面図であ
る。 〕 ・・・セラミック生シー1−12 ・・・導電体、
3 ・・・セラミックペースト。 特許出願人 松下電器産業株式会社 第1図
1, 2, and 2 are a plan view and a cross-sectional view of a green ceramic sheet 1- printed according to the present invention, and FIG. 3 is a cross-sectional view showing the state in which the ceramic green sheets described above are stacked. ] ... Ceramic raw sea 1-12 ... Conductor,
3...Ceramic paste. Patent applicant Matsushita Electric Industrial Co., Ltd. Figure 1

Claims (1)

【特許請求の範囲】[Claims] 焼成によりセラミックとなるセラミック粉末と、有機粘
結剤および必要により可塑剤と、溶媒とを混合し、これ
を混練したものをキャリアシート上に所定幅となるよう
連続的に形成してセラミック生シートを生成した後、高
融点金属粉末を有機粘結剤からなる導電ペーストで上記
のセラミック生シート上に所定の導電パターンを印刷し
、さらに上記セラミック生シートに用いたセラミック粉
末と有機粘結剤からなるセラミックペーストで上記の導
電パターンの印刷してない部分に印刷し、この印刷され
たセラミック生シートを複数枚積層し圧着してなる積層
セラミック素子の成形方法。
Ceramic powder, which becomes ceramic when fired, is mixed with an organic binder, a plasticizer if necessary, and a solvent, and the mixture is kneaded and continuously formed into a predetermined width on a carrier sheet to produce a raw ceramic sheet. After that, a predetermined conductive pattern is printed on the above green ceramic sheet using a conductive paste consisting of a high melting point metal powder and an organic binder, and then a predetermined conductive pattern is printed on the above ceramic green sheet using a conductive paste consisting of a high melting point metal powder and an organic binder. A method of forming a laminated ceramic element by printing a ceramic paste on the unprinted part of the conductive pattern, and laminating and pressing a plurality of printed ceramic green sheets.
JP60044917A 1985-03-08 1985-03-08 Forming of laminate ceramic element Pending JPS61204920A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60044917A JPS61204920A (en) 1985-03-08 1985-03-08 Forming of laminate ceramic element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60044917A JPS61204920A (en) 1985-03-08 1985-03-08 Forming of laminate ceramic element

Publications (1)

Publication Number Publication Date
JPS61204920A true JPS61204920A (en) 1986-09-11

Family

ID=12704813

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60044917A Pending JPS61204920A (en) 1985-03-08 1985-03-08 Forming of laminate ceramic element

Country Status (1)

Country Link
JP (1) JPS61204920A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01208824A (en) * 1988-02-16 1989-08-22 Murata Mfg Co Ltd Manufacture of laminated ceramic electronic part
JPH04219914A (en) * 1990-12-20 1992-08-11 Taiyo Yuden Co Ltd Manufacture of laminated porcelain capacitor
JP2006210813A (en) * 2005-01-31 2006-08-10 Tdk Corp Process for manufacturing multilayer electronic component

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5342353A (en) * 1976-09-29 1978-04-17 Nippon Electric Co Laminated ceramic capacitor
JPS5928304A (en) * 1982-08-10 1984-02-15 Toko Inc Manufacture of inductance element

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5342353A (en) * 1976-09-29 1978-04-17 Nippon Electric Co Laminated ceramic capacitor
JPS5928304A (en) * 1982-08-10 1984-02-15 Toko Inc Manufacture of inductance element

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01208824A (en) * 1988-02-16 1989-08-22 Murata Mfg Co Ltd Manufacture of laminated ceramic electronic part
JPH04219914A (en) * 1990-12-20 1992-08-11 Taiyo Yuden Co Ltd Manufacture of laminated porcelain capacitor
JP2006210813A (en) * 2005-01-31 2006-08-10 Tdk Corp Process for manufacturing multilayer electronic component

Similar Documents

Publication Publication Date Title
US6189200B1 (en) Method for producing multi-layered chip inductor
US8105453B2 (en) Method for producing multilayer ceramic substrate
US5601672A (en) Method for making ceramic substrates from thin and thick ceramic greensheets
JP2003282356A (en) Capacitor array
JPS61204920A (en) Forming of laminate ceramic element
JP2946261B2 (en) Manufacturing method of laminated electronic components
JPH06283375A (en) Manufacture of layered electronic components
JP3064751B2 (en) Method for manufacturing multilayer jumper chip
JPH10112417A (en) Laminated electronic component and its manufacture
JP2002270459A (en) Manufacturing method for laminated ceramic electronic component
JP3102603B2 (en) Method and apparatus for laminating and pressing ceramic green sheets
JP4329253B2 (en) Manufacturing method of ceramic multilayer substrate for flip chip
JPS59100510A (en) Method of producing laminated ceramic condenser
JP2749685B2 (en) Circuit board manufacturing method
JPH04298915A (en) Manufacture of ceramic laminated body
JPH11340082A (en) Multilayer chip component and its manufacture
JP2515165B2 (en) Method for manufacturing multilayer wiring board
JP2551064B2 (en) Manufacturing method of ceramic multilayer substrate
JPH05175064A (en) Manufacture of laminated electronic component
JPS58131727A (en) Method of producing laminated porcelain capacitor
JPS59225507A (en) Laminated porcelain capacitor
JP3266986B2 (en) Manufacturing method of ceramic multilayer substrate
JP2003282357A (en) Capacitor array
JPH0412018B2 (en)
JP2003224034A (en) Multiple capacitor