JPS5928304A - Manufacture of inductance element - Google Patents

Manufacture of inductance element

Info

Publication number
JPS5928304A
JPS5928304A JP13892982A JP13892982A JPS5928304A JP S5928304 A JPS5928304 A JP S5928304A JP 13892982 A JP13892982 A JP 13892982A JP 13892982 A JP13892982 A JP 13892982A JP S5928304 A JPS5928304 A JP S5928304A
Authority
JP
Japan
Prior art keywords
ferrite
conductive layer
printed
layer
mask
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13892982A
Other languages
Japanese (ja)
Inventor
Mitsuo Sakakura
坂倉 光男
Seiichi Kobayashi
清一 小林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toko Inc
Original Assignee
Toko Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toko Inc filed Critical Toko Inc
Priority to JP13892982A priority Critical patent/JPS5928304A/en
Publication of JPS5928304A publication Critical patent/JPS5928304A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00Fixed inductances of the signal type 
    • H01F17/04Fixed inductances of the signal type  with magnetic core

Abstract

PURPOSE:To obtain the small-sized inductance element of high Q by forming a conductive layer in sufficient thickness and reducing resistance. CONSTITUTION:Ferrite 24 is printed on a ferrite layer 21 by using a mask 22 except the section where a conductive layer is formed. The conductive layer 23 is printed by using a mask 25. The mask 25 is formed in a pattern reverse to the mask 22. Conductive paste is printed to the section surrounded by the ferrite 24 and the upper section of said section. The conductive layer is formed, and ferrite 26 is printed on the conductive layer 25 and the ferrite 24. The process is repeated in succession, these layer and ferrite are laminated until the number of the conductive layers wound reaches a fixed number, and the whole is baked. Since the conductive layers are printed thickly at that time, sufficient thickness is kept even when they are shrunk through sintering. According to the manufacture, the thickness of the electrode of the element can be taken in a sufficiently large value. Consequently, the resistance of the electrode can be reduced, and high Q can be obtained.

Description

【発明の詳細な説明】 本発明は、インダクタンス素子の製造方法に係るもので
、特に磁性体と導体を印刷積層して焼成するインダクタ
ンス素子の製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing an inductance element, and more particularly to a method for manufacturing an inductance element in which a magnetic material and a conductor are laminated by printing and then fired.

インダクタンス素子は、導電性線材をコイル状に巻回し
、更にフェライトコアのような磁心を併せて用いてイン
ダクタンスを上げるものが古くから用いられている。し
かし、電子回路の小形化に伴って電子部品の小形化が要
請されており、他の回路素子に比較して、インダクタン
ス素子は小形   :化に適応したものの開発が遅れて
いる。
BACKGROUND ART Inductance elements have been used for a long time to increase inductance by winding a conductive wire into a coil and using a magnetic core such as a ferrite core. However, with the miniaturization of electronic circuits, there is a demand for miniaturization of electronic components, and compared to other circuit elements, inductance elements are adapted to miniaturization, but their development has been delayed.

インダクタンス素子の小形化の方向は二種類に分けられ
、一方は従来のものの基本的な構造は変えずに寸法を小
さくした巻線タイプであり、もう一方は印刷により形成
するタイプである。後者の中でも、導体層と磁性体層を
順次印刷・積層して磁性体中に周回する導電パターンを
形成する構造のインダクタンス素子が注目を浴びている
。本発明は、このような印刷・積層するタイプのインダ
クタンス素子の製造方法に関する。
The direction of miniaturization of inductance elements can be divided into two types: one is a wire-wound type, which has a smaller size without changing the basic structure of the conventional one, and the other type is a type formed by printing. Among the latter, inductance elements that have a structure in which a conductive layer and a magnetic layer are sequentially printed and laminated to form a conductive pattern circulating in a magnetic material are attracting attention. The present invention relates to a method of manufacturing such a printing/laminating type inductance element.

上記の印刷・積層するタイプのインダクタンス素子とそ
の製造方法については、特開昭55−56954号公報
などに記載されている。これを簡単に言えば、絶縁層上
コイル形成用金属パターンを導電性ペーストによって印
刷し、その一端を残して絶縁層で覆い、またコイル形成
用金属パターンを導電性ペーストによって印刷して周回
する導電パターンを形成して行く。絶縁層を磁性体で形
成すればインダクタンスを上げることができ、焼成法に
よって製造することも容易である。本発明は、焼成法に
よるインダクタンス素子の製造方法に関する。
The above printed/laminated type inductance element and its manufacturing method are described in JP-A-55-56954 and other publications. To put it simply, a metal pattern for forming a coil is printed on an insulating layer using a conductive paste, one end of which is covered with an insulating layer, and a metal pattern for forming a coil is printed using a conductive paste and a conductive layer is printed around it using a conductive paste. Form a pattern. If the insulating layer is made of a magnetic material, the inductance can be increased, and it can be easily manufactured by a firing method. The present invention relates to a method for manufacturing an inductance element using a firing method.

一般に磁性体として粒径約1μに粉砕したN1・n 鈎系フエライ°ト仮焼粉末、フェライト粉末、導電層と
して粒径約1μの銀粉末およびバラディラム粉末を用い
てそれぞれバインダー(P、 V、 B)と溶剤を加え
て11次所定のパターンに所定の厚みで印刷した後に焼
成する。すなわち、第1図に示したように、フェライト
11の層上にiスフ12を用いて導1!層1′5を形成
する(A)。次に、フェライト11と導電層13を覆う
フェライト14を形成しくB)、順次この工程を繰返し
て導電層のパターンと磁性体層のパターンを積層してい
る。
Generally, N1-n hook-type ferrite calcined powder and ferrite powder pulverized to a particle size of about 1μ as the magnetic material, and silver powder and varadilum powder with a particle size of about 1μ as the conductive layer are used as binders (P, V, B, respectively). ) and a solvent are added, the 11th pattern is printed at a predetermined thickness, and then baked. In other words, as shown in FIG. Form layer 1'5 (A). Next, a ferrite 14 is formed to cover the ferrite 11 and the conductive layer 13 (B), and this process is sequentially repeated to stack the conductive layer pattern and the magnetic layer pattern.

しかし、上記のようにして積層した仮に焼成してをられ
るインダクタンス素子においては十分なQが得られない
という問題が生じている。これは導電層によるコイルパ
ターンの抵抗が大キいためで、この抵抗の大きくなる原
因は、導電層の厚みが十分に得られないことが原因とな
っている。すなわち、焼成前に30μmの厚みで印刷し
ても、焼成後には15μm程度にまで厚みが減少してお
り、これによって抵抗の増大がもたらされているもので
あった。
However, a problem arises in that a sufficient Q cannot be obtained in the inductance element which is laminated as described above and is then fired. This is because the resistance of the coil pattern due to the conductive layer is large, and the reason for this increase in resistance is that the conductive layer is not sufficiently thick. That is, even if printed with a thickness of 30 μm before firing, the thickness decreased to about 15 μm after firing, resulting in an increase in resistance.

本発明は、上記の問題を解決して、導電層を十分な厚み
で形成し1、抵抗を小さくすることによってQを増大さ
せることを目的とするものである。
The present invention aims to solve the above problems and increase Q by forming a conductive layer with sufficient thickness 1 and reducing resistance.

それによって、小形でしかも高いQのインダクタンス素
子を得ることを目的とする。
Thereby, the object is to obtain a small inductance element with high Q.

本発明によるインダクタンス素子のaa方法においては
、導電層の厚みを予め厚く形成しておいて、焼成後にお
いて必要な厚みが得られるようにするものであり、その
ために、導電層を厚く印刷できるようにしたものである
In the aa method of an inductance element according to the present invention, the thickness of the conductive layer is formed thick in advance so that the required thickness can be obtained after firing. This is what I did.

以下、第2図に従って、本発明の実施例につき説明する
。フェライト層と導illを順次積層する本のであるが
、それらの組成は前記の例と同様である。
Embodiments of the present invention will be described below with reference to FIG. This is a book in which a ferrite layer and a conductive layer are sequentially laminated, but their compositions are the same as in the previous example.

7工ライト層21上に、導電層を形成する部分を除いて
フェライト24をマスク22を用いて印刷する(A)。
7. Ferrite 24 is printed on the light layer 21 using a mask 22 except for the portion where the conductive layer is to be formed (A).

このフェライト24の厚みは通常の印刷によって形成で
きる厚みで、50μm程度となる。
The thickness of this ferrite 24 is about 50 μm, which can be formed by normal printing.

次に、マスク2.5を°゛用いて導電層23全印刷すル
(B)。このマスタ25は導電層のパターンに従って形
成されているもので、前記のフェライト24の形成用の
マスク22とは逆のパターンとなっている。導電性ペー
ストは、フェライト24に囲まれた部分とその上に印刷
される。したがって、フェライト24によって囲まれた
溝の部分に収まるので、通常の印刷によってフェライト
240表面と導電層230表面が同じ高さとなり、更に
続けて導電層を印刷して、通常の2倍程度の厚み、すな
わち、60μm程度の厚みに形成することができる。
Next, the entire conductive layer 23 is printed using mask 2.5 (B). This master 25 is formed according to the pattern of the conductive layer, and has a pattern opposite to that of the mask 22 for forming the ferrite 24 described above. The conductive paste is printed on and in the area surrounded by the ferrite 24. Therefore, since it fits in the groove surrounded by the ferrite 24, the surface of the ferrite 240 and the surface of the conductive layer 230 are at the same height by normal printing, and then the conductive layer is printed to a thickness that is about twice the normal thickness. That is, it can be formed to a thickness of about 60 μm.

導電層25を形成した後に、この導電層25とフェライ
ト24の上に更にフェライト26全印刷する(0)。
After forming the conductive layer 25, the entire ferrite 26 is further printed on the conductive layer 25 and the ferrite 24 (0).

このような工程を順次繰返して、導電層の巻き数が所定
の数になるまで積層し、その後に焼成する。この場合、
60μm程度の厚みに導電層が印刷されているので、焼
結によって収縮しても、50μm以上の厚みは保たれる
These steps are sequentially repeated until the number of turns of the conductive layer reaches a predetermined number, and then the conductive layer is fired. in this case,
Since the conductive layer is printed to a thickness of about 60 μm, even if it shrinks due to sintering, the thickness of 50 μm or more is maintained.

本発明によれば、積層形のインダクタンス素子の電極の
厚みを十分に大きくとることができる。
According to the present invention, the thickness of the electrode of the laminated inductance element can be made sufficiently large.

したがって、電極の抵抗を減少させることができるので
、従来の小形のインダクタンス六子忙おけるQの問題を
改善することができる。
Therefore, since the resistance of the electrode can be reduced, the problem of Q in the conventional small inductance inductor can be improved.

また、導電層の印刷にあたって、フェライトによって形
成された溝を利用しでいるので、厚くなった場合でも形
状が崩れたりすることもなく、信頼性の高い歩留の良好
なインダクタンス素子が得られる。
Furthermore, since the grooves formed by ferrite are used when printing the conductive layer, the shape does not collapse even when the conductive layer becomes thick, and an inductance element with high reliability and good yield can be obtained.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のインダクタンス素子の製造方法を示す正
面断面図、第2図は本発明の爽施例を示す正面断面図で
ある。 11、14.21.24.26・・・・・・フエライト
12、22.25 ・・・用マスク 15.23・・・用導電層 特許出願人 東光株式会社 第 1 図       第 2 図 1
FIG. 1 is a front sectional view showing a conventional method for manufacturing an inductance element, and FIG. 2 is a front sectional view showing a new embodiment of the present invention. 11, 14.21.24.26... Ferrite 12, 22.25... Mask 15.23... Patent applicant Toko Co., Ltd. Fig. 1 Fig. 2 Fig. 1

Claims (1)

【特許請求の範囲】[Claims] 磁性体層と導体層が印刷方式により交互に積層され、磁
性体内に1周回するコイルパターンを形成して焼成する
4インダクタンス素子の製造方法において、導体層を形
成する領域以外の部分に所定の厚さで第1の磁性体層を
形成し、導体層を該第−の磁性体層よシ厚くなるように
形成し、該導体層を覆うように第二の磁性体層を形成し
てこれらを順次積層して形成することを特徴とするイン
ダクタンス素子の製造方法。
In a method for manufacturing a 4-inductance element in which magnetic layers and conductor layers are alternately laminated by a printing method to form a coil pattern that goes around once inside the magnetic body and then fired, a predetermined thickness is formed in the area other than the area where the conductor layer is formed. Then, a first magnetic layer is formed, a conductor layer is formed to be thicker than the second magnetic layer, and a second magnetic layer is formed to cover the conductor layer. A method of manufacturing an inductance element, characterized in that it is formed by sequentially laminating layers.
JP13892982A 1982-08-10 1982-08-10 Manufacture of inductance element Pending JPS5928304A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13892982A JPS5928304A (en) 1982-08-10 1982-08-10 Manufacture of inductance element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13892982A JPS5928304A (en) 1982-08-10 1982-08-10 Manufacture of inductance element

Publications (1)

Publication Number Publication Date
JPS5928304A true JPS5928304A (en) 1984-02-15

Family

ID=15233435

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13892982A Pending JPS5928304A (en) 1982-08-10 1982-08-10 Manufacture of inductance element

Country Status (1)

Country Link
JP (1) JPS5928304A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61204920A (en) * 1985-03-08 1986-09-11 松下電器産業株式会社 Forming of laminate ceramic element
JPS63300593A (en) * 1987-05-29 1988-12-07 Nec Corp Ceramic composite substrate
JPS6424408A (en) * 1987-07-20 1989-01-26 Toko Inc Manufacture of laminated inductor
JPS6424409A (en) * 1987-07-20 1989-01-26 Toko Inc Manufacture of laminated inductor
JPH02312214A (en) * 1989-05-26 1990-12-27 Toko Inc Manufacture of laminated inductor
US6931877B2 (en) 2002-05-22 2005-08-23 Sanden Corp. Refrigerating open showcase

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61204920A (en) * 1985-03-08 1986-09-11 松下電器産業株式会社 Forming of laminate ceramic element
JPS63300593A (en) * 1987-05-29 1988-12-07 Nec Corp Ceramic composite substrate
JPS6424408A (en) * 1987-07-20 1989-01-26 Toko Inc Manufacture of laminated inductor
JPS6424409A (en) * 1987-07-20 1989-01-26 Toko Inc Manufacture of laminated inductor
JPH0524644B2 (en) * 1987-07-20 1993-04-08 Toko Inc
JPH0524643B2 (en) * 1987-07-20 1993-04-08 Toko Inc
JPH02312214A (en) * 1989-05-26 1990-12-27 Toko Inc Manufacture of laminated inductor
JPH0572088B2 (en) * 1989-05-26 1993-10-08 Toko Inc
US6931877B2 (en) 2002-05-22 2005-08-23 Sanden Corp. Refrigerating open showcase

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