JPS6224923B2 - - Google Patents
Info
- Publication number
- JPS6224923B2 JPS6224923B2 JP56074193A JP7419381A JPS6224923B2 JP S6224923 B2 JPS6224923 B2 JP S6224923B2 JP 56074193 A JP56074193 A JP 56074193A JP 7419381 A JP7419381 A JP 7419381A JP S6224923 B2 JPS6224923 B2 JP S6224923B2
- Authority
- JP
- Japan
- Prior art keywords
- conductor
- inductor
- magnetic material
- printed
- composite laminated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004020 conductor Substances 0.000 claims description 17
- 239000002131 composite material Substances 0.000 claims description 11
- 239000000696 magnetic material Substances 0.000 claims description 4
- 238000000034 method Methods 0.000 description 5
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 238000010304 firing Methods 0.000 description 2
- 238000003475 lamination Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229910052763 palladium Inorganic materials 0.000 description 2
- 239000000843 powder Substances 0.000 description 2
- 239000011230 binding agent Substances 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 239000006247 magnetic powder Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 229920002037 poly(vinyl butyral) polymer Polymers 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 229910000859 α-Fe Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F17/00—Fixed inductances of the signal type
- H01F17/0006—Printed inductances
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
- Coils Or Transformers For Communication (AREA)
Description
【発明の詳細な説明】 本発明は複合積層インダクタの構造に関する。[Detailed description of the invention] The present invention relates to the structure of a composite laminated inductor.
従来、複数のインダクタを用いて回路を構成す
るには別々に製作されたインダクタを他の回路部
品と組合せ、プリント基板等へ取付け、インダク
タと他の回路部品とを適宜に配線接続する必要が
あつた。従つて、インダクタの取付けが面倒で複
雑な組立工程を必要とし、さらに組立てられた回
路装置の小形化にも限界があつた。 Conventionally, in order to configure a circuit using multiple inductors, it was necessary to combine the separately manufactured inductors with other circuit components, attach them to a printed circuit board, etc., and connect the inductors and other circuit components as appropriate. Ta. Therefore, the installation of the inductor is troublesome and requires a complicated assembly process, and furthermore, there is a limit to the miniaturization of the assembled circuit device.
従つて、本発明の目的は単一の部品として構成
されてはいるが複数のインダクタとして動作する
複合積層チツプインダクタを提供することを目的
とする。本発明の複合積層チツプインダクタは、
磁性フエライト等の電気絶縁性の磁性粉末を適宜
のバインダー（ブチラール樹脂等）と混練してペ
ースト化したものから印刷するなり延ばすなりし
て磁性層を形成し、その上に別々の複数のコイル
形成用の導体パターンを金属粉末（Ag―Pd、Pd
等）のペーストから印刷して形成し、その上に磁
性層を印刷し、さらに、下側の導体パターンに接
続する複数の別々のコイル形成用導体パターンを
印刷し、以下所定の積層数が得られるまでこの積
層を行う。各コイルが出来るだけ独立性の高いイ
ンダクタを構成するようにコイル間には空隙ない
しスロツト部を形成する。 Accordingly, it is an object of the present invention to provide a composite laminated chip inductor that is constructed as a single component but operates as multiple inductors. The composite laminated chip inductor of the present invention is
Electrically insulating magnetic powder such as magnetic ferrite is kneaded with an appropriate binder (butyral resin, etc.) to form a paste, which is printed or stretched to form a magnetic layer, and multiple separate coils are formed on top of the paste. Metal powder (Ag-Pd, Pd
etc.), print a magnetic layer on top of the magnetic layer, and then print a plurality of separate coil-forming conductor patterns connected to the lower conductor pattern to obtain a predetermined number of laminated layers. Repeat this layering process until it is finished. Gaps or slots are formed between the coils so that each coil constitutes an inductor with as much independence as possible.
以下、本発明の実施例を図面に関連して詳しく
説明する。 Embodiments of the present invention will be described in detail below with reference to the drawings.
第１図は本発明の複合積層チツプインダクター
の製造の第１工程を示し、前記のように構成され
る磁性材料のペーストから製作した磁性層１を先
ず用意する。なお四偶のうち２の部分を除く他の
隅３は斜めになつている。磁性層のこの外形は以
後の積層工程でも維持されて積層チツプインダク
タの方向規制用に用いられる。次に、４つの辺か
ら鉤形にコイル形成用パターン４，５，６，７が
印刷され、それらの引出端ａ，ｃ，ｅ，ｇをそれ
ぞれ各辺へ引出す。次に第２図に示すように導体
４，５，６，７の端が露出するようにして磁性層
８，９，１０，１１を印刷し、その上に導体４，
５，６，７に接続する半円形または半楕円形の導
体１２，１３，１４，１５をそれぞれ印刷する。
第３図に示す工程に移つて、導体１２，１３，１
４，１５の端部を露出するようにして磁性層１６
を印刷し、さらに導体１２，１３，１４，１５へ
それぞれ接続する半円形ないし半楕円形の導体１
７，１８，１９，２０を印刷する。次にこれらの
導体１７，１８，１９，２０にそれぞれ接続する
鉤形の導体２１，２２，２３，２４を印刷して各
辺に引出してそれぞれ引出端ｂ，ｄ，ｆ，ｈとす
る。なお、第２〜３図の工程を所望の回数反復し
てインダクタンス値を調整することができる。最
後に積層体の最上層として全面に磁性層２５を印
刷する。 FIG. 1 shows the first step in manufacturing the composite laminated chip inductor of the present invention, in which a magnetic layer 1 made from a paste of magnetic material constructed as described above is first prepared. Note that the other corners 3 except for two of the four corners are oblique. This outer shape of the magnetic layer is maintained in subsequent lamination steps and is used for regulating the direction of the laminated chip inductor. Next, hook-shaped coil forming patterns 4, 5, 6, and 7 are printed on the four sides, and their lead-out ends a, c, e, and g are pulled out to each side, respectively. Next, as shown in FIG. 2, magnetic layers 8, 9, 10, and 11 are printed so that the ends of the conductors 4, 5, 6, and 7 are exposed, and the conductors 4 and
Print semicircular or semielliptical conductors 12, 13, 14, and 15 connected to the conductors 5, 6, and 7, respectively.
Moving to the process shown in FIG. 3, the conductors 12, 13, 1
4 and 15 so that the ends of the magnetic layer 16 are exposed.
A semicircular or semielliptical conductor 1 is printed and further connected to the conductors 12, 13, 14, and 15, respectively.
Print 7, 18, 19, 20. Next, hook-shaped conductors 21, 22, 23, and 24 connected to these conductors 17, 18, 19, and 20, respectively, are printed and drawn out on each side to form drawn-out ends b, d, f, and h, respectively. Note that the inductance value can be adjusted by repeating the steps shown in FIGS. 2 and 3 a desired number of times. Finally, a magnetic layer 25 is printed on the entire surface as the top layer of the laminate.
以上の工程で構成された積層体には第４〜５図
に示すように、貫通孔２６を形成して、ａ〜ｂ
間、ｃ〜ｄ間、ｅ〜ｆ間及びｇ〜ｈ間に形成され
るインダクタL1，L2，L3，L4の相互結合を防止
し、さらに必要ならば第４図に示すようにコイル
間にスリツト２７を入れてさらに相互係合を防止
する。こうしてインダクタをほぼ独立させること
ができる。 As shown in FIGS. 4 and 5, through holes 26 are formed in the laminate constructed by the above steps, and
This prevents mutual coupling of inductors L 1 , L 2 , L 3 , and L 4 formed between C and D, between E and F, and between G and H, and if necessary, as shown in FIG. Slits 27 are placed between the coils to further prevent mutual engagement. In this way, the inductors can be made almost independent.
次に、第４〜５図に示す段階まで完成した積層
体を焼成炉に入れて所定の高温で所定の時間焼成
する。焼成により各磁性層は互に融着して全体的
に一体化した積層体となる。最後に、Ag，Cu，
Niなどの導電粉末のペーストを積層体の側面に
導体引出端ａ，ｂ，ｃ，ｄ，ｅ，ｆ，ｇ，ｈへそ
れぞれ接続する外部端子a′，b′，c′，d′，e′，f′
，
g′，h′を塗布し、複合積層チツプインダクタを完
成する。 Next, the laminate completed up to the stage shown in FIGS. 4 and 5 is placed in a firing furnace and fired at a prescribed high temperature for a prescribed period of time. By firing, the magnetic layers are fused together to form an overall integrated laminate. Finally, Ag, Cu,
External terminals a', b', c', d', e that connect conductive powder paste such as Ni to the conductor lead-out ends a, b, c, d, e, f, g, h, respectively, on the side surfaces of the laminate. ′,f′
，
Apply g′ and h′ to complete the composite laminated chip inductor.
本発明の複合チツプインダクタの回路構成は第
７図のように各コイルないしインダクタL1，
L2，L3，L4が実質的に独立している。勿論、ス
リツト２７の調整によつて各コイル間の結合係数
を修正することは可能であるが、基本的には本発
明のインダクタの各コイルは独立のコイルとして
使用できる。 The circuit configuration of the composite chip inductor of the present invention is shown in FIG. 7, where each coil or inductor L 1 ,
L 2 , L 3 , and L 4 are substantially independent. Of course, it is possible to modify the coupling coefficient between each coil by adjusting the slit 27, but basically each coil of the inductor of the present invention can be used as an independent coil.
以上の構成であるから、本発明の複合積層チツ
プインダクタは単一のチツプ部品に複数個のイン
ダクタを含んでいるから非常に小型化される。ま
た外部端子の利用でプリント基板への直づけも可
能となり、また配線などの複雑で面倒な工程が回
避できる。 With the above structure, the composite laminated chip inductor of the present invention includes a plurality of inductors in a single chip component, so it can be extremely miniaturized. Furthermore, by using external terminals, it is possible to attach the device directly to a printed circuit board, and complicated and troublesome processes such as wiring can be avoided.
第１図ないし第４図は本発明の複合積層チツプ
インダクタの製造工程と構造を示す平面図、第５
図は積層工程が終つた積層体の断面図、第６図は
完成した本発明の複合積層チツプインダクタの斜
視図、及び第７図は同インダクタの回路図であ
る。
図中主な部分は次の通りである。１，８，９，
１０，１１，１６，２５：磁性層、４，５，６，
７，１２，１３，１４，１５，１７，１８，１
９，２０，２１，２２，２３，２４：コイル形成
用導体、２６：孔、２７：スリツト。
1 to 4 are plan views showing the manufacturing process and structure of the composite laminated chip inductor of the present invention, and FIG.
The figure is a sectional view of the laminate after the lamination process, FIG. 6 is a perspective view of the completed composite laminated chip inductor of the present invention, and FIG. 7 is a circuit diagram of the inductor. The main parts in the figure are as follows. 1, 8, 9,
10, 11, 16, 25: magnetic layer, 4, 5, 6,
7, 12, 13, 14, 15, 17, 18, 1
9, 20, 21, 22, 23, 24: conductor for coil formation, 26: hole, 27: slit.
Claims (1)
なくとも２組の印刷導体パターンをそれぞれがら
旋状のコイルになるように形成し、前記パターン
の各引出導体を前記磁性体の外周面に設けた外部
端子に接続し、前記導体パターンのうち少くとも
２組の隣接するものの間にある前記積層磁性体を
一部除去した、複合積層インダクタ。 ２ 積層磁性体が除去された部分は孔またはスリ
ツトである前記第１項記載の複合積層インダク
タ。[Scope of Claims] 1. At least two sets of printed conductor patterns are formed inside a laminated magnetic material, spaced apart in the in-plane direction, each forming a spiral coil, and each lead-out conductor of the pattern is connected to the magnetic conductor. A composite laminated inductor connected to an external terminal provided on an outer circumferential surface of the body, wherein a portion of the laminated magnetic material between at least two adjacent sets of the conductor patterns is removed. 2. The composite laminated inductor according to item 1 above, wherein the portion from which the laminated magnetic material is removed is a hole or a slit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7419381A JPS57190305A (en) | 1981-05-19 | 1981-05-19 | Complex laminated inductor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7419381A JPS57190305A (en) | 1981-05-19 | 1981-05-19 | Complex laminated inductor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57190305A JPS57190305A (en) | 1982-11-22 |
| JPS6224923B2 true JPS6224923B2 (en) | 1987-05-30 |
Family
ID=13540090
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7419381A Granted JPS57190305A (en) | 1981-05-19 | 1981-05-19 | Complex laminated inductor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57190305A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3509058B2 (en) | 1998-12-15 | 2004-03-22 | Ｔｄｋ株式会社 | Multilayer ferrite chip inductor array |
| US6573818B1 (en) * | 2000-03-31 | 2003-06-03 | Agere Systems, Inc. | Planar magnetic frame inductors having open cores |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5651810A (en) * | 1979-10-05 | 1981-05-09 | Tdk Corp | Laminated transformer |
-
1981
- 1981-05-19 JP JP7419381A patent/JPS57190305A/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5651810A (en) * | 1979-10-05 | 1981-05-09 | Tdk Corp | Laminated transformer |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS57190305A (en) | 1982-11-22 |
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