JPS61199695A - Manufacture of printed wiring board - Google Patents

Manufacture of printed wiring board

Info

Publication number
JPS61199695A
JPS61199695A JP4015385A JP4015385A JPS61199695A JP S61199695 A JPS61199695 A JP S61199695A JP 4015385 A JP4015385 A JP 4015385A JP 4015385 A JP4015385 A JP 4015385A JP S61199695 A JPS61199695 A JP S61199695A
Authority
JP
Japan
Prior art keywords
copper foil
plating resist
printed wiring
resist layer
plating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4015385A
Other languages
Japanese (ja)
Inventor
魚津 信夫
横山 博義
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lincstech Circuit Co Ltd
Original Assignee
Hitachi Condenser Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Condenser Co Ltd filed Critical Hitachi Condenser Co Ltd
Priority to JP4015385A priority Critical patent/JPS61199695A/en
Publication of JPS61199695A publication Critical patent/JPS61199695A/en
Pending legal-status Critical Current

Links

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は両面銅箔貼り積層板を用いた印刷配線板の製造
方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method for manufacturing a printed wiring board using a double-sided copper foil laminated board.

(従来の技術) 印刷配線板を製造する方法として最も一般的なものとし
てエツチドホイール法がある。このエツチドホイール法
は、例えば両面銅箔貼り8Im板を用い、これに孔明け
を行い、この孔にシーダーを付着し、化学めっきや電気
めっきにより孔内壁に銅層を形成し、次に両面をエツチ
ングして所定の回路を形成するものであるが、銅の使用
量が多く高価になる欠点がある。
(Prior Art) The most common method for manufacturing printed wiring boards is the etched wheel method. This etched wheel method uses, for example, a double-sided copper foil-covered 8Im plate, makes holes in it, adheres cedar to the holes, forms a copper layer on the inner wall of the hole by chemical plating or electroplating, and then This method uses a large amount of copper to form a predetermined circuit, but it has the disadvantage that it requires a large amount of copper and is expensive.

そのために、このエツチドホイール法に代わりパートリ
−アディティブ法と呼ばれる方法を用い、製造コストを
低下することも行なわれている。パートリ−アディティ
ブ法は、両面銅箔貼り積層板に先ずエツチング法を施こ
して回路を形成し、次に孔明けし、孔のまわりのランド
部を除く回路部をめっきレジストで被覆し、孔内をシー
ダー処iし、無電解銅めっきして孔とランド部に銅層を
形成するものである。
For this reason, a method called a part-additive method has been used instead of the etched wheel method to reduce manufacturing costs. In the part-additive method, a double-sided copper foil laminated board is first etched to form a circuit, then holes are made, the circuit area except for the land area around the hole is covered with plating resist, and the inside of the hole is covered with a plating resist. A copper layer is formed in the holes and lands by seeding and electroless copper plating.

(発明が解決しようとする問題点) しかしながら、このパートリ−アディティブ法では、銅
箔とめつきし′シスト層との密着性が低く、無電解銅め
っき処理の際に、めっき液がその間にしみ込み、銅箔の
腐食や変色、回路間のショートを生じる欠点があった。
(Problems to be solved by the invention) However, in this part-additive method, the adhesion between the copper foil and the plating cyst layer is low, and the plating solution seeps into the gap during electroless copper plating. However, there were drawbacks such as corrosion and discoloration of the copper foil, and short circuits between circuits.

また、その後の半田処理等の際にめっきレジスト層が剥
離する欠点もあった。
Furthermore, there was also the drawback that the plating resist layer peeled off during subsequent soldering and the like.

本発明の目的は、以上の欠点を改良し、銅箔とめっきレ
ジスト層との密着性を向上しつる印刷配線板の製造方法
を提供するものである。
An object of the present invention is to provide a method for manufacturing a vine printed wiring board, which improves the above-mentioned drawbacks and improves the adhesion between the copper foil and the plating resist layer.

(問題点を解決するための手段) 本発明は、上記の目的を達成するために、両面銅箔貼り
積層板に回路パターンを形成する工程、孔明番プする工
程、スルーホール用ランド部以外の所定箇所にめっきレ
ジスト層を形成する工程、スルーホールをシーダー処理
する工程、無電解めっき工程を順次行なう印刷配線板の
製造方法において、孔明は工程侵、めっきレジスト層を
形成する工程の前に銅箔表面をシランカップリング剤に
より処理することを特徴とする印刷配線板の製造方法を
提供するものである。
(Means for Solving the Problems) In order to achieve the above object, the present invention provides a process of forming a circuit pattern on a double-sided copper foil laminated board, a process of punching holes, and a process of forming a circuit pattern on a double-sided copper foil laminated board. In the printed wiring board manufacturing method, which sequentially performs the process of forming a plating resist layer at a predetermined location, the process of seeding through holes, and the electroless plating process, Komei added copper to the process before forming the plating resist layer. The present invention provides a method for manufacturing a printed wiring board, characterized in that the surface of the foil is treated with a silane coupling agent.

(作用) すなわち、本発明によれば、めっきレジスト処理前の銅
箔表面をシランカップリング剤により処理しているため
、銅箔とその後に形成されるめっきレジスト層との密着
性が向上し、めっき液のしみ込みを防止できる。
(Function) That is, according to the present invention, since the surface of the copper foil is treated with a silane coupling agent before the plating resist treatment, the adhesion between the copper foil and the plating resist layer formed thereafter is improved, Prevents plating solution from seeping in.

なお、シランカップリング剤としては、メルカプトシラ
ン例えばγ−メルカプトプロピルトリメトキシシランや
γ−メルカプトプロピルトリエトキシシラン等のγ−メ
ルカプトアルキルアルコキシシラン 1it%において効果が顕著である。
As a silane coupling agent, mercaptosilane, for example, γ-mercaptoalkylalkoxysilane such as γ-mercaptopropyltrimethoxysilane and γ-mercaptopropyltriethoxysilane, is particularly effective when used in an amount of 1 it%.

(実施例) 以下、本発明を実施例に基づいて説明する。(Example) Hereinafter, the present invention will be explained based on examples.

積層板として厚さ1.5履の両面銅箔貼り積層板(日立
化成工業社製MCL−44)を用いる。
A double-sided copper foil laminated plate (MCL-44 manufactured by Hitachi Chemical Co., Ltd.) having a thickness of 1.5 mm is used as the laminated plate.

先ず、この積層板に常温のエツチング処理を施こして所
定パターンの回路を形成する。次に、スルーホール用の
孔を明ける。孔明は後、積層板の回路銅箔表面を10%
塩酸溶液で10秒間程洗浄し、さらに水洗する。積層板
を水洗後、氷酢酸でP Hを3〜4に調整された、室温
の、γーメルカプトブロビルトリメトキシシランヤγ−
メルカプトプロピルトリエトキシシランの0.3%水溶
液中に約5秒間浸漬し、取り出して90’Cで10分間
乾燥する。乾燥後、孔のランド部を除き、積層板表面に
めっきレジストインク(日立化成工業社製HCTM−0
28に−1 )を印刷硬化してめっきレジスト層を形成
する。めっきレジスト層を形成後、特に孔内にシーダー
(日立化成工業社製H8101B>の処理を施こし、硫
酸洗浄し、水洗する。水洗後、無電解めっき液による処
理を施こした。
First, this laminate is etched at room temperature to form a circuit in a predetermined pattern. Next, drill holes for through holes. Later, Komei removed 10% of the circuit copper foil surface of the laminate.
Wash with hydrochloric acid solution for about 10 seconds, and then wash with water. After washing the laminate with water, add γ-mercaptobrobyltrimethoxysilanya γ-mercaptobrobyltrimethoxysilane at room temperature, with pH adjusted to 3 to 4 with glacial acetic acid.
Dip into a 0.3% aqueous solution of mercaptopropyltriethoxysilane for about 5 seconds, remove and dry at 90'C for 10 minutes. After drying, plating resist ink (HCTM-0 manufactured by Hitachi Chemical Co., Ltd.
28-1) is printed and cured to form a plating resist layer. After forming the plating resist layer, the holes were treated with a cedar (H8101B manufactured by Hitachi Chemical Co., Ltd.), washed with sulfuric acid, and washed with water. After washing with water, a treatment with an electroless plating solution was performed.

無電解めっき処理後の積層板を調べたところ、銅箔とめ
っきレジスト層との間にはほとんどめっき液のしみ込み
がなく、めっきレジスト層の剥離もみられなかった。
When the laminate was examined after electroless plating, it was found that almost no plating solution penetrated between the copper foil and the plating resist layer, and no peeling of the plating resist layer was observed.

(発明の効果) 以上の通り、本発明によれば、めっきレジスト層形成前
に銅箔表面をシランカップリング剤により処理している
ため銅箔とめっきレジスト層との密着性が向上し、従っ
て、銅箔とめっきレジスト層との間にめっき液がしみ込
むことにより生じる不良を防止しうる印刷配線板の製造
方法が得られる。
(Effects of the Invention) As described above, according to the present invention, since the surface of the copper foil is treated with a silane coupling agent before forming the plating resist layer, the adhesion between the copper foil and the plating resist layer is improved. , a method for manufacturing a printed wiring board is obtained that can prevent defects caused by plating solution penetrating between the copper foil and the plating resist layer.

Claims (1)

【特許請求の範囲】[Claims] (1)両面銅箔貼り積層板に回路パターンを形成する工
程、孔明けする工程、スルーホール用ランド部以外の所
定箇所にめつきレジスト層を形成する工程、スルーホー
ルをシーダー処理する工程、無電解めつき工程を順次行
なう印刷配線板の製造方法において、孔明け工程後、め
つきレジスト層を形成する工程前に銅箔表面をシランカ
ップリング剤により処理することを特徴とする印刷配線
板の製造方法。
(1) A process of forming a circuit pattern on a double-sided copper foil laminated board, a process of drilling a hole, a process of forming a plating resist layer at a predetermined location other than the through-hole land, a process of seeding the through-hole, no A method for manufacturing a printed wiring board in which electrolytic plating steps are sequentially performed, wherein the surface of the copper foil is treated with a silane coupling agent after the hole punching step and before the step of forming a plating resist layer. Production method.
JP4015385A 1985-02-28 1985-02-28 Manufacture of printed wiring board Pending JPS61199695A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4015385A JPS61199695A (en) 1985-02-28 1985-02-28 Manufacture of printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4015385A JPS61199695A (en) 1985-02-28 1985-02-28 Manufacture of printed wiring board

Publications (1)

Publication Number Publication Date
JPS61199695A true JPS61199695A (en) 1986-09-04

Family

ID=12572820

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4015385A Pending JPS61199695A (en) 1985-02-28 1985-02-28 Manufacture of printed wiring board

Country Status (1)

Country Link
JP (1) JPS61199695A (en)

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