JPS61196313U - - Google Patents
Info
- Publication number
- JPS61196313U JPS61196313U JP5904785U JP5904785U JPS61196313U JP S61196313 U JPS61196313 U JP S61196313U JP 5904785 U JP5904785 U JP 5904785U JP 5904785 U JP5904785 U JP 5904785U JP S61196313 U JPS61196313 U JP S61196313U
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- resistor
- current source
- semiconductor element
- source transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims 5
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Control Of Electrical Variables (AREA)
Description
第1図は、本考案の一実施例を示す回図図、及
び第2図は従来の電流発生回路を示す回路図であ
る。
主な図番の説明、16……電流源トランジスタ
、17,19,20……第1、第2、第3抵抗、
18,21……第1、第2トランジスタ、23…
…差動増幅回路、24,25……第3、第4トラ
ンジスタ、28……出力トランジスタ。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram showing a conventional current generating circuit. Explanation of main figure numbers, 16... Current source transistor, 17, 19, 20... First, second, third resistor,
18, 21...first and second transistors, 23 ...
... Differential amplifier circuit, 24, 25 ... Third and fourth transistors, 28 ... Output transistor.
Claims (1)
源トランジスタに接続された第1及び第2抵抗と
、該第1抵抗に直列接続されたPN接合を有する
第1半導体素子と、前記第2抵抗に第3抵抗を介
して直列接続されたPN接合を有する第2半導体
素子と、前記第1及び第2半導体素子の一端を共
通に接地する手段と、前記第1抵抗と前記第1半
導体素子との接続点に発生する電圧が印加される
第1トランジスタ及び前記第2抵抗と前記第3抵
抗との接続点に発生する電圧が印加される第2ト
ランジスタを差動接続して成る差動増幅回路と、
該差動増幅回路の出力信号を前記電流源トランジ
スタに供給する手段と、エミツタ及びベースが前
記電流源トランジスタと共通接続された出力トラ
ンジスタとから成る電流発生回路。 a first semiconductor element having a current source transistor; first and second resistors having one end commonly connected to the current source transistor; a first semiconductor element having a PN junction connected in series to the first resistor; a second semiconductor element having a PN junction connected in series through three resistors; means for commonly grounding one ends of the first and second semiconductor elements; and a connection between the first resistor and the first semiconductor element. a differential amplifier circuit configured by differentially connecting a first transistor to which a voltage generated at a point is applied and a second transistor to which a voltage generated at a connection point between the second resistor and the third resistor is applied;
A current generating circuit comprising means for supplying an output signal of the differential amplifier circuit to the current source transistor, and an output transistor whose emitter and base are commonly connected to the current source transistor.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5904785U JPH0546096Y2 (en) | 1985-04-19 | 1985-04-19 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5904785U JPH0546096Y2 (en) | 1985-04-19 | 1985-04-19 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS61196313U true JPS61196313U (en) | 1986-12-08 |
JPH0546096Y2 JPH0546096Y2 (en) | 1993-12-01 |
Family
ID=30585109
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5904785U Expired - Lifetime JPH0546096Y2 (en) | 1985-04-19 | 1985-04-19 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0546096Y2 (en) |
-
1985
- 1985-04-19 JP JP5904785U patent/JPH0546096Y2/ja not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH0546096Y2 (en) | 1993-12-01 |