JPS61194942A - Control system for centralized wiring system - Google Patents

Abstract

PURPOSE:To decrease processing required for data transmission control for an automobile or the like and to keep sufficient response to the control operation by providing required information for a transmission data generating processing by a microcomputer as a table in advance and applying table retrieval to data transmission processing. CONSTITUTION:A table SCNTBL is stored in a ROM 103, used to know a CIM being an opposite party to transmit data in the next transmission timing and an LCU included it and the address of plural LCU and CIM is written sequentially in the order of transmission. The table CCTBL describes the relation between terminals of the CIM to transmit/receive the data and stored similarly in the ROM 103. The data transmission condition to each of CIM terminals is decided by one to one or OR or AND conditions with plural terminals to terminals, and not modified during the system operation, then the connecting condition among the terminals are stored in a table in advance and the destination terminal for the required data is discriminated immediately to a data input from a terminal through the retrieval of the table only.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a multiplex data transmission system, and more particularly to a control method for a data transmission system for consolidating wiring in an automobile or the like.

[Background of the invention]

For example, automobiles have electrical components such as various lamps and motors,
In addition, a large number of electrical devices such as various sensors and actuators for automobile control are arranged, and the number of these devices is increasing as automobiles become more electronic.

For this reason, if each of these many electrical devices was wired independently as in the past, the wiring would be extremely complex and large-scale, resulting in increased cost, weight, and space. This causes serious problems such as an increase in the amount of energy used or mutual interference.

Therefore, as one method for solving these problems, it has been proposed to simplify the wiring by using a multiplex transmission system that allows transmission of a large number of signals with a small number of wiring lines. An example of such an application is our application, JP-A-58-136149.

FIG. 2 shows an example of an in-vehicle integrated wiring system using such a multiplex transmission method.

The system shown in Fig. 2 uses an optical fiber cable OF as a signal transmission path, and uses a central control unit 00U (hereinafter simply referred to as OF).
It's called OU. Note that this is the Central Control
ol U%it) and multiple terminal processing units LOU (
Hereinafter, it will simply be referred to as LOU. Note that this is Local C
(abbreviation for control unit) are commonly connected through an optical signal channel.

00U is installed at a suitable location, such as near the dashboard of a car, and controls the entire system.

A predetermined number of LOUs are distributed and arranged in the vicinity of a large number of electrical devices installed in the automobile, such as indicators such as operation switches SW1 and meters M for each fan, and lamps L1 and sensors S.

A photoelectric conversion module O/E that bidirectionally converts optical signals and electrical signals is provided at a portion where the CCU and each LOU are connected to the original fiber cable OF.

0G7U is equipped with a micro combinator and has a data communication function using serial data, and each LC
U includes a plurality of communication processing circuits CIM (hereinafter simply referred to as OIM).
interface module) is provided, and C
The CU sequentially selects one of the LOUs, then sequentially selects the OIM in that LOU, sends and receives data to and from the OIM, and repeats this process to transmit data via the optical fiber cable OF. This makes it possible to multiplex transmission of all types of data, simplifying the complex and large-scale wiring inside the vehicle.

FIG. 3 shows an example of a data transmission method used in such an in-vehicle integrated wiring system.

FIG. 6 is a block diagram showing the entire data transmission system. In the figure, 10 is a central processing unit (corresponding to OOU in FIG. 30 to 32 are terminal processing units (corresponding to the LOU in FIG. 2), 40 is an A/D, and 51 to 5 are external loads. Note that in this example, the signal transmission path 20
A case is shown in which an electrical signal transmission path is used. Therefore, the central processing unit 10 and the terminal processing unit 30 do not require a photoelectric conversion module, and therefore the contents of the terminal processing unit 30 are substantially divided into multiple units. Only C engineering M31-33 are available.

A central processing unit 10 including a computer (microcomputer) connects each terminal processing bag r! OIMs 31-33 in t30 are carried out using a multiplex transmission method, in which data is sent to external loads 51-58 consisting of electrical devices such as various sensors, lamps, actuators, and motors, and data is taken in from these. At this time, an external load 5 such as a sensor that outputs analog data
7°58 is coupled to OIM33 via A/D40,
Transmission operations using digital data can be performed.

The signal transmission path 20 may be of any type as long as it is bidirectional, and any type of signal transmission path such as an original signal transmission system using a fiber as well as an electric signal transmission system can be used.The communication method using this is the so-called half-duplex method. gz), □ OIM 3 in the plurality of terminal processing devices 30 from the central processing unit 10
In response to a call to one of the terminal processing units 1 to 33, data is exchanged alternately between one of the terminal processing units and the central processing unit 10 via the transmission path 20.

Because of this half-duplex multiplex transmission, data sent from the central processing unit 10 is given an address that indicates its destination, and data received from the transmission path 20 is given an address that indicates its destination. Only one of the OIMs in each terminal processing device that recognizes the address as its own responds.

In this way, in response to data sent from the central processing unit 10 with an address attached, only one of the OIMs that understands the address P and determines that it is its own responds to the data. By sending the data to the central processing unit 10, the above-described half-duplex data transmission operation can be achieved.

Further, in the example (g), the functions of the OIMs 31 to 33 are consolidated into specific ones, and these OIMs 31 to 63 are easily integrated into LSIs (large-scale integrated circuits).

The specific functions at this time include the data transmission function described above, that is, the function necessary for multiplex transmission using the half-duplex method, and the control of external equipment 2 such as A/D 40 attached to each terminal processing device. There are two types of functions. As a result, it becomes possible to dedicate the data transmission function. For example, when applied to an integrated wiring system in a car, the above-mentioned half-duplex method is used, and the required transmission speed and number of address pits are adjusted. You can do things like decide accordingly.

Furthermore, in this multiplex transmission system, as mentioned above, the LSI
It is possible to utilize the functions of the terminal processing device that has been developed and applied to the central processing unit 10, and as a result, it is possible to use a general-purpose computer (such as a microcomputer) that does not have a data transmission function as the central processing unit 10. , the central processing unit 1Q can be configured by simply combining this with the LSI OIM 34i described above, and the central processing unit 1
It is possible to reduce the software load required for the OIM computer and increase the versatility of the OIM. In this case, some of the functions of the OIM 34 combined with the central processing unit remain unutilized, but this is unavoidable.

Next, FIG. 4 shows an example of each terminal processing device 31 to 36 in a rough block configuration, in which the received signal RXD inputted from the transmission line 20 is supplied to the synchronization circuit 602, and from the clock generator 307. The clocks of the control circuit 301 are synchronized, and a clock synchronized with the clock component of the received signal fRXD is given to the control circuit 301.
generates a control signal and serially reads the data portion of the received signal into shift register 604.

On the other hand, the address comparison circuit 603 is given an address assigned to the terminal processing device in advance, and the address comparison circuit 303 compares this address with the data read into a predetermined pit position of the shift register 104. , shift register 30 only when both match.
The data in 4 is transferred to the I10 buffer 305 and given to the external device.

Further, the control circuit 601 includes a counter that is incremented by a clock, generates a sequential control signal, and generates a received signal R.
After giving the data by XD to the I10 buffer 305,
Subsequently, data is taken in parallel from the I10 buffer 605 to the shift register 604, and data to be transmitted from the external device to the central processing unit 10 is prepared in the shift register 604 as serial data.

Then, this data is serially read from the shift register 304 and sent to the transmission line 20 as a transmission signal TXD. At this time, the address attached to the received signal RXD is attached to the transmitted signal TXD and sent out, so the central processing unit 10 does not take in this transmitted signal TXD because it matches the address sent by itself. This completes one cycle of data exchange using the half-duplex method.

In this way, the central processing unit 10 sends data to the next terminal processing device, and by repeating this, data is periodically exchanged with one of the OIMs in each of the plurality of terminal processing devices 30. Multiplex transmission becomes possible.

The A/D control circuit 306 is for providing the control function of the A/D 40 necessary when used as the OIM 33 in FIG. /D40 functions to provide the necessary control functions for digitizing and loading into the shift register 604.

Furthermore, regarding this kind of CIM, Japanese Patent Application Laid-open No. 59-16
There is a disclosure in Publication No. 7151.

By the way, as is clear from the above explanation, in such a data transmission system, the CCU computer (hereinafter referred to as a microcomputer) analyzes and processes the data received from each LOU and determines the LCU to which the data should be sent next. At the same time, it also creates transmission data containing control information for this LOU and provides this to the OIM in the CCU.

However, when such a daily transmission system is applied to an integrated wiring system such as an automobile, the control processing using the series of microphones described above must be performed at a sufficiently high speed in order to ensure smooth control of the automobile. need to be For example, in the system shown in Figure 2, when the lamp L is blinked by opening and closing the operation switch SW, if the control processing of the microcomputer in the CCU does not have the required high speed, there will be a delay in blinking the lamp. However, the occurrence of such a delay may pose a serious problem depending on the content of the control.

On the other hand, in an automobile integrated wiring system, the number of loads (terminals) that must be used for data exchange is generally extremely large, for example, several hundred points. In many cases, for this reason, OOU
The MyFun needs to perform not only data transmission control using OIM, but also various other processing operations.

Therefore, in conventional integrated wiring systems such as automobiles using such data transmission methods, as the number of load points, that is, the number of wiring circuits increases, the processing capacity of the OOU microphone cannot keep up, causing a delay in control operations, resulting in a delay in control operations. There was a problem in that it became impossible to maintain accurate control responsiveness.

[Purpose of the invention]

The present invention has been made in view of the above-mentioned circumstances, and its purpose is to reduce the amount of microcomputer processing required for data transmission control and to maintain sufficient responsiveness for control operations, such as automobiles, etc. The purpose of the present invention is to provide a control method for an integrated wiring system.

[Summary of the invention]

In order to achieve this object, the present invention is characterized in that the information necessary for the transmission data creation process by the microcomputer is prepared in advance as a table, and the data transmission process by the microcomputer can be performed by searching the table. .

[Embodiments of the invention]

EMBODIMENT OF THE INVENTION Hereinafter, the control method of the integrated wiring system according to the present invention will be explained in detail using illustrated embodiments.

FIG. 1 shows an embodiment of OUI O in the present invention, including microprocessors (hereinafter referred to as MPU) 101, R
AMI 02. ROM103. Peripheral Interface Adapter (PeripheralXnterfa)
ctt Adapter (hereinafter referred to as PIA)
104°105, PIAl 06. Display device 107. Timer counter 108. Gates 109-117. And O
/If118~125 configuration sale, 8 pieces no/B118
125, and is capable of controlling eight LCUs via the optical fiber cable OF. Therefore, the PIA 105 controls the gates 109 to 116, thereby transmitting the transmission signal from the OIM 106. It determines which of the 0/Es 118 to 125 to give I'XD as transmission data, and the data sent from each LOU is given to the OIM 106 via the gate 117.
It is designed to be received as a reception signal RXD. .

Note that the display 107 is for displaying the operation of 00U10.
Connected to MPU10I via Al04. Further, the timer counter 108 is connected to the control input terminal of the PIA 104, and after being reset by a reset signal input from the PIA 104, it functions to count a predetermined time and then send an interrupt signal to the PIAI 04.

Next, FIG. 5 shows the state of power supply to OOU and each LOU, OOU,! :Only the LCU of &1, which is a specific one of the multiple LOUs, is connected to its power line P.
1 is directly connected to the battery and is powered and always in operation, even when the car engine is stopped, while the other L (! U (42~A
m, where m is the total number of LCUs)
2 is connected to the battery via the CCU, which allows all LOUs to be powered only when a specific switch, such as a key switch, turn signal switch, lighting switch, etc., is turned on. The power consumption is kept to a minimum even when the engine is stopped.

Next, in this embodiment, (30U10 has the following three types of tables, namely, a community scan table, a community bean table, and a communication bean table.
(hereinafter referred to as SON location), connection control table (Connection Control table)
1 Tables (hereinafter referred to as 0OTBL), and a status table (5tatus Table, hereinafter referred to as S'I'A'I"L'B), and data transmission control is performed by searching and comparing these tables. It has become.

Therefore, first of all, these three types of tables 5ONTBL, 0
OTBL and S'l'A'l'TB will be explained.

The table SON'l'EL is stored in a predetermined area of the ROM 103, and is used to know the OIM to which data should be sent at the next transmission timing and the LOU containing this (IIM). with multiple L
The OU and OIM addresses are written sequentially in the transmission order.

FIG. 6 shows an example of this table 8ON'l'BL.
It has a memory area of 1 byte each at 5 types of addresses from +0 to -1. Here, the outside is the total number of 0IM, and each address of C3TB has each LOU in the lower 6 bits.
The address of each CIM included in this LOU is stored in the upper 4 bits. Therefore, in this embodiment, if the number of LOUs is n, then m is at most 8, and the number of OIMs that can be addressed within one LOU is 16.

Then, this table 8ON location is searched in address order, and the order of data transmission for each OIM by OOU is given.

Next, table 0OTBL is the OI to which data should be sent and received.
Table 8 (!) describes the relationship between each terminal of M.
It is stored in the same predetermined area of the ROM 103 as the NTBL.

In such a centralized wiring system, the data transmission conditions for each OIM terminal are determined one-to-one with other terminals, or with multiple terminals and an OR condition or an AND condition. No changes will be made. Therefore, the connection conditions between these terminals were made into a table in advance, so that when inputting data from a terminal, the terminal for transmitting the necessary data could be immediately determined by simply searching the table.

FIG. 7 is an example of table OO'l'B1, which accommodates addresses OO'I'BL that express connection conditions unconditionally, and those with OR conditions and AND conditions. Address 0RTBL, ANDTBL, and address A that accommodates the transmission conditions corresponding to analog data.
D'l'BL, and each address consists of 3 bytes, the breakdown of which is as shown in FIGS. 8 and 9.

In addition, FIG. 8 shows digital data 0OTB, OR'I'
In the case of BL, AND setting, Figure 9 shows analog data AD.
This is the case of 'l'BL.

On the other hand, the table STA'I'TB is a data table set in a predetermined area of the RAM 102, and includes a receiving (monitoring) table for storing input data from each OIM and a table for storing transmission data output to each OIM. It consists of a transmission (control layer) table that is stored, and allows the CCU to instantly grasp the system status, thereby speeding up processing.

FIG. 10 is an example of the table S'l'A'I"f'B, which shows the case of digital data, and shows the D of the transmission frame.
Two bytes are prepared for each address corresponding to the IO (this represents the terminal of the OIM I10 buffer 30S explained in FIG. 4, that is, the terminal for exchanging data). Further, analog data is configured as shown in FIG.

As already explained, this table 8TA'I"I'B
is provided as a pair for reception and transmission, and each time data is transmitted between the CCU and any LOU, new reception data (for one OIM) is provided, but on the other hand, this reception data Since the previous received data is stored in the receiving 8TATTB, when new received data appears, it is sent to the receiving STA'[
'If you compare it with the TB data, you can easily detect that the data has changed. If a change is found in the received data, the changed data bit is detected by exclusive OR operation, and 5TA for transmission is detected for each changed bit.
The corresponding data bits of T'I'B are inverted, and at this time, the correspondence between the data bits of 5TAT'l''A for reception and S'rA'rTB for transmission is OO'I'B.
Since it is given by L, the data bit for transmission can be easily found by searching this 0OTBL.

Next, the operation of this embodiment will be explained.

In the system according to this embodiment, the CCU assigns each CIN
Data transmission is carried out by remote control via the transmission system, so each OIM is given an address, and OOU can exchange data with each OIM in any order. .

The order of this transmission is determined by the table 8ON shown in FIG.
Each time data is transmitted to M, this 8ON pointer is incremented to indicate the next transmission destination OIM. Therefore, the time required for this pointer to go around once is
In other words, the time required for all OIMs to complete one transmission at a time determines the responsiveness in this embodiment.

In this embodiment, the time required for the CCU to send transmission data to the LOU and, as a result, receive the received data from the CIM in the LCU is about 600 μs (see the above-mentioned publication).

Therefore, in order to sufficiently shorten the response time by taking this time into consideration, in this embodiment, restart processing B shown in FIG.
ES'I'ART is the main routine, and the 16th
Timer interrupt processing T shown in the figure.

It is used in combination with 0FIP to form the framework of the entire process.

First, the process shown in FIG. 12 is executed from the beginning when the master reset switch is operated, and 'f'RANs1 is executed only once after initialization. The details of this TRANSl are shown in FIG. 14.

After this TRANS 1, the normal processing routine begins, including PWROTL processing, MON processing, and 0ONEOT processing.
The processes are repeated and the details of these processes are shown in FIGS. 15, 16 and 17, respectively.

15th FI! The PWRO'l'L process of J is a process of controlling the power supply to &1 to Am of the LOU explained in FIG.

The MON process in FIG. 16 uses the fail flag written in the table in FIG. 10 to generate an alarm when an OIM to which predetermined data is no longer being sent appears.

#! The 0ONNEO process in Figure 17 uses table S'l'AT.
'['E is updated using table CO'l'BL, in which OR00M processing and ANDO
Details of the ON process are shown in FIGS. 18 and 19. In addition, A
DC! The details of the TRL process are shown in FIG. 20, but since this process has no particular relation to this embodiment, its explanation will be omitted.

on the other hand,#! The 'l' RAM 5o in the timer interruption process TOOFI in FIG. 13 is shown in FIG. 14, and the details of the process 5CAN at this time are shown in FIG.

In order to explain the operation of the above embodiment more clearly, a more specific embodiment will be described below.

First, to simplify the explanation, as shown in Figure 22,
A system with six LCUs, each with one OIM')? Suppose.

LOUl is installed in the engine compartment of the car, and the OIM address in it is 7, LCU2
is also in the trunk, the OIM address is 8, and L
CU3 is installed near the driver's seat, and the OIM address is 3.
Assume that each is set to .

Meanwhile, in accordance with this, the DI of each CIM in these LCUs
It is assumed that the O terminal assignment is set as shown in FIG.

After the above settings, next change the data transmission order of each OIM from LOU 1 to LC! Assuming that U2 and LCU3 are determined in this order, the contents of the SON placement table at this time are the second
It will look like Figure 4. In other words, initially LOU 1 and its O
The IM address is 7, so the table address +0 becomes 7,1, the next is LOTJ2, the OIM address is 8, so the table address +1 is 8,2, and the last is LOU3, and the OIM address is 3, so the table This means that 3.3 is written to the address +2 of .

Next, based on the settings shown in FIG. 23, the contents of table 0OTBL become as shown in FIG. 25. Note that the numbers on the left side of the second byte, 4 and 0.8, correspond to the AND condition (0, 1
), alone (0,0), and OR condition (1,0)P are represented. In other words, (0.0), (0,1) in Figure 8
, (1, 0) are treated as the upper two bits of a 4-bit binary number, and these are respectively written as 0.4.8 in FIG. Other contents of the table shown in FIG. 25 will be described later.

On the other hand, since table 8TAT'l''B is cleared first (by the initialization process in FIG. 12), it is as shown in FIG. 26 at this time.

Here, as shown in FIG. 10, this table 5TATTB represents the DIO number (terminal A) in which the most significant bit of the first byte to the sixth bit from the most significant bit of the second byte is OIH. As shown in FIG. 27, the first and second bytes of this table S'L'A'l'TB are divided into four bits each starting from the most significant bit, and CIM
Connection information for the terminal (“0” means no connection, 11’
(represents a connection) is directly expressed as a 4-bit binary number, which is then displayed as a decimal number.

Furthermore, in FIG. 22, it is assumed that LOU3 in this figure corresponds to LOU grave 1 in FIG.

Then, after entering the process shown in Figure 12, even when the car is parked and no switches are being operated, OOU and LOU! , and 0/B between these are always active and monitor the operation of switches and the like.

Now, the ignition switch is operated and the I
Assuming that G-8W-Aee is turned on, this means that address 3 of CIM of LOU3, that is, terminal A3 has become 11', as is clear from FIG. OC! Due to the FI processing (13th TgJ), the contents of the receiving table S'I'ATTB change from the state shown in Fig. 26 to the state shown in Fig. 28 (see Fig. 27 ■), and the contents of the receiving table S'I'ATTB change between the receiving and transmitting tables 5TATTB. make a difference

Then, this difference is detected in the RE 8 'I'AR'l' process (Figure 12) (rJOONNEo process (Figure 17)), and as a result, the unmatched part is detected and the unmatched part of the transmission table is detected. The contents of table 8'l'A'I'TB become as shown in Fig. 29.As a result, RESTART
PWRCTL processing (Fig. 15) in processing (Fig. 12)
As a result, power is supplied to LOU1, LOU2 and their O/Es, and they are brought into operation.

Meanwhile, during this time, MON processing (Figure 16) is being performed using the 7ail flag of table 5TAT'l'B.
Monitoring continues to determine whether normal data transmission is occurring.

Now, the reason why the receiving table 8TAT'I'B is as shown in Fig. 28 is because the OIM terminal 43 of LOU3 has become 11' as mentioned above. 3, which means that OIM is also 3. Then, as is clear from FIG. 24, the order of the OIM that became the input source is address 2 of table 8ONTBL, and the terminal of this OIM is /I6.
3, so this is used as table CC in Figures 7 and 8.
When searching on 1rBL, in this case, the table ゛σ
The first byte of CTRL is (0, 2), and the upper 4 bits of the third byte are (3), so the address 0OTBL+0 in the table in Figure 25 corresponds first. I understand. And this address 0OTBL
Since the lower digit of the second byte of +0 is 1 and the lower digit of the third byte is 2, the output light OIM at this time is the one whose address SCN position is 1 in the table of Fig. 24, that is, LO
It is CIM8 of U2, and Rade 7 of the terminal shop 2
It turns out to be Oggar.

Furthermore, if the ignition switch is operated to the start position this time, this switch will first go to the ignition on position and then move to the start position, so in addition to A3 of the OIM terminal of LOU3, A4 will also become 11'. , the table S'I'A'F'I'B changes as shown in Figure 30 (α) (see Figure 27 ◎), and then (b)
(See Figure 27 ■).

Next, in response to such a change in the receiving table S'l'muTTB, the transmitting table is first changed to the one shown in FIG. 30 (C
) and then (cr) (27th
(See figure ■). The reason why the 30th vtJ(c) is written when the first byte of address 3 is 0.0 and when it is 2.0 is as follows. That is, FIGS. 23 and 2
As is clear from Figure 4, when the first byte of address 6 in table 8TA'I'TB is 1°0, one of the AND conditions for the first byte of address 3 to be 2°0 is satisfied. However, since neither case can be determined from this alone, both cases are shown, and the same applies to the transmission table shown in FIG. 29. The reason why the reception table changes to the one shown in FIG. 60(b) and the transmission table changes to the one shown in FIG. When the first byte becomes 0.0, Figure 26 and 2
This is because it can be seen from FIG. 5 that the terminal &O of the same OIM must be set to 11'.

In this way, when the ignition switch is operated to the starting position, the starter motor is turned on.

Next, suppose you turn on the parking light switch.

Then, the 23rd rl! It is known from J that the terminal A10 of oIM of LOU3 becomes "1", and as a result, the reception table 5TAT'I'B becomes as shown in FIG. 61. Therefore, at this time, the corresponding address of table 0OTBL is 00TBL+27 .+30 and further OR'
+6 of I'BL and OR8'l'OP are referenced, and since it is an OR condition, without considering other inputs, the first byte of address + 0 of transmission table 8Tm T'l'B is sent as shown in Figure 31. to 2.0, the first byte at address +3 to 8.0, and the second byte at address +6 to 2°0.

Therefore, at this time, as is clear from FIG. 23, the lighting of the clearance lamp and the tail lamp is controlled, and the purpose can be achieved.

〔Effect of the invention〕

As explained above, according to the present invention, most of the processing required for data transmission control by microsi in an integrated wiring system of an automobile or the like is performed by table search, thereby eliminating the drawbacks of the conventional technology. Control by an integrated wiring system in automobiles and the like can be performed at a sufficiently high speed.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an example of a control method for an integrated wiring system according to the present invention, FIG. 2 is a block diagram showing an example of an automotive integrated wiring system, and 3rd Vri is a block diagram showing an example of a data transmission system. , FIG. 4 is a block diagram showing an example of a terminal processing device, FIG. 5 is an explanation II of the power supply system in the present invention, No. 61N is an explanatory diagram showing an example of the communication scan table, FIG. Figure 8, 91m connection control
FIGS. 10 and 11 are explanatory diagrams showing an embodiment of the status table. FIGS. 12 to 21 are diagrams showing the operation Tj in an embodiment of the present invention:
70-chart for explanation, FIG. 22 is a configuration diagram assumed for explaining the operation of the present invention, FIG. 26 is an explanatory diagram of the wiring state, FIG. 24 is an explanatory diagram showing an example of a SON arrangement, and FIG. 25 is an explanatory diagram showing an example of 0OTBL, Figure 26 is 8TAT
An explanatory diagram showing an example of TB, Figure 27 shows connection information and 5TA
FIGS. 28 to 61 are explanatory diagrams showing the correspondence with TTB, and are explanatory diagrams of state changes of 5TATTB accompanying data transmission. DESCRIPTION OF SYMBOLS 10... Central control unit (OOU), 30... Terminal processing unit (LOU), 101... Microprocessor, 102... 几AM, 103... ROM, 104
, 105...Veri7eral interface adapter (PIA), 106...Communication processing circuit (OIM). (,・1', 祢・1) Desk + 1 Figure 2 ll5rlA Figure 6 117! ! 11 Figure 8 Figure 9 111051! Fig. 11 Fig. 1112 Fig. 14 Fig. 16 Old drawing Fig. 19 Fig. 22 Inside the engine room Inside the trans 2 ttu
l"'il No. 25rIJ 1126wi Ch. 27

Claims (1)

[Claims] 1. In a control method for an aggregated wiring system in which data transmission between a plurality of terminals is performed by a common data transmission system under the control of a central station equipped with a computer, A control method for an integrated wiring system, characterized in that a memory is provided in which connection conditions between terminals are stored in a table in advance, and data for transmission at the central station is created by searching the table. . 2. Claim 1 is characterized in that the connection conditions stored in the memory are classified into single conditions, AND conditions, and OR conditions, and some of them are stored in duplicate. Control method for centralized wiring system.