JPS61194796A - Junction structure of electronic component and method thereof - Google Patents

Junction structure of electronic component and method thereof

Info

Publication number
JPS61194796A
JPS61194796A JP3394885A JP3394885A JPS61194796A JP S61194796 A JPS61194796 A JP S61194796A JP 3394885 A JP3394885 A JP 3394885A JP 3394885 A JP3394885 A JP 3394885A JP S61194796 A JPS61194796 A JP S61194796A
Authority
JP
Japan
Prior art keywords
wiring board
electronic component
conductive particles
insulating adhesive
terminals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3394885A
Other languages
Japanese (ja)
Other versions
JPH0779192B2 (en
Inventor
和弘 杉山
出口 敏良
正木 久士
鑓田 好男
厚見 好則
玉木 敏晴
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Casio Computer Co Ltd
Original Assignee
Casio Computer Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Casio Computer Co Ltd filed Critical Casio Computer Co Ltd
Priority to JP60033948A priority Critical patent/JPH0779192B2/en
Publication of JPS61194796A publication Critical patent/JPS61194796A/en
Publication of JPH0779192B2 publication Critical patent/JPH0779192B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔発明の技術分野〕 この発明は、電子部品を配線基板面に直接接合する電子
部品の接合構造およびその方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an electronic component bonding structure and method for directly bonding an electronic component to a wiring board surface.

〔発明の技術的背景〕[Technical background of the invention]

LSIチップや液晶表示パネル等の電子部品を配線基板
に取付ける方法として、電子部品を直接配線基板面に接
合する方法がある。
As a method for attaching electronic components such as LSI chips and liquid crystal display panels to wiring boards, there is a method of directly bonding electronic components to the wiring board surface.

この方法としては、従来、配線基板面の電子部品接合面
に、電子部品の配線基板接合面に形成されている複数の
外部回路接続用端子と対応する複数の電子部品接続用端
子を配列形成し、この配線基板の電子部品接合面に各電
子部品接続用端子の上から異方導電性接着剤を塗布して
その上に電子部品を重ね、この状態で電子部品と配線基
板とを相対的に押圧することにより、電子部品と配線基
板とをその端子同志を導通接続させて接着接合する方法
が採用されている。
Conventionally, this method involves forming a plurality of electronic component connection terminals in an array on the electronic component bonding surface of the wiring board surface, which correspond to the plurality of external circuit connection terminals formed on the wiring board bonding surface of the electronic component. , apply an anisotropic conductive adhesive over each electronic component connection terminal to the electronic component bonding surface of this wiring board, stack the electronic components on top of it, and then place the electronic components and the wiring board relative to each other in this state. A method has been adopted in which an electronic component and a wiring board are adhesively bonded by pressing the terminals of the electronic component to conductively connect each other.

なお、前記異方導電性接着剤は、絶縁性接着剤中に導電
性粒子を、導電性粒子同志が互いに接触し合わないよう
な割合で混入したもので、この異方導電性接着剤からな
る接着剤層は、厚さ方向には導通性を示すが面方向(横
方向)には絶縁性をもっているから、電子部品と配線基
板との接合面に異方導電性接着剤を介在させて電子部品
と配線基板とを相対的に押圧すると、電子部品の各端子
と配線基板の各端子とが導通接続(導電性粒子を介して
導通接続)される。
The anisotropically conductive adhesive is an insulating adhesive mixed with conductive particles in a proportion such that the conductive particles do not come into contact with each other. The adhesive layer exhibits conductivity in the thickness direction but insulating properties in the plane direction (lateral direction). When the component and the wiring board are pressed relative to each other, each terminal of the electronic component and each terminal of the wiring board are electrically connected (conductively connected via the conductive particles).

〔背景技術の問題点〕[Problems with background technology]

しかしながら、上記異方導電性接着剤によって電子部品
と配線基板とを接着接合する方法は、短時間で電子部品
を配線基板に取付けることができるが、この方法では、
電子部品の各端子部と配線基板の各端子との全てが必ず
導通接続されるとは限らず、そのために信頼性が悪いと
いう問題があった。
However, although the method of adhesively bonding electronic components and wiring boards with the above-mentioned anisotropic conductive adhesive can attach electronic components to wiring boards in a short time, this method
There is a problem in that not all of the terminals of the electronic component and each terminal of the wiring board are necessarily electrically connected, resulting in poor reliability.

これは、前記異方導電性接着剤の導電性粒子の分布が不
規則にばらついているためであり、これに対してLSI
チップや液晶表示パネル等の電子部品の端子巾は非常に
狭いから、異方導電性接着剤にその導電性粒子の間隔が
前記端子巾より広くなっている箇所があってこの箇所に
前記端子がたまたま対応すると、この部分では電子部品
と配線基板との端子間に導電性粒子が介在されずに、こ
の部分の端子が導通接続されない状態になる。なお、異
方導電性接着剤中の導電性粒子の混入比を多くしてやれ
ば、導電性粒子の間隔も小さくなるから、全ての端子を
ほぼ確実に導通接続することができるが、このように異
方導電性接着剤中の導電性粒子の混入比を多くすると、
導電性粒子の間隔が密になっている部分で導電性粒子同
志が接触し合って隣接する端子同志を短絡させてしまう
ことになる。
This is because the distribution of conductive particles in the anisotropic conductive adhesive varies irregularly, whereas LSI
Since the terminal width of electronic components such as chips and liquid crystal display panels is very narrow, there are places in the anisotropically conductive adhesive where the distance between the conductive particles is wider than the terminal width, and the terminal is attached to these places. Coincidentally, in this portion, conductive particles are not interposed between the terminals of the electronic component and the wiring board, and the terminals of this portion are not electrically connected. Note that if the mixing ratio of conductive particles in the anisotropic conductive adhesive is increased, the spacing between the conductive particles will also become smaller, so all terminals can be connected almost reliably. When the mixing ratio of conductive particles in the conductive adhesive is increased,
In areas where the conductive particles are closely spaced, the conductive particles come into contact with each other and short-circuit adjacent terminals.

〔発明の目的〕[Purpose of the invention]

この発明は上記のような実情にかんがみてなされたもの
であって、その目的とするところは、異方導電性接着剤
によって電子部品を接着接合する方法と同程度の短い時
間で能率よく電子部品を配線基板に取付けることができ
るとともに、電子部品の各端子を基板面の各端子に導通
不良部分を生ずることなく確実に導通接続することがで
きるようにした電子部品の接合構造とその方法を提供す
ることにある。
This invention was made in view of the above-mentioned circumstances, and its purpose is to efficiently bond electronic components in a time comparable to that of the method of adhesively bonding electronic components with an anisotropic conductive adhesive. Provided is a bonding structure for electronic components and a method therefor, which allows the electronic component to be attached to a wiring board, and also allows each terminal of the electronic component to be reliably electrically connected to each terminal on the board surface without causing any conductive defects. It's about doing.

〔発明の概要〕[Summary of the invention]

すなわち、この発明の電子部品の接合構造は、電子部品
と配線基板との接合面間に、絶縁性接着剤中に最大粒子
の粒径が前記電子部品と前記配線基板との両方の端子の
うち狭巾の端子の巾よりも小さくかつ前記電子部品と前
記配線基板とのいずれの端子間隔よりも小さい多数の導
電性粒子を前記狭巾端子の巾よりも小さい間隔で等間隔
に埋込んだ接合材を介在させ、前記電子部品と前記配線
基板との両方の端子を前記導電性粒子を介して導通させ
るとともに、前記電子部品と前記配線基板とを前記絶縁
性接着剤により接着接合したものである。
That is, in the bonding structure of the electronic component of the present invention, the maximum particle size in the insulating adhesive is between the bonding surfaces of the electronic component and the wiring board, and A bond in which a large number of conductive particles smaller than the width of a narrow terminal and smaller than a terminal spacing between the electronic component and the wiring board are embedded at equal intervals smaller than the width of the narrow terminal. The terminals of the electronic component and the wiring board are electrically connected through the conductive particles, and the electronic component and the wiring board are adhesively bonded using the insulating adhesive. .

また、この発明の電子部品の接合方法は、前記電子部品
と前記配線基板との接合面の一方に絶縁性接着剤を塗布
した後、この絶縁性接着剤上にメツシュスクリーンを重
ねてその上から導電性粒子を散布し、この導電性粒子の
うち前記メツシュスクリーンの各開口に入った導電性粒
子を前記絶縁性接着剤中に押込んで前記絶縁性接着剤中
に多数の導電性粒子を等間隔に埋込み、この後前記電子
部品と前記配線基板とを重ねて相対的に押圧して前記電
子部品と前記配線基板とを接着接合するものである。
Further, in the method for joining electronic components of the present invention, after applying an insulating adhesive to one of the joining surfaces of the electronic component and the wiring board, a mesh screen is placed on top of the insulating adhesive. Conductive particles are dispersed from the mesh screen, and the conductive particles that have entered each opening of the mesh screen are pushed into the insulating adhesive to form a large number of conductive particles in the insulating adhesive. The electronic component and the wiring board are embedded at regular intervals, and then the electronic component and the wiring board are stacked and pressed relatively to bond the electronic component and the wiring board together.

つまり、この発明は、絶縁性接着剤中に導電性粒子を埋
込んだ接合材を介して電子部品と配線基板とを接着接合
することにより、異方導電性接着剤によって電子部品を
接着接合する方法と同様に、電子部品と配線基板とを相
対的に押圧して接着剤を硬化させるだけで配線基板に電
子部品をその両方の端子を互いに導通接続させた状態で
接合することができるようにするとともに、前記導電性
粒子の最大径を電子部品と配線基板との両方の端子のう
ち狭巾の端子の巾よりも小さくかつ前記電子部品と前記
配線基板とのいずれの端子間隔よりも小さくし、かつこ
の導電性粒子を、前記狭巾端子の巾よりも小さい間隔で
等間隔に絶縁性接着剤中に埋込むことにより、対応する
全ての端子間に少なくとも1つの導電性粒子が必ず介在
されるようにして、異方導電性接着剤を用いた場合にお
ける導電性粒子の分布のばらつきによる導通不良部分の
発生をなくしたものである。
In other words, the present invention adhesively joins electronic components and a wiring board through a bonding material in which conductive particles are embedded in an insulating adhesive. Similar to the method, by simply pressing the electronic component and wiring board relatively and curing the adhesive, it is now possible to bond the electronic component to the wiring board with both terminals electrically connected to each other. At the same time, the maximum diameter of the conductive particles is smaller than the width of the narrower terminal of both terminals of the electronic component and the wiring board, and smaller than the spacing between any of the terminals of the electronic component and the wiring board. , and by embedding the conductive particles in the insulating adhesive at equal intervals smaller than the width of the narrow terminal, at least one conductive particle is necessarily interposed between all the corresponding terminals. This eliminates the occurrence of poor conduction due to variations in the distribution of conductive particles when an anisotropic conductive adhesive is used.

〔発明の実施例〕[Embodiments of the invention]

以下、この発明の一実施例を図面を参照して説明する。 An embodiment of the present invention will be described below with reference to the drawings.

まず、電子部品の接合構造について説明すると、第1図
〜第3図において、1は配線基板であり、この配線基板
1面には第3図に示すように複数の配線2,2.・・・
が形成されている。この各配線2゜21.・・・は、配
線基板1のLSIチップ接合部から導出されており、各
配線2,2.・・・のLSIチップ接合部側の端部は、
LSIチップ10の配線基板接合面に配列形成されてい
る複数の外部回路接続用端子11.11.・・・とそれ
ぞれ対応するLSIチップ接続用端子2a 、 2a 
、・・・とされている。なお、この各端子2a 、 2
a 、・・・の巾は、LSIチップ10の各端子11.
11.・・・の巾より若干狭い巾とされている。
First, to explain the bonding structure of electronic components, in FIGS. 1 to 3, 1 is a wiring board, and on the surface of this wiring board, as shown in FIG. 3, there are a plurality of wirings 2, 2. ...
is formed. Each wiring 2゜21. ... are led out from the LSI chip joint part of the wiring board 1, and each wiring 2, 2 . The end on the LSI chip joint side of...
A plurality of external circuit connection terminals 11.11. are arranged and formed on the wiring board bonding surface of the LSI chip 10. ...and corresponding LSI chip connection terminals 2a, 2a, respectively.
It is said that... In addition, each of these terminals 2a, 2
The width of a, . . . is the width of each terminal 11 .
11. The width is said to be slightly narrower than the width of...

3は前記基板1面のLSIチップ接合面に、全てのLS
Iチップ接続用端子2a 、 2a 、・・・を覆うよ
うに形成された接合材であり、この接合材3は、前記L
SIチップ接合面にその全面にわたって均一に塗布した
絶縁性接着剤3a中に、多数の導電性粒子4,4.・・
・を埋設したものである。この導電性粒子4,4.・・
・は、前記LSIチップ10の外部回路接続用端子11
.11.・・・と配線基板1面のLSIチップ接続用端
子2a 、 2a 、・・・とのうらの狭巾の端子(こ
の実施例では配線基板1面のLSIチップ接続用端子2
a 、 2a 、・・・)の巾およびLSIチップ10
の外部回路接続用端子11.11゜・・・間の間隔より
も小さい粒径もの(例えば端子中およびその間隔が50
〜250μである場合は粒径20〜40μ)とされてお
り、この導電性粒子4.4.・・・は、絶縁性接着剤3
中に、前記各端子2a、2a、・・・の巾よりも小さい
間隔で等間隔に埋込まれている。なお、この導電性粒子
4,4゜・・・としては、例えばニッケル粒子を金メッ
キしたものや、半田粒子、銅粒子を金または銀メッキし
たもの、またはグラファイト粒子等がある。
3, all the LS chips are connected to the LSI chip bonding surface on the first surface of the substrate.
It is a bonding material formed so as to cover the I chip connection terminals 2a, 2a,..., and this bonding material 3 is
A large number of conductive particles 4, 4 .・・・
・It is buried. These conductive particles 4, 4.・・・
- is the external circuit connection terminal 11 of the LSI chip 10
.. 11. ... and the narrow terminals behind the LSI chip connection terminals 2a, 2a, ... on the first side of the wiring board (in this embodiment, the LSI chip connection terminals 2 on the first side of the wiring board
a, 2a,...) width and LSI chip 10
Terminals for connecting external circuits 11.11゜...Particle size smaller than the spacing between the terminals (for example, inside the terminals and the spacing between
~250μ, the particle size is 20~40μ), and this conductive particle 4.4. ...is insulating adhesive 3
The terminals 2a, 2a, . . . are embedded at regular intervals smaller than the width of each of the terminals 2a, 2a, . The conductive particles 4, 4°, etc. include, for example, nickel particles plated with gold, solder particles, copper particles plated with gold or silver, or graphite particles.

また、第3図において、2tl、2b、・・・は配線基
板1の一側縁部に、液晶表示パネル20の配線基板接合
面(端子配列部)に配列されている複数の外部回路接続
用端子21.21.・・・とそれぞれ対応させて配列形
成された表示パネル接続用端子であり、この表示パネル
接続用端子2b、2b、・・・の配列部つまり表示パネ
ル接合部にも、表示パネル接合面に均一に塗布した絶縁
性接着剤中に、最大粒子の粒径が前記表示パネル接続用
端子2b、2b。
Further, in FIG. 3, 2tl, 2b, . . . are for connecting a plurality of external circuits arranged on one side edge of the wiring board 1 on the wiring board bonding surface (terminal arrangement part) of the liquid crystal display panel 20. Terminal 21.21. The display panel connection terminals are arranged in correspondence with the display panel connection terminals 2b, 2b, ..., and the display panel connection terminals 2b, 2b, . . . The largest particle size in the insulating adhesive applied to the display panel connection terminals 2b, 2b.

・・・と液晶表示パネル20の外部回路接続用端子21
゜21、・・・とのうちの狭巾の端子の巾よりも小さく
かつ前記表示パネル接続用端子2b、2b、・・・およ
び前記外部回路接続用端子21.21.・・・のいずれ
の端子間隔よりも小さい導電性粒子を前記狭巾端子2b
、2b、・・・の巾よりも小さい間隔で等間隔に埋込ん
だ接合材3が形成されている。
... and the external circuit connection terminal 21 of the liquid crystal display panel 20
21, . . . and the display panel connection terminals 2b, 2b, . . . and the external circuit connection terminals 21, 21. Conductive particles smaller than any terminal spacing between the narrow width terminals 2b
, 2b, . . . The bonding materials 3 are embedded at equal intervals smaller than the width of the bonding materials 3.

そして、前記LSIチップ10は、その各外部回路接続
用端子11.11.・・・を配線基板1面のIsIチッ
プ接続用端子2a 、 2a 、・・・に対応させて前
記接合材3の上に重ね、このLSIチップ10と配線基
板1とを相対的に押圧してその状態で接合材3の絶縁性
接着剤3aを硬化させることにより、第1図および第2
図に示すように、LSIチップ10の各端子11.11
.・・・と配線基板1の各端子2a。
The LSI chip 10 has its respective external circuit connection terminals 11, 11, . ... on the bonding material 3 in correspondence with the IsI chip connection terminals 2a, 2a, ... on the wiring board 1 side, and press this LSI chip 10 and the wiring board 1 relatively. By curing the insulating adhesive 3a of the bonding material 3 in this state,
As shown in the figure, each terminal 11.11 of the LSI chip 10
.. ... and each terminal 2a of the wiring board 1.

2a、・・・とを接合材3中の導電性粒子4,4.・・
・により導通接続させた状態で前記絶縁性接着剤3aに
より接着接合されている。
2a, . . . and conductive particles 4, 4, .・・・
・They are adhesively bonded by the insulating adhesive 3a in a state where they are electrically connected.

なお、第1図および第2図において、18は配線基板1
に接合されたLSIチップ10をモールドするエポキシ
樹脂等のモールド樹脂であり、このモールド樹脂18は
、LSIチップ10の接合後に塗布される。また、第2
図において、12はり、SIチップ10の基材(ここで
はN型基材)、13はP型拡散層、14はN型拡散層で
あり、これら拡散層13.14が形成されたチップ主面
には酸化シリコン(Si 02 )からなる絶縁膜15
が形成され、その上にはアルミニウムからなる配線16
が形成されている。この配線16は、前記絶縁WA15
に設けた開口部において前記拡散層13.14のうちの
所定の拡散層と導通されており、この配線16の導出端
に形成されたパッド部16aはそのまま外部回路接続用
端子11とされている。17は前記配線16を覆う酸化
シリコンからなる絶縁保護膜であり、この保護膜17は
、前記端子2a部分を除いてチップ全面に形成されてい
る。
In addition, in FIG. 1 and FIG. 2, 18 is the wiring board 1.
A molding resin such as epoxy resin is used to mold the LSI chip 10 bonded to the LSI chip 10, and this molding resin 18 is applied after the LSI chip 10 is bonded. Also, the second
In the figure, 12 is a base material of the SI chip 10 (in this case, an N-type base material), 13 is a P-type diffusion layer, and 14 is an N-type diffusion layer, and the main surface of the chip on which these diffusion layers 13 and 14 are formed. is an insulating film 15 made of silicon oxide (Si 02 ).
is formed, and a wiring 16 made of aluminum is formed on it.
is formed. This wiring 16 is connected to the insulating WA 15
It is electrically connected to a predetermined diffusion layer among the diffusion layers 13 and 14 through the opening provided in the wiring 16, and the pad portion 16a formed at the lead-out end of the wiring 16 is directly used as the external circuit connection terminal 11. . Reference numeral 17 denotes an insulating protective film made of silicon oxide that covers the wiring 16, and this protective film 17 is formed over the entire surface of the chip except for the terminal 2a portion.

また、前記液晶表示パネル20は、その配線基板接合面
を配線基板1の表示パネル接合面に形成した前記接合材
3の上に重ねて押圧し、接合材3の絶縁性接着剤3aを
硬化させることによって前記LSIチップ10と同様に
して配線基板1に接着接合されている。
Further, the liquid crystal display panel 20 is pressed so that its wiring board bonding surface is stacked on the bonding material 3 formed on the display panel bonding surface of the wiring board 1, and the insulating adhesive 3a of the bonding material 3 is cured. Thus, it is adhesively bonded to the wiring board 1 in the same manner as the LSI chip 10 described above.

次に、前記配線基板1への電子部品の接合手順を、前記
LSIチップ10の接合について第4図を参照し説明す
る。
Next, the procedure for bonding electronic components to the wiring board 1 will be described with reference to FIG. 4 for bonding the LSI chip 10.

まず、各配線2.2.・・・とLSIチップ接続用端子
2a、2a、・・・および表示パネル接続用端子2b、
2b、・・・等を形成した配線基板1面に、そのLSI
チップ接合面全体にわたって絶縁性接着剤3aを第4図
(a)に示すように均一厚さに塗布する。なお、この絶
縁性接着剤13aは、前記導電性粒子4.4.・・・の
うち最大粒子の粒径に応じて、例えば最大径粒子の粒径
が40μである場合は端子2a、2a上の層厚が40〜
60μ程度になるように塗布する。
First, each wiring 2.2. . . . and LSI chip connection terminals 2a, 2a, . . . and display panel connection terminals 2b,
2b, etc. are formed on one side of the wiring board.
An insulating adhesive 3a is applied to a uniform thickness over the entire chip bonding surface as shown in FIG. 4(a). Note that this insulating adhesive 13a is made of the conductive particles 4.4. Depending on the particle size of the largest particle among ..., for example, if the particle size of the largest particle is 40μ, the layer thickness on the terminals 2a, 2a is 40~
Apply to a thickness of about 60μ.

次に、この絶縁性接着剤3aの塗布層の上に第4図(1
))に示すようにメツシュスクリーン5を載置する。こ
のメツシュスクリーン5は、テトロン等の樹脂AiMか
、またはエツチング等により微細な開口を形成したステ
ンレス等の薄板からなるもので、このメツシュスクリー
ン5は、前記導電性粒子の4,4.・・・のうち最大粒
子の粒径よりも大きくかつLSIチップ10の外部回路
接続用端子ii、 il、・・・と配線基板1面のLS
Iチップ接続用端子2a 、 2a 、・・・とのうち
の狭巾の端子(この実施例では配線基板1面のLSIチ
ップ接続用端子2a 、 2a 、・・・)の巾および
この各端子2a。
Next, on the coating layer of this insulating adhesive 3a, as shown in FIG.
)) Place the mesh screen 5 as shown in FIG. This mesh screen 5 is made of a resin AiM such as Tetron or a thin plate of stainless steel or the like in which minute openings are formed by etching or the like. . . , which is larger than the particle size of the largest particle and which is connected to external circuit connection terminals ii, il, . . . of the LSI chip 10 and the LS on one side of the wiring board.
The width of the narrower terminal among the I chip connection terminals 2a, 2a, . . . (in this embodiment, the LSI chip connection terminals 2a, 2a, . .

2a・・・間の間隔よりも小さい多数の開口5a、5a
、・・・を、前記各端子2a 、 2a 、・・・の巾
よりも小さい間隔で等間隔に形成したものとされている
2a... A large number of openings 5a, 5a smaller than the interval between
, . . . are formed at regular intervals smaller than the width of each of the terminals 2a, 2a, .

なお、このメツシュスクリーン5の厚さは、最大径の導
電性粒子4の粒径とほぼ同じか、あるいはそれよりわず
かに厚くされている。
Note that the thickness of the mesh screen 5 is approximately the same as the particle size of the largest diameter conductive particles 4, or slightly thicker than that.

この後は、第4図(C)に示すように前記メツシュスク
リーン5の上からその全面にわたって導電性粒子4,4
.・・・をほぼ均一厚さに散布し、次いでその上から第
4図(d)に示すようにローラ6等の加圧治具により加
圧して、メツシュスクリーン゛5の各開口5a 、 5
a 、・・・内に入った導電性粒子4.4.・・・を絶
縁性接着剤3a中に押込んでやる。この場合、導電性粒
子4,4.・・・の粒径が全て最大粒径であれば、メツ
シュスクリーン5の各開口5a 、 5a 、・・・内
に1個ずつ導電性粒子4゜4、・・・が入るから絶縁性
接着剤3a中に等間隔に1個ずつの導電性粒子4.4.
・・・が押込まれるが、導電性粒子4.4.・・・の粒
径を揃えることは歩留りの関係上コストアップにつなが
るから、この実施例ではある程度小径の導電性粒子4.
4.・・・も使用している。従って、メツシュスクリー
ン5の上から導電性粒子4,4.・・・を散布すると、
最大径の導電性粒子4はメツシュスクリーン5の開口5
aに1個ずつ入って絶縁性接着剤3a中に押込まれ、小
径の導電性粒子4はメツシュスクリーン5の開口5aに
複数個入って絶縁性接着剤3a中に押込まれるが、その
場合でも絶縁性接着剤3a中に押込まれる導電性粒子4
,4.・・・の間隔は実質的に等間隔になる。
After this, as shown in FIG. 4(C), conductive particles 4, 4 are applied over the entire surface of the mesh screen 5.
.. ... to a substantially uniform thickness, and then pressurized from above with a pressure jig such as a roller 6 as shown in FIG. 4(d) to open each opening 5a, 5 of the mesh screen 5.
a,... Conductive particles contained within 4.4. ... into the insulating adhesive 3a. In this case, conductive particles 4, 4. If all the particle sizes of ... are the maximum particle size, one conductive particle 4゜4, ... enters each opening 5a, 5a, ... of the mesh screen 5, so that insulating adhesive is formed. One conductive particle at equal intervals in the agent 3a 4.4.
... are pushed in, but the conductive particles 4.4. Since making the particle sizes of the conductive particles 4. and .
4. ...is also used. Therefore, conductive particles 4, 4 . When spraying...
The conductive particles 4 with the largest diameter are located in the openings 5 of the mesh screen 5.
a, and are pushed into the insulating adhesive 3a, and a plurality of small-diameter conductive particles 4 enter the openings 5a of the mesh screen 5 and are pushed into the insulating adhesive 3a. However, the conductive particles 4 pushed into the insulating adhesive 3a
,4. ... are substantially equal intervals.

このように絶縁性接着剤3a中に導電性粒子4゜4、・
・・を押込んだ後は、散布した導電性粒子4゜4、・・
・を真空吸引により吸引し、絶縁性接着剤3a中に押込
まれてこの絶縁性接着剤3aに保持された導電性粒子4
,4.・・・を除く導電性粒子4゜4、・・・を第4図
(e)に示すように除去する。なお、この除去された導
電性粒子4,4゜・・・は回収して再使用する。
In this way, conductive particles 4゜4, .
After pushing ..., the conductive particles scattered 4゜4, ...
Conductive particles 4 that are sucked by vacuum suction, pushed into the insulating adhesive 3a, and held by the insulating adhesive 3a
,4. The conductive particles 4° 4, . . . excluding . . . are removed as shown in FIG. 4(e). Note that the removed conductive particles 4, 4°, . . . are collected and reused.

このようにして絶縁性接着剤3中に多数の導電性粒子4
,4.・・・を埋込んだ接合材3を形成した後は、前記
メツシュスクリーン5を撤去して、前記接合材3の上に
、LSIチップ10をその外部回路接続用端子11.1
1・・・を配線基板1面のLSIチップ接続用端子2a
 、 2a 、・・・と対応させて重ね、このLSIチ
ップ10と配線基板1とを相対的に押圧(例えばしSl
チップ10を加圧)して、LSIチップ10と配線基板
1の両方の端子11,2aを前記導電性粒子4により導
通接続させるとともに、この押圧状態で前記絶縁性接着
剤3aを硬化させてLSIチップ10を配線基板1に接
着接合する。
In this way, a large number of conductive particles 4 are contained in the insulating adhesive 3.
,4. After forming the bonding material 3 embedded with..., the mesh screen 5 is removed and the LSI chip 10 is placed on the bonding material 3 with its external circuit connection terminals 11.1.
1... is the LSI chip connection terminal 2a on one side of the wiring board.
, 2a, . . . , and press the LSI chip 10 and wiring board 1 relatively (for example, by
The chip 10 is pressurized) to electrically connect the terminals 11 and 2a of both the LSI chip 10 and the wiring board 1 through the conductive particles 4, and in this pressed state, the insulating adhesive 3a is cured to form an LSI The chip 10 is adhesively bonded to the wiring board 1.

なお、ここではLSIチップ10の接合方法について説
明したが、液晶表示パネル20も上記と同様な方法で接
合する。
Although the method for bonding the LSI chip 10 has been described here, the liquid crystal display panel 20 is also bonded in the same manner as described above.

なお、前記絶縁性接着剤3aは、常温硬化型のものでも
、一般にホットメルト型と呼ばれている熱可塑性接着剤
でも、熱硬化型のものでも、あるいはUVインク等でも
よく、絶縁性接着剤3aとして常温硬化型接着剤または
UVインクを使用する場合は、絶縁性接着剤3a中に導
電性粒子4゜4、・・・を埋込んで接合材3を形成した
後直ちに電子部品を接合するか、あるいは形成した接合
材3の上に剥離紙を被着して絶縁性接着剤3を自然硬化
しないように保護しておき、電子部品接合時に剥離紙を
剥がして直ちに電子部品を接合すればよい。また、絶縁
性接着剤3aとしてホットメルト型と呼ばれている熱可
塑性接着剤または熱硬化型接着剤を使用する場合は、接
合材3を形成した後に前層乾燥炉または赤外線等により
絶縁性接着剤3aを70〜130℃の温度で乾燥させて
おき、電子部品の接合時に、接合材3の上に電子部品を
重ねてブレス冶具または加圧ローラ等により100〜1
50℃の温度で加熱加圧すればよい。
The insulating adhesive 3a may be a room temperature curing type, a thermoplastic adhesive generally called a hot melt type, a thermosetting type, or a UV ink. When using a room temperature curing adhesive or UV ink as 3a, electronic components are bonded immediately after forming the bonding material 3 by embedding conductive particles 4゜4,... in the insulating adhesive 3a. Alternatively, a release paper may be placed on the formed bonding material 3 to protect the insulating adhesive 3 from naturally hardening, and the release paper may be peeled off when electronic components are bonded and the electronic components may be bonded immediately. good. In addition, when using a thermoplastic adhesive or thermosetting adhesive called a hot melt type as the insulating adhesive 3a, after forming the bonding material 3, the insulating adhesive is bonded using a drying oven or infrared rays for the previous layer. The agent 3a is dried at a temperature of 70 to 130°C, and when bonding electronic components, the electronic components are stacked on top of the bonding material 3 and the adhesive is heated at a temperature of 100 to 130°C using a press jig or pressure roller.
It may be heated and pressurized at a temperature of 50°C.

しかして、上記接合構造では、前記LSIチップ10や
液晶表示パネル20等の電子部品と配線基板1とを、絶
縁性接着剤3a中に導電性粒子4,4゜・・・を埋込ん
だ接合材3を介して接着接合しているから、電子部品と
配線基板1とを相対的に押圧して絶縁性接着剤3aを硬
化させるだけで配線基板1に電子部品をその両方の端子
を互いに導通接続させた状態で接合することができ、従
って、異方導電性接着剤によって電子部品を接着接合す
る方法と同程度の短い時間で能率よく電子部品を取付け
ることができる。また、この接合構造では、前記導電性
粒子4,4.・・・の最大径を、電子部品と配線基板1
との両方の端子のうち狭巾の端子の巾よりも小さくかつ
前記電子部品と前記配線基板1とのいずれの端子間隔よ
りも小さくし、かつこの導電性粒子4,4.・・・を、
前記狭巾端子の巾よりも小さい間隔で等間隔に絶縁性接
着剤3a中に埋込んでいるために、対応する全ての端子
間に少なくとも1つの導電性粒子4が必ず介在されるこ
とになり、従って、異方導電性接着剤を用いた場合のよ
うに導電性粒子の分布のばらつきにより導通不良部分が
発生することはないから、電子部品の各端子を配線基板
1の各端子に導通不良部分を生ずることなく確実に導通
接続することができる。
Therefore, in the above bonding structure, the electronic components such as the LSI chip 10 and the liquid crystal display panel 20 and the wiring board 1 are bonded by embedding conductive particles 4, 4°, etc. in the insulating adhesive 3a. Since the electronic components and the wiring board 1 are adhesively bonded via the material 3, the terminals of the electronic components and the wiring board 1 can be electrically connected to each other by simply pressing the electronic components and the wiring board 1 relatively and curing the insulating adhesive 3a. It is possible to bond the electronic components in a connected state, and therefore, it is possible to efficiently attach the electronic components in a time comparable to that of the method of adhesively bonding electronic components using an anisotropic conductive adhesive. Further, in this bonding structure, the conductive particles 4, 4. ..., the maximum diameter of electronic components and wiring board 1
The conductive particles 4,4. ···of,
Since they are embedded in the insulating adhesive 3a at regular intervals smaller than the width of the narrow width terminals, at least one conductive particle 4 is necessarily interposed between all the corresponding terminals. Therefore, unlike when an anisotropic conductive adhesive is used, poor continuity does not occur due to variations in the distribution of conductive particles, so there is no possibility of poor continuity between each terminal of the electronic component and each terminal of the wiring board 1. A reliable conductive connection can be made without causing any damage.

ざらに、上記接合方法では、配線基板1面に塗布した絶
縁性接着剤3aの上にメツシュスクリーン5を重ねてこ
のメツシュスクリーン5の上から導電性粒子4,4.・
・・を散布し、この導電性粒子4゜4、・・・のうちメ
ツシュスクリーン5の各開口5a。
Roughly, in the above bonding method, a mesh screen 5 is stacked on the insulating adhesive 3a applied to the surface of the wiring board 1, and the conductive particles 4, 4.・
. . , and conductive particles 4° 4, . . . are scattered at each opening 5a of the mesh screen 5.

5a、・・・内に入った導電性粒子4,4.・・・を絶
縁性接着剤3a中に押込んで接合材3を形成しているか
ら、前記絶縁性接着剤3a中の導電性粒子4゜4、・・
・の分布を確実に等間隔にすることができる。
5a, . . . Conductive particles 4, 4. Since the bonding material 3 is formed by pushing . . . into the insulating adhesive 3a, the conductive particles 4゜4, .
The distribution of ・can be ensured at equal intervals.

なお、上記実施例では、電子部品を接着接合する接合材
3を配線基板1側に形成しているが、この接合材3は第
5図に示すように電子部品例えばLSIチップ10の配
線基板接合面に形成してもよく、また、前記LSIチッ
プ10の外部回路接続用端子11.11.・・・は、第
2図に示したパッド部16aの上に金等をメッキしてバ
ンプ16bを形成した第5図に示すような構造としても
よい。
In the above embodiment, the bonding material 3 for adhesively bonding electronic components is formed on the wiring board 1 side, but as shown in FIG. Alternatively, the external circuit connection terminals 11.11. of the LSI chip 10 may be formed on the surface. . . may have a structure as shown in FIG. 5, in which bumps 16b are formed by plating gold or the like on the pad portion 16a shown in FIG. 2.

また、上記実施例では、配線基板1と電子部品の接合面
全体に接合材3を介在させているが、この接合材3は端
子配列部分にのみ介在させてもよく、さらに前記接合材
3は、配線基板1または電子部品に塗布する代わりに、
あらかじめシート状に成形しておいて配線基板1と電子
部品との間に挟み込むようにしてもよい。
Further, in the above embodiment, the bonding material 3 is interposed over the entire bonding surface between the wiring board 1 and the electronic component, but the bonding material 3 may be interposed only in the terminal arrangement portion. , instead of applying it to the wiring board 1 or electronic components,
It may be formed into a sheet shape in advance and sandwiched between the wiring board 1 and the electronic component.

〔発明の効果〕〔Effect of the invention〕

この発明によれば、絶縁性接着剤中に導電性粒子を埋設
した接合材を介して電子部品と配線基板とを接着接合し
ているから、異方導電性接着剤によって電子部品を接着
接合する方法と同程度の短い時間で能率よく電子部品を
配線基板に取付けることができるとともに、前記導電性
粒子の最大径を電子部品と配線基板との両方の端子のう
ち狭巾の端子の巾およびこの狭巾端子間の間隔よりも小
さくし、かつこの導電性粒子を、前記狭巾端子の巾より
も小さい間隔で等間隔に絶縁性接着剤中に埋込むことに
より、対応する全ての端子間に少なくとも1つの導電性
粒子が必ず介在されるようにしているから、異方導電性
接着剤を用いた場合における導電性粒子の分布のばらつ
きによる導通不良部分の発生をなくして、電子部品の各
端子を基板面の各端子に導通不良部分を生ずることなく
確実に導通接続することができる。
According to this invention, since electronic components and wiring boards are adhesively bonded via a bonding material in which conductive particles are embedded in an insulating adhesive, electronic components can be adhesively bonded using an anisotropic conductive adhesive. In addition to being able to efficiently attach electronic components to a wiring board in as short a time as the method, the maximum diameter of the conductive particles can be adjusted to the width of the narrower terminal of both the electronic component and the wiring board. By making the spacing between the narrow width terminals smaller than the width of the narrow terminals and embedding the conductive particles in an insulating adhesive at equal intervals smaller than the width of the narrow width terminals, Since at least one conductive particle is always interposed, it is possible to eliminate the occurrence of poor conduction due to variations in the distribution of conductive particles when using an anisotropic conductive adhesive, and to ensure that each terminal of an electronic component can be reliably electrically connected to each terminal on the board surface without causing electrical continuity defects.

【図面の簡単な説明】[Brief explanation of drawings]

第1図〜第4図はこの発明の一実施例を示したもので、
第1図は第3図のB−B線に沿う拡大断面図、第2図は
第1図のA−A線に沿う拡大断面図、第3図は配線基板
と電子部品の斜視図、第4図は電子部品の接合方法を工
程順に示す配線基板の端子配列線に沿う断面図である。 第5図はこの発明の他の実施例を示す配線基板と電子部
品の端子配列線に沿う断面図である。 1・・・配線基板、2・・・配線、2a・・・LSIチ
ップ接続用端子、2b・・・表示パネル接続用端子、3
・・・接合材、3a・・・絶縁性接着剤、4・・・導電
性粒子、5・・・メツシュスクリーン、5a・・・開口
、6・・・ローラ、10・・・LSIチップ、11・・
・外部回路接続用端子、20・・・液晶表示パネル、2
1・・・外部回路接続用端子。 出願人代理人 弁理士 鈴江武彦 第1図 (%3121)B−BaX大前ffoE2])第2図 第3図 (衝j泉基板と霞4印品の牟Hz!> 第4図 ポ  【0
Figures 1 to 4 show an embodiment of this invention.
Figure 1 is an enlarged cross-sectional view taken along the line B-B in Figure 3, Figure 2 is an enlarged cross-sectional view taken along the line A-A in Figure 1, Figure 3 is a perspective view of the wiring board and electronic components, FIG. 4 is a sectional view taken along a terminal arrangement line of a wiring board showing a method for joining electronic components in the order of steps. FIG. 5 is a sectional view taken along the terminal arrangement line of a wiring board and electronic components, showing another embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Wiring board, 2... Wiring, 2a... LSI chip connection terminal, 2b... Display panel connection terminal, 3
... Bonding material, 3a... Insulating adhesive, 4... Conductive particles, 5... Mesh screen, 5a... Opening, 6... Roller, 10... LSI chip, 11...
・External circuit connection terminal, 20...Liquid crystal display panel, 2
1...Terminal for external circuit connection. Applicant's representative Patent attorney Takehiko Suzue Figure 1 (%3121) B-BaX Omae ffoE2]) Figure 2 Figure 3 (The Hz of the shock-jumping board and the Kasumi 4-mark product!> Figure 4 Po [0

Claims (2)

【特許請求の範囲】[Claims] (1)配線基板との接合面に複数の外部回路接続用端子
を形成した電子部品を、前記電子部品の各端子と対応す
る複数の電子部品接続用端子を形成した配線基板面に直
接接合する電子部品の接合構造において、前記電子部品
と前記配線基板との接合面間に、絶縁性接着剤中に最大
粒子の粒径が前記電子部品と前記配線基板との両方の端
子のうち狭巾の端子の巾よりも小さくかつ前記電子部品
と前記配線基板とのいずれの端子間隔よりも小さい多数
の導電性粒子を前記狭巾端子の巾よりも小さい間隔で等
間隔に埋込んだ接合材を介在させ、前記電子部品と前記
配線基板との両方の端子を前記導電性粒子を介して導通
させるとともに、前記電子部品と前記配線基板とを前記
絶縁性接着剤により接着接合したことを特徴とする電子
部品の接合構造。
(1) An electronic component with a plurality of external circuit connection terminals formed on the surface to be bonded to the wiring board is directly bonded to a wiring board surface with a plurality of electronic component connection terminals formed thereon corresponding to each terminal of the electronic component. In the bonding structure of electronic components, the largest particle size in the insulating adhesive is between the bonding surfaces of the electronic component and the wiring board, and A bonding material is interposed in which a large number of conductive particles smaller than the width of the terminal and smaller than the spacing between any of the terminals of the electronic component and the wiring board are embedded at equal intervals smaller than the width of the narrow terminal. the terminals of the electronic component and the wiring board are electrically connected through the conductive particles, and the electronic component and the wiring board are adhesively bonded using the insulating adhesive. Joint structure of parts.
(2)配線基板との接合面に複数の外部回路接続用端子
を形成した電子部品を、前記電子部品の各端子と対応す
る複数の電子部品接続用端子を形成した配線基板面に直
接接合する電子部品の接合方法において、前記電子部品
と前記配線基板との接合面の一方に絶縁性接着剤を塗布
した後、この絶縁性接着剤上に、前記電子部品と前記配
線基板との両方の端子のうち狭巾の端子の巾よりも小さ
くかつ前記電子部品と前記配線基板とのいずれの端子間
隔よりも小さい多数の開口を前記狭巾端子の巾よりも小
さい間隔で等間隔に形成したメッシュスクリーンを重ね
て、その上から導電性粒子を散布し、この導電性粒子の
うち前記メッシュスクリーンの各開口に入つた導電性粒
子を前記絶縁性接着剤中に押込んで前記絶縁性接着剤中
に多数の導電性粒子を等間隔に埋込み、この後前記電子
部品と前記配線基板とを重ねて相対的に押圧して前記電
子部品と前記配線基板とを接着接合することを特徴とす
る電子部品の接合方法。
(2) An electronic component having a plurality of external circuit connection terminals formed on the surface to be bonded to the wiring board is directly bonded to a wiring board surface having a plurality of electronic component connection terminals formed thereon corresponding to each terminal of the electronic component. In the method for bonding electronic components, after applying an insulating adhesive to one of the bonding surfaces of the electronic component and the wiring board, terminals of both the electronic component and the wiring board are coated on the insulating adhesive. a mesh screen in which a large number of openings smaller than the width of the narrower terminals and smaller than any terminal spacing between the electronic component and the wiring board are formed at equal intervals smaller than the width of the narrower terminals; The conductive particles that have entered each opening of the mesh screen are pushed into the insulating adhesive to form a large number of conductive particles in the insulating adhesive. embedding conductive particles at regular intervals, and then stacking the electronic component and the wiring board and pressing them relatively to adhesively join the electronic component and the wiring board. Method.
JP60033948A 1985-02-22 1985-02-22 How to join electronic components Expired - Lifetime JPH0779192B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60033948A JPH0779192B2 (en) 1985-02-22 1985-02-22 How to join electronic components

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60033948A JPH0779192B2 (en) 1985-02-22 1985-02-22 How to join electronic components

Publications (2)

Publication Number Publication Date
JPS61194796A true JPS61194796A (en) 1986-08-29
JPH0779192B2 JPH0779192B2 (en) 1995-08-23

Family

ID=12400727

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60033948A Expired - Lifetime JPH0779192B2 (en) 1985-02-22 1985-02-22 How to join electronic components

Country Status (1)

Country Link
JP (1) JPH0779192B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10461063B2 (en) 2013-12-02 2019-10-29 Toshiba Hokuto Electronics Corporation Light-emitting device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001184618A (en) * 1999-12-24 2001-07-06 Hitachi Ltd Magnetic disk device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5121192A (en) * 1974-08-14 1976-02-20 Seikosha Kk DODENSEISETSU CHAKUSHIITO

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5121192A (en) * 1974-08-14 1976-02-20 Seikosha Kk DODENSEISETSU CHAKUSHIITO

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10461063B2 (en) 2013-12-02 2019-10-29 Toshiba Hokuto Electronics Corporation Light-emitting device
US10734365B2 (en) 2013-12-02 2020-08-04 Toshiba Hokuto Electronics Corporation Light-emitting device

Also Published As

Publication number Publication date
JPH0779192B2 (en) 1995-08-23

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