JPS61189731A - Discrete value counting circuit - Google Patents

Abstract

PURPOSE:To simplify the constitution and to increase the operating speed of a descrete value counting circuit by adding in parallel the designated addition value for each generation of a clock pulse and outputs the descrete value. CONSTITUTION:An additional value generating part 4 outputs the designated addition value N in the form of an n-bit parallel signal. A count clock generating circuit 5 produces successively the pulse signals which decide the additional timing of the additional value. A register 6 holds an input signal for each supply of a clock pulse produced from the circuit 5 and outputs this holding data as the count result of the n-bit descrete value. Thus the register 6 reads out the contents of a memory 3 to supply them as address signals. An adder 7 adds the n-bit addition value outputted from an additional value generating part 4 and the n-bit output signal of the register 6 in parallel to each other and supplies this added result to the register 6 in the form of an n-bit signal. The count result of the descrete value is changed instantaneously every designated additional value every time a clock pulse is produced from the circuit 5. Thus a high-speed operation of a descrete value counting circuit is always secured regardless of the designated additional value N.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a discrete value counting circuit that outputs arbitrary discrete values, and particularly relates to a discrete value counting circuit that can perform addition processing of a predetermined addition value at high speed. be.

[Blind Technique]

A discrete value counting circuit obtains a discrete value that sequentially changes by N values by sequentially counting arbitrary added values N, and is necessary, for example, when specifying a memory address. .

In other words, if you want to specify every memory address t-5, you will need discrete values that change like 5, 10.15, etc., and in this case, the discrete values will be added. value N
=5 is repeatedly added.

FIG. 2 is a circuit diagram showing an example of a conventionally commonly used discrete value counting circuit, in which the count clock generation circuit 1
and a binary counter 2 that counts its output clock pulses. Then, the count clock generation circuit 1 generates clock pulses of a number equal to a predetermined addition value N as a block unit, that is, when N is 5, 5 clock pulses as 1 block. It has a special configuration so that clock pulses are generated sequentially for each unit. Therefore, by sequentially counting the clock pulses supplied from the count clock generation circuit 1 as a block-by-block serial signal, the binary counter 2 can obtain a discrete value having a change point for each addition value N. Become. The count value of the binary counter 2 is supplied to the memory 3 as an n-bit address signal, so that the memory address is specified in a state where it is skipped sequentially for each addition value N. The contents of the specified address portion will be read.

[Problems that EJA is trying to solve] However,
In the discrete value counting circuit having the above configuration, it is necessary to sequentially send out clock pulses of the number matching the specified addition value N from the count clock generation circuit 1 as a block. The configuration becomes extremely complicated. Also, binary
Since the counter 2 sequentially counts the number of clock pulses that match the added value N, the specified added value N
Since the counting time also increases as the value of increases, there are various problems such as the inability to achieve high-speed operation.

[Means for solving problems]

Therefore, the discrete value counting circuit according to the present invention includes an addition value generation section that outputs an arbitrary addition value N as parallel data;
A count clock generation circuit that generates clock pulses that determine counting timing, a register that holds and outputs a new count value every time a clock pulse is output from this count clock generation circuit, and an output signal of this register. and an adder that adds the sum and the sum output from the sum value generator and supplies the result to the register.

[For production]

In the discrete value counting circuit configured in this way, a new count value is obtained by adding the addition value to the count output value in parallel, and this calculation result is held in a register every time a clock pulse occurs. Since the content held in this register is output as a discrete value counting result, it is possible to always count in units of discrete values each time a clock pulse occurs, regardless of the value of the addition value N. Speed is increased. Further, since the count clock generation circuit is used simply to determine the counting timing, a simple pulse oscillation circuit that generates a pulse signal at a predetermined period may be sufficient.

〔Example〕

FIG. 1 is a block diagram showing an embodiment of a discrete value counting circuit according to the present invention. In the figure, numeral 4 is an addition value generation unit that outputs a specified addition value N as an n-bit parallel signal, and 5 is a count clock generation circuit, which sequentially generates pulse signals that determine the timing of addition of the addition value. . 6 is a register, and the count clock generation circuit 5
The input signal is held each time a clock pulse generated from the input signal is supplied, and this held data is outputted as an n-bit discrete value counting result to be supplied to the memory 3 as a read address signal. 7 is an adder, which combines the n-bit addition value N output from the addition value generation unit 4 and D of the register 6.
The bit-configured output signals are added in parallel, and the addition result is supplied to the register 6 as an n-bit signal.

In the discrete value counting circuit configured in this way.

When a start button (not shown) is operated, the contents held in the register 6 are reset and its output value becomes zero. Here, the addition value generating section 4 sends the prespecified addition value N to the adder 7.
continues to supply input boat B. As a result, since the data supplied from the register 6 to the input port A is zero, the adder 7 supplies the added value N itself to the input end of the register 6 as the addition result.

Next, when the count clock generation circuit 5 generates the first clock pulse, the register 6 takes in and holds the added value N as input data, and reads out the added value N, which is the held data, to the memory 3. Provide it as an address. Further, since the output data of this register 6 is returned to the input port of the adder 7, the addition value N is added again to obtain the addition result d2N. and,
The addition output 2N of the adder 7 is supplied to the input end of the register 6 as an n-bit parallel signal.

Here, when the second clock pulse is generated from the count clock generation circuit 5, the register 6 captures and holds the addition output 2N supplied from the adder 7, and also stores this newly held data 2N. It is supplied to the memory 3 as address data. Furthermore, since the output signal 2N of the register 6 is returned to the input port A of the adder 7, it is added to the addition value N supplied from the addition value generating section 4 to the input port B of the addition 57, and is added to the addition value N supplied to the input port B of the addition 57. The addition output of 7 becomes 3N. The output signal 3N of the adder 7 is held in the register 6 by the third clock signal generated from the count clock generation circuit 5, and the held content 3N is supplied to the memory 3 as an address signal. .

By repeating such operations, a discrete value is obtained from the register 6, which increases by the addition value N each time a clock pulse is supplied. In other words, if N is 5, a discrete value that changes as 5, 10, 15.20, etc. is obtained, so by supplying this discrete value to the memory 3 as an address signal, , the contents stored in five consecutive addresses are sequentially read out. In this case, the change in the specified addition value unit of the discrete value counting result is instantaneously performed every time a clock pulse is generated from the count clock generation circuit 5, so it is always fast regardless of the specified addition value N. It becomes an action.

In the above embodiment, a case has been described in which a discrete value that counts up by a width of N is obtained by sequentially adding the addition value Nt. Discrete values will be obtained. Further, although the addition operation is started after resetting the register 6, by presetting an arbitrary value in the register 6, a discrete value that changes from this preset value can be obtained.

〔Effect of the invention〕

As explained above, in the discrete value counting circuit according to the present invention, the specified addition value is added in parallel every time a clock pulse occurs and a discrete value is output, so the count clock generation circuit simply Since it is only necessary to generate the clock pulse that determines the addition timing, the configuration is greatly simplified compared to the conventional one. In addition, in this invention, since the specified addition value is added in parallel every time a clock pulse occurs, the addition is always instantaneously performed regardless of the value of the addition value N, compared to the conventional method. It has various excellent effects such as being able to significantly increase speed.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of a discrete value counting circuit according to the present invention, and FIG. 2 is a block diagram showing an example of a conventional discrete value counting circuit. 4... Addition value generation section, 5... Count clock generation circuit, 6... Register, 7... Adder.

Claims (1)

[Claims] (1) An addition value generation circuit that generates an arbitrary addition value, a clock pulse generation circuit that generates a clock pulse that determines the counting timing of discrete values, and a new A register that holds and outputs a counted value, and an adder that adds the added value output from the added value generating circuit and the output signal of the register and supplies the result to the input end of the register. Discrete value counting circuit.