JPH05191222A - Phase variable pulse generator - Google Patents

Abstract

PURPOSE:To prevent the circuit scale from being increased even when a variable bit range of phase difference data is wider by adding the phase difference data to a count of a counter. CONSTITUTION:A count outputted from a counter 1 to a signal path 2 is inputted to an adder 3. Phase difference data are inputted from a signal path 4 to the adder 3 and the phase difference data are added to the count from the counter 1. Then the count added with the result of addition, that is, the phase difference is outputted from the adder 3 to a decoder 6 via a signal path 5. The decoder 6 receives the count with the phase difference added thereto, a pulse based on the count is generated and sent to a signal path 7. When phase difference data given to the adder 3 are changed, the phase difference of the count received by the decoder 6 is changed and the phase of the pulse sent from the decoder 6 is changed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase variable pulse generating circuit capable of generating a pulse having an arbitrary phase difference with respect to a count value of a counter by giving arbitrary phase difference data.

[0002]

2. Description of the Related Art FIG. 2 shows a conventionally known phase variable pulse generation circuit. This example shows a circuit configuration when the variable bit range of the phase difference data is M bits (M is a positive integer). In this figure, the counter 11 sends the count values to the M decoders 12, 12, .... The first decoder 12, the second decoder 12,
The Mth decoder 12 receives the count values and generates M kinds of pulses having different phase differences. The 1 / M selector 13 receives the M kinds of pulses, selects one pulse from the M kinds of pulses according to the phase difference data sent from the reception path 14, and sends it to the signal path 15.

[0003]

In the conventional phase variable pulse generating circuit described above, when the variable bit range of the phase difference data is M bits, M decoders 12 are required and the variable bit range is widened. There has been a problem that the circuit scale increases as M increases.

The present invention has been proposed in order to solve the problems of the prior art, and provides a phase variable pulse generation circuit that does not increase the circuit scale even if the variable bit range is widened. With the goal.

[0005]

To achieve this object, a phase variable pulse generating circuit according to the present invention includes a counter for outputting a count value and an addition for adding arbitrary phase difference data to the count value from the counter. And a decoder that generates a pulse based on the addition result of this adder. By changing the phase difference data, the decoder can generate a pulse having an arbitrary phase difference with respect to the count value of the counter. It is as a configuration.

[0006]

According to the above configuration, the count value added with the phase difference is supplied to the decoder. Therefore, by changing the phase difference data, the decoder has an arbitrary phase difference with respect to the count value. Can generate pulses.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Specific embodiments of the phase variable pulse generating circuit according to the present invention will be described below in detail with reference to the drawings. Figure 1
An example of this phase variable pulse generation circuit is shown in the block diagram of FIG. In this figure, the count value output from the counter 1 to the signal path 2 is input to the adder 3. The phase difference data is input to the adder 3 from the signal path 4, and the phase difference data is added to the count value from the counter 1.

From the adder 3, the addition result, that is, the count value to which the phase difference is added, is passed through the signal path 5 to the decoder 6
Is output to. The decoder 6 receives the count value to which the phase difference is added, generates a pulse based on this count value, and sends it to the signal path 7.

Here, if the phase difference data input to the adder 3 is changed, the phase difference of the count value received by the decoder 6 changes, and the phase of the pulse transmitted by the decoder 6 can be changed.

It should be noted that the present invention is not limited to the above-mentioned embodiments, and various modifications can be made within the scope of the invention.

[0011]

As described above, according to the present invention, by adding the phase difference data to the count value of the counter,
Even if the variable bit range of the phase difference data is widened, it is not necessary to prepare a decoder for the number of bits as in the conventional case, and it is possible to prevent an increase in circuit scale.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a phase variable pulse generation circuit according to the present invention.

FIG. 2 is a block diagram showing a conventional phase variable pulse generation circuit.

[Explanation of symbols]

 1 counter 2 signal path 3 adder 4 signal path 5 signal path 6 decoder 7 signal path

Claims (1)

[Claims] 1. A counter having a counter for outputting a count value, an adder for adding arbitrary phase difference data to the count value from the counter, and a decoder for generating a pulse based on a result of addition by the adder. A phase variable pulse generator characterized in that a pulse having an arbitrary phase difference with respect to a count value of a counter can be generated by changing the phase difference data.