JP2716282B2 - Switching circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a switching circuit having a redundant configuration, and more particularly to a switching circuit for an output signal.

[0002]

2. Description of the Related Art Conventionally, this type of switching circuit has a configuration as shown in FIG. In FIG. 3, the signal A input to the input terminal 11 and the signal B input to the input terminal 12 are selected by the selector circuit 13 operated by the switching signal C input from the input terminal 15, and are output to the output terminal 14 as output signals. Output.

[0003]

In the above-described conventional switching circuit, as shown in FIG.
There is a disadvantage that the number of pulses of the output signal changes depending on the timing of the switching signal C.

An object of the present invention is to prevent the number of pulses of an output signal from being changed by the timing of a switching signal.

[0005]

In order to achieve the above object, the present invention divides a signal source A into a signal A and a signal A.
And a first signal and timing signal generating circuit for outputting a timing signal A having a sufficient phase difference, and a signal source B.
And a second signal and timing signal generation circuit for outputting a signal B, a timing signal B having a sufficient phase difference with the signal B, and a switching signal C, the timing signal A or the timing signal
Latch Circuit Latching Using Triggering Signal B as Trigger
And a selector circuit for selecting the signal A or the signal B according to the output signal of the latch result output from the latch circuit .

[0006]

Next, the present invention will be described with reference to the drawings. FIG. 1 is a block diagram of one embodiment of the present invention.
When the source signal A is input to the signal input terminal 1, the signal A and the timing signal A are output by the first signal and timing signal generation circuit 3, and when the source signal B is input to the signal input terminal 2, The signal B and the timing signal B are output by the second signal and timing signal generation circuit 4. When the switching signal C is input to the switching signal input terminal 5, the switching signal C is latched by the latch circuit 6 at the timing of the timing signal A or the timing signal B. Latch circuit 6
Operates the selector circuit 7 to select the signal A or the signal B and outputs it to the signal output terminal 8.

FIG. 2 is a time chart showing the above operation.

[0008]

As described above, according to the present invention, since the switching signal C is latched and used by the timing signal A or the timing signal B, the pulse number of the output signal output from the selector circuit does not change. Has an effect.

[Brief description of the drawings]

FIG. 1 is a block diagram of one embodiment of the present invention.

FIG. 2 is a time chart showing the operation of the embodiment of the present invention.

FIG. 3 is a diagram showing a conventional switching circuit.

FIG. 4 is a time chart showing the operation of the conventional switching circuit.

[Explanation of symbols]

 1, 2 signal input terminals 3 first signal and timing signal generation circuit 4 second signal and timing signal generation circuit 5 switching signal input terminal 6 latch circuit 7 selector circuit 8 signal output terminal

Claims (1)

(57) [Claims] 1. A signal source A is divided to generate a signal A and a signal A.
First to output a timing signal A having a sufficient phase difference
Signal and timing signal generation circuit and signal source B
Then, a signal B, a second signal and a timing signal generating circuit for outputting a timing signal B having a sufficient phase difference from the signal B, and a switching signal C are converted into a timing signal A or a timing signal.
A latch circuit that latches the triggering signal B as a trigger,
A selector circuit for selecting a signal A or a signal B according to an output signal of a latch result output from the latch circuit.