JPS61185100U - - Google Patents

Info

Publication number
JPS61185100U
JPS61185100U JP6058486U JP6058486U JPS61185100U JP S61185100 U JPS61185100 U JP S61185100U JP 6058486 U JP6058486 U JP 6058486U JP 6058486 U JP6058486 U JP 6058486U JP S61185100 U JPS61185100 U JP S61185100U
Authority
JP
Japan
Prior art keywords
output
input
synthesizing
delay means
filter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6058486U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP6058486U priority Critical patent/JPS61185100U/ja
Publication of JPS61185100U publication Critical patent/JPS61185100U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の実施例を示すブロツク図、第
2図は第1図の動作を説明するための概略タイミ
ングチヤートである。 主要部分の符号の説明、1,2……加算器、3
〜5……遅延回路、6〜8……フイルタ。
FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a schematic timing chart for explaining the operation of FIG. 1. Explanation of the symbols of the main parts, 1, 2...adder, 3
~5...Delay circuit, 6~8...Filter.

Claims (1)

【実用新案登録請求の範囲】 (1) 縦続接続された複数の遅延手段と、それぞ
れ異なる通過周波数帯域を有し、各通過中心周波
数が順次低くなつた第1乃至第Nのフイルタと、
前記フイルタの各出力と所定入力信号とを合成し
て前記縦続接続された遅延手段の初段入力へ印加
する合成手段と、前記入力信号と前記遅延手段の
最終段の出力とを合成して出力する出力手段とを
含み、前記第1乃至第Nのフイルタの各入力に順
次前記遅延手段の初段に近いほうの出力をそれぞ
れ印加したことを特徴とする残響付加装置。 (2) 前記フイルタの各出力は夫々減衰手段を介
して前記合成手段の各入力に印加されていること
を特徴とする実用新案登録請求の範囲第1項記載
の残響付加装置。 (3) 前記遅延手段の出力はそれぞれ減衰手段を
介して前記フイルタの各入力に印加されているこ
とを特徴とする実用新案登録請求の範囲第1項記
載の残響付加装置。
[Claims for Utility Model Registration] (1) A plurality of cascade-connected delay means, first to Nth filters each having a different passing frequency band and each passing center frequency decreasing sequentially;
a synthesizing means for synthesizing each output of the filter and a predetermined input signal and applying the synthesized signal to the first stage input of the cascaded delay means; and synthesizing and outputting the input signal and the output of the final stage of the delay means. 1. A reverberation adding apparatus, comprising: an output means, and an output of the delay means closer to the first stage is sequentially applied to each input of the first to Nth filters. (2) The reverberation adding apparatus according to claim 1, wherein each output of the filter is applied to each input of the synthesizing means via attenuation means. (3) The reverberation adding device according to claim 1, wherein the output of the delay means is applied to each input of the filter via attenuation means.
JP6058486U 1986-04-22 1986-04-22 Pending JPS61185100U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6058486U JPS61185100U (en) 1986-04-22 1986-04-22

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6058486U JPS61185100U (en) 1986-04-22 1986-04-22

Publications (1)

Publication Number Publication Date
JPS61185100U true JPS61185100U (en) 1986-11-18

Family

ID=30588069

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6058486U Pending JPS61185100U (en) 1986-04-22 1986-04-22

Country Status (1)

Country Link
JP (1) JPS61185100U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5157149A (en) * 1974-11-14 1976-05-19 Sony Corp

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5157149A (en) * 1974-11-14 1976-05-19 Sony Corp

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