JPS63256009A - Tone control circuit - Google Patents

Abstract

PURPOSE:To adjust independently the gain of each frequency band by connecting FIR (finite impulse response) low pass filters having a linear phase in cascade, dividing each pass band into, e.g., four frequency bands so as to apply tone adjustment to each band thereby eliminating the phase distortion. CONSTITUTION:After a signal from the FIR filter 1 is retarded by a delay circuit 6, the result is fed to an arithmetic circuit 9, the output of the filter 2 is subtracted from the signal so as to generate a signal of the frequency band shown in figure (i). After the signal is adjusted to have a desired gain by a control circuit 12, the result is fed to a delay circuit 17. The delay circuit 17 corresponds to the delay time of the filter 15b and signals are added by an adder circuit 19 in matching with the timing of the signal from the filter 15b. A signal of a band below the frequency fs/4 as shown in figure (k) is obtained at the set gain by the addition. Since the FIR filter used above has no phase distortion, the signal with fidelity to the original sound is reproduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a tone control circuit in the field of digital audio and the like.

[Prior Art] Conventional tone control circuits such as graphic equalizers are based on resonance circuits and are constructed by combining them.

In addition, in a device that performs filter calculation at the stage of digital data, a similar configuration in principle is realized by a combination of IIR (infinite impulse response) filters.

[Problems to be Solved by the Invention] In the above-mentioned device, phase distortion occurs as the frequency characteristics change, and this phase distortion deteriorates the sound quality. With recent advances in audio technology, it has become possible to reproduce even more faithful original sounds, and phase distortion is becoming a problem that cannot be ignored.

Furthermore, since the gains of each frequency band adjusted by each volume influence each other, the position of the volume cannot be directly interpreted as a change in frequency characteristics, making setting difficult.

The present invention is such that there is no phase distortion and the gain of each frequency band can be adjusted independently.

[Means for solving the problem] The present invention connects FIR (finite impulse response) low-pass filters having a linear phase in cascade, delays the input signal of each FIR low-pass filter, and extracts the signal from the delayed signal. FIR
Signals in a plurality of desired frequency bands are selected by subtracting the output of the low-pass filter, and after passing through a control circuit that adjusts the gain of each signal, the signals are added and output, and the desired FIR A decimation circuit is provided after the low-pass filter to thin out the signal, thereby reducing the number of arithmetic operations.

[Example] In FIG. 1, 1 to 3 are cascade-connected FIR (finite impulse response) low-pass filters with linear phase;
In this example, each passband is set as follows. For example, let the sampling frequency f be 44KHz,
f/2~f/S
S
S4, f/4 to f/8. f/8~
f /16゜s s
s s
It is divided into four frequency bands from f/16 to f/0, and tone adjustment is performed for each band. Therefore, the filter used is one that attenuates at frequencies above f/4, the filter 2 uses one that attenuates at frequencies above f/8, and the filter 3 uses one that attenuates at frequencies above f/16. 4 is a decimation circuit that decimates every other input signal. Delay circuits 5 to 7 have their respective delay times matched with the delay times of filters 1 to 3.

Numerals 8 to 10 are arithmetic circuits that perform subtraction, and 11 to 14 are control circuits that adjust gain, which are configured by multiplication circuits. 15 is an interpolation circuit with a frequency f
It consists of a switching circuit 15a that is switched at 1500 kHz and an FIR low-pass filter 5b that has a linear phase. 16 and 17 are delay circuits having a delay time corresponding to the delay time of the filter 5b, and 18 to 20 are adder circuits.

Next, the operation will be explained. The input terminal S1n has a second
An input signal having a frequency spectrum as shown in FIG. g is supplied, and this is attenuated by a filter to generate a signal having a frequency spectrum as shown in FIG. This signal further passes through the filter 2 and becomes a signal with a frequency spectrum as shown in FIG. 2C. This signal is decimated every other signal by the decimation circuit 4, and the output thereof generates a signal to which aliasing noise (shaded area) is newly added as shown in FIG. 2d. Since the number of data in this signal is halved, the order of filter 3 in the next stage can be halved.
The number of filter operations can be halved. This signal further passes through a filter 3 to generate a signal with a frequency spectrum as shown in FIG. 2e.

The signal shown in FIG. 2e from the filter 3 is supplied to the adder circuit 20 after its gain is appropriately adjusted by the control circuit 14.

On the other hand, the signal from the decimation circuit 4 is delayed by the delay circuit 7 and then passed through the arithmetic circuit 10 to the filter 3.
The difference between the output from the oscilloscope and the output from the oscilloscope is taken, and a signal in the frequency band shown in FIG. 2f is generated. The gain of this signal is adjusted by the control circuit 13 and supplied to the adder circuit 2'0, where it is added to the signal from the control circuit 14 to obtain the signal shown in FIG. 2g. Since this added signal is thinned out every other signal, it is necessary to interpolate this thinned out signal. This interpolation is performed by the interpolation circuit 15. That is, the switching circuit 15a
As a result, data 0 is inserted between the signals from the adder circuit 20, and then interpolated into a double signal by passing through the filter 15b, and the aliasing noise component shown in FIG. 2d is removed. Therefore, as shown in the second diagram, signals in the frequency band below f/8 are transmitted to the control circuit 13°14.
The signal is generated with a gain set by , and is supplied to the adder circuit 19 .

On the other hand, the signal from the filter is delayed by a delay circuit 6 and then supplied to an arithmetic circuit 9, and the output of the filter 2 is subtracted from this signal to generate a signal in the frequency band shown in FIG. 3i. After this signal is adjusted to a desired gain by the control circuit 12, it is supplied to the delay circuit 17. The delay circuit 17 is made to correspond to the delay time of the filter 15b, and addition is performed in the adder circuit 19 in synchronization with the signal from the filter 15b. By this addition, a signal in a frequency band of f/4 or less is obtained with a set gain as shown in FIG.

The signal from the terminal SIn and the signal from the filter 1 are also calculated by the calculation circuit 8 in the same manner as described above, and a signal in the band shown in FIG. 3j is obtained. The gain of this signal is also adjusted by the control circuit 11, the timing is determined by the delay circuit 16, the signal is supplied to the adder circuit 18, and is added to the signal from the adder circuit 19.

In this way, as shown in FIG. 3, signals with set gains are obtained in four frequency bands divided in advance.

Since the FIR filter used above has no phase distortion, it can reproduce a signal that is faithful to the original sound. Moreover, gain adjustment can be performed independently for each frequency band, and there is no mutual influence.

Furthermore, in the above example, since the signal is halved using the decimation circuit, the order of the subsequent FIR filter can be halved, and the number of calculations can be halved.

Therefore, in the low frequency band where one period of the signal is long and the number of samples is large, the number of calculations of the FIR filter increases, so it is particularly effective in reducing the number of calculations in this low frequency band. .

Although the above example describes an example in which the frequency band is divided into four, the frequency band is not limited to this, and any division is possible. For example, FIG. 4 shows a circuit configuration when the frequency band is divided into six frequency bands.

In the figure, a decimation circuit is provided at each stage from the second stage onwards, to reduce the number of filter calculations at the subsequent stages. An interpolation circuit is provided corresponding to each decimation circuit, and interpolation is performed in the same manner as in the previous embodiment.

Note that the thinning in the decimation circuit is not limited to every other circuit as described above, but it is also possible to use one every n (n-"3.4...). However, in this case, It is necessary that the signal spectrum at is limited to 1/2n of the data frequency or less.

[Effects of the Invention] According to the present invention, since the tone control circuit is constituted by an FIR low-pass filter having a linear phase, a tone control circuit without phase distortion can be obtained, and faithful reproduction of the original sound becomes possible. Furthermore, the gain at the center frequency of each frequency band does not affect other bands, and the gain can be adjusted independently for each band.

Furthermore, by thinning out the signals using a decimation circuit, the number of calculations in subsequent stages can be reduced, and the tone control circuit can be configured with a sufficiently practical number of calculations.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing one embodiment of the present invention, Figs. 2 and 3 are explanatory diagrams showing signal spectra in each part of Fig. 1, and Fig. 4 is a block diagram showing another embodiment. It is. 1-3... FIR low-pass filter 4... Decimation circuit 5-7... Delay circuit 8-10... Arithmetic circuit 11-14... Control circuit 15... Interpolation circuit 18 ~20...addition circuit or more

Claims (2)

[Claims] (1) FIR with linear phase supplied with input signal
(Finite Impulse Response) A delay circuit in which multiple stages of low-pass filters are connected in cascade and delays the input signal of each of the FIR low-pass filters by the amount of delay caused by each of the FIR low-pass filters, and the output of each of the delay circuits. and the corresponding F
an arithmetic circuit that calculates the difference between the output of the IR low-pass filter;
a control circuit that controls the gain of the output of each arithmetic circuit;
A tone control circuit comprising an adder circuit that adds the outputs of each control circuit. (2) FIR with linear phase supplied with input signal
(Finite Impulse Response) Multiple stages of low-pass filters are connected in cascade, and the desired FIR low-pass filter and the next stage FIR
A decimation circuit provided between the FIR low-pass filter and the input signal of each FIR low-pass filter is connected to the FIR low-pass filter.
A delay circuit that delays the delay by the IR low-pass filter, an arithmetic circuit that takes the difference between the output of each delay circuit and the output of the corresponding FIR low-pass filter, and the gain of the output of each arithmetic circuit. an adder circuit that adds the outputs of the respective control circuits; and an interpointer that receives the signal added by the adder circuit based on the signal thinned out by the decimator circuit and interpolates this signal. Tone control circuit consisting of a ration circuit.