JPS6199199U - - Google Patents

Info

Publication number
JPS6199199U
JPS6199199U JP18082984U JP18082984U JPS6199199U JP S6199199 U JPS6199199 U JP S6199199U JP 18082984 U JP18082984 U JP 18082984U JP 18082984 U JP18082984 U JP 18082984U JP S6199199 U JPS6199199 U JP S6199199U
Authority
JP
Japan
Prior art keywords
outputs
receiving
delay circuits
adder
pass filters
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP18082984U
Other languages
Japanese (ja)
Other versions
JPH0423280Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP18082984U priority Critical patent/JPH0423280Y2/ja
Publication of JPS6199199U publication Critical patent/JPS6199199U/ja
Application granted granted Critical
Publication of JPH0423280Y2 publication Critical patent/JPH0423280Y2/ja
Expired legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例を示すブロツク図、
第2図は本考案の一実施例における周波数特性図
、第3図は本考案の一実施例の作用を示す特性図
、第4図は従来の残響生成装置のブロツク図、第
5図は従来の残響生成装置の作用を示す特性図で
ある。 2…加算器、3,4,6a,…6d…オールパ
スフイルタ、5a,…5d…遅延回路。
FIG. 1 is a block diagram showing an embodiment of the present invention.
Fig. 2 is a frequency characteristic diagram of an embodiment of the present invention, Fig. 3 is a characteristic diagram showing the operation of an embodiment of the invention, Fig. 4 is a block diagram of a conventional reverberation generation device, and Fig. 5 is a conventional reverberation generation device. FIG. 3 is a characteristic diagram showing the action of the reverberation generating device of FIG. 2... Adder, 3, 4, 6a,...6d... All pass filter, 5a,...5d... Delay circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 音声信号をA/D変換した信号をそれぞれに入
力信号とする複数の遅延回路と、該遅延回路の出
力をそれぞれ入力する複数のオールパスフイルタ
と、前記各オールパスフイルタの出力を加算する
加算器と、該加算器の出力を入力とする他のオー
ルパスフイルタとを備えたことを特徴とする残響
生成装置。
a plurality of delay circuits each receiving an A/D converted audio signal as an input signal; a plurality of all-pass filters receiving the outputs of the delay circuits; and an adder adding the outputs of the all-pass filters; A reverberation generation device characterized by comprising another all-pass filter that receives the output of the adder as an input.
JP18082984U 1984-11-30 1984-11-30 Expired JPH0423280Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18082984U JPH0423280Y2 (en) 1984-11-30 1984-11-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18082984U JPH0423280Y2 (en) 1984-11-30 1984-11-30

Publications (2)

Publication Number Publication Date
JPS6199199U true JPS6199199U (en) 1986-06-25
JPH0423280Y2 JPH0423280Y2 (en) 1992-05-29

Family

ID=30738386

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18082984U Expired JPH0423280Y2 (en) 1984-11-30 1984-11-30

Country Status (1)

Country Link
JP (1) JPH0423280Y2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02300795A (en) * 1989-05-15 1990-12-12 Yamaha Corp Musical sound synthesizer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02300795A (en) * 1989-05-15 1990-12-12 Yamaha Corp Musical sound synthesizer

Also Published As

Publication number Publication date
JPH0423280Y2 (en) 1992-05-29

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