JPS61177095A - Processing circuit of digital video signal - Google Patents

Abstract

PURPOSE:To attain electronic edition considering the color framing of a digital composite video signal easily and to obtain the processing circuit of a digital video signal which can be easily reproduced through a monitor on the basis of analog conversion. CONSTITUTION:A pulse generated from a timing generator 5 is supplied to an address generator 6 and an address signal is supplied to a ROM7 and a video RAM8. On the basis of a reading enable signal from the timing generator 5, a signal section alpha between a regulated horizontal synchronizing signal digitized by the ROM7 and regulated burst signals inverted in each line and having reverse phased each other between the 1st and 4th fields or between the 1st and 4th fields and between the 2nd and 3rd fields and the signal section betaof an output digital video signal outputted from the video RAM8 are alternately read out and outputted to an output terminal 10.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a digital video signal processing circuit suitable for application to a digital VTR.

[Summary of the invention]

The present invention relates to a digital video signal processing circuit, and by standardizing the burst signal and synchronization signal added to the digital video signal according to a predetermined standard, it is possible to easily perform electronic editing in consideration of color 7 framing of the digital composite video signal. Both K and monitor playback are facilitated by converting to analog.

[Conventional technology]

The burst signal (color subcarrier signal) and synchronization signal handled by a conventional digital VTR use an external reference burst signal (reference color subcarrier signal) and reference synchronization signal.

[Problem that the invention seeks to solve]

By the way, since the phase relationship between the external reference burst signal and the reference synchronization signal used in conventional digital VTRs is not specified in %, electronic editing that takes into account the color framing of the digital composite video signal obtained by combining these signals is required. However, it is difficult to perform analog playback on a monitor.

In view of these points, the present invention proposes a processing circuit for digital video signals that facilitates electronic editing in consideration of color 7-raming of digital composite video signals and facilitates monitor playback through analogization.

[Means for solving problems]

The digital video signal processing circuit according to the present invention includes a first memory (8) in which an input digital video signal is written and read, and a digitized signal of a burst signal and a synchronization signal standardized according to a predetermined standard. A signal forming circuit (4) that forms a standardized color subcarrier signal and a standardized synchronization signal by adjusting the phase relationship between the reference color subcarrier signal and the reference synchronization signal to a predetermined standard. )
The reading of the first and second memo IJ (8), (7) is controlled based on the output signal of this signal forming circuit (4), and the reading is standardized according to a predetermined standard. The present invention is characterized in that a digital composite video signal is obtained.

[Effect]

According to the present invention, a burst signal and a synchronization signal standardized according to a predetermined standard can be inserted into a digital video signal by the signal forming circuit (4) and the second memory (7).

〔Example〕

An embodiment of the present invention will be described below with reference to FIG. In this embodiment, a digital video signal processing circuit is provided on the output side of a reproduction circuit of a digital VTR. The reference analog video signal (external reference power 2 - video signal) from the input terminal (1) is commonly supplied to the color subcarrier separation circuit (2) and the synchronization separation circuit (3) to separate the reference color subcarrier signal, respectively. (see Fig. 2 A) and the base/quasi-horizontal synchronizing signal (second
(see Figure C) and a reference vertical synchronization signal are obtained and supplied to a standardized synchronization signal/standardized color subcarrier signal forming circuit (4).

This standard is based on, for example, the rR817 standard for NTSC color television signals developed by the U.S. EIA (Electronic Industry Association).
This is a well-known standard called 0AJ. This standard was established with four field cycle color framing in mind, and part of the standard states that the burst signal begins 19 color subcarrier periods after the 50-ch amplitude point of the leading edge of the horizontal sync signal. , if it continues for 9 cycles, the specification is exceeded.

In this signal forming circuit (4), the reference color subcarrier signal is multiplied by a multiplier (4a) via a level comparator with a reference value of zero and a TTL (none of which are shown), and the reference horizontal synchronization signal is multiplied by a multiplier (4a). The reference value is 50% of the amplitude along with the vertical synchronization signal.
% to the latch circuit (4b) via a level comparator and TTL (both not shown), and a multiplier (4a).
) as a clock signal to the latch circuit (4b), the leading edge (50%
amplitude point) is the zero-crossing point of the reference color subcarrier signal (the zero-crossing point that transitions from negative to positive and from positive to negative depending on the field)
Delay the phase of the reference synchronization signal to match the
Thus, the standardized color subcarrier signal obtained from the signal forming circuit (4) (see FIG. 2C, although shown in the form of an analog signal, it is actually a pulse signal indicating timing). Also, the standardized horizontal synchronizing signal (see the second diagram (although it is shown in the form of an analog signal, it is actually a pulse signal indicating timing)) and the standardized vertical synchronizing signal are sent to the timing generator (5) K. Supplied.

(7) is a ROM (second memory) in which a standardized burst signal, a standardized horizontal synchronizing signal, and a standardized vertical synchronizing signal are respectively stored in digital form;
) is a buffer video RAM (first F memory) to which the reproduced input digital video signal from the input terminal (9) is supplied, written, and then read out.

The timing generator (5) and the other pulses (pulses with a color subcarrier frequency that is, for example, four times the sampling frequency of the digital video signal) are connected to the address generator (5).
address counter) (6) K is supplied, and the address signal obtained from this is sent to the ROM (7) and video RAM.
(8) to the timing generator (5)
The read enable signal from ROM (7)
A standardized horizontal synchronization signal that has been dezotalized,
The first and fourth fields and the second field are reversed line by line.
and the signal section α of the normalized burst signal having opposite phases to each other and the signal section β of the output digital video signal from the video RAM (8) are alternately read out and output to the output terminal (transfer) between the third field and the third field. . Although not shown, a digital standardized vertical synchronization signal is also output in the same way. In addition, FIG. 3 shows a composite video signal that is converted into an analog version of the digital composite video signal (parallel signal) inputted from the output terminal oQ, and the signal sections α' and β' are the above-mentioned signal sections α.
, β respectively.

〔Effect of the invention〕

According to the present invention described above, it is possible to obtain a processing circuit for a digital video signal that facilitates electronic editing in consideration of color framing of a digital composite video signal and facilitates monitor playback by analogization.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention, and FIGS. 2 and 3 are waveform diagrams for explaining the same. (2) is a color subcarrier separation circuit, (3) is a synchronization separation circuit,
(4) is a signal forming circuit, (5) is a timing generator, (6) is an address generator, (7) is a second memory, and (8) is a first memory. Hidemori Matsukuma 2. Down) The history of the city is amazing! fill! t block type 1 group 1st diagram Rt Y'/I! 1 Figure 3 Procedural amendment April 19, 1985 Manabu Shiga, Commissioner of the Patent Office 11. Indication of the case 1985 Patent Application No. 17124 2. Title of invention Digital video signal processing circuit 3. Amendment Relationship with the case involving the person who filed the patent application Address of the patent applicant: 6-7-35, Kitashina-yo, Tokyo Parts-Yo-ku Address:
1-8-1 Nishi-Shinjuku, Shinjuku-ku, Tokyo 03-343-
5821■ (Shinjuku Building) 6. Number of inventions increased by amendment 7. Subject of amendment Detailed explanation of the invention in the specification. (1) In the specification, page 7, line 4, line 1, 4j is corrected to read "3rd". (2) Same page, line 5, "3rd" is corrected to "4th". that's all

Claims (1)

[Claims] A first memory in which input digital video signals are written and read, a second memory in which digitized signals of burst signals and synchronization signals standardized according to a predetermined standard are stored, and a reference color subcarrier. a signal forming circuit that forms a standardized color subcarrier signal and a standardized synchronizing signal by matching the phase relationship between the signal and the reference synchronizing signal to the above-mentioned predetermined standard; 1st
A digital video signal processing circuit, characterized in that the digital video signal processing circuit controls readout of the second memory and obtains a digital composite video signal standardized according to the predetermined standard.