JPS61166667U - - Google Patents

Info

Publication number
JPS61166667U
JPS61166667U JP5017385U JP5017385U JPS61166667U JP S61166667 U JPS61166667 U JP S61166667U JP 5017385 U JP5017385 U JP 5017385U JP 5017385 U JP5017385 U JP 5017385U JP S61166667 U JPS61166667 U JP S61166667U
Authority
JP
Japan
Prior art keywords
aft
switching element
synchronization signal
voltage
synchronization
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5017385U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP5017385U priority Critical patent/JPS61166667U/ja
Publication of JPS61166667U publication Critical patent/JPS61166667U/ja
Pending legal-status Critical Current

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  • Television Receiver Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案のAFTデイフイート装置を実
施したテレビジヨン受像機のブロツク図、第2図
は本考案装置の1実施例の回路図、第3図は同実
施例を説明するための波形図、第4図は従来のテ
レビジヨン受像機のブロツク図である。 1…電子同調チユーナ、2…可変容量ダイオー
ド、3…同調電圧設定用可変抵抗器、4…AFT
オンオフ用スイツチ、5…AFT回路、8…同期
分離回路、9…同期信号検知回路。
Fig. 1 is a block diagram of a television receiver implementing the AFT defect device of the present invention, Fig. 2 is a circuit diagram of one embodiment of the device of the present invention, and Fig. 3 is a waveform diagram for explaining the embodiment. , FIG. 4 is a block diagram of a conventional television receiver. 1...Electronic tuning tuner, 2...Variable capacitance diode, 3...Variable resistor for tuning voltage setting, 4...AFT
On/off switch, 5...AFT circuit, 8...Sync separation circuit, 9...Sync signal detection circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 同調電圧設定用可変抵抗器によつて設定された
設定電圧とAFT回路よりAFTオンオフ用スイ
ツチング素子を介して得られるAFT電圧とを重
畳してチユーナーの可変容量ダイオードに印加し
AFT動作を行なわしめることができるテレビジ
ヨン受像機において、同期分離回路より得られる
同期信号の有無を検知し該検知出力に基いて前記
スイツチング素子をオンオフ制御する同期信号検
知手段を備え、特に同期信号が存在しないとき前
記スイツチング素子をオフ状態にしてAFT動作
を解除するようにしたことを特徴とするAFTデ
イフイート装置。
The setting voltage set by the tuning voltage setting variable resistor and the AFT voltage obtained from the AFT circuit via the AFT on/off switching element are superimposed and applied to the variable capacitance diode of the tuner to perform AFT operation. The television receiver is equipped with a synchronization signal detection means for detecting the presence or absence of a synchronization signal obtained from a synchronization separation circuit and controlling the switching element on and off based on the detection output, and in particular, when the synchronization signal is not present, the switching element is switched on and off. An AFT defect device characterized in that an AFT operation is canceled by turning off an element.
JP5017385U 1985-04-03 1985-04-03 Pending JPS61166667U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5017385U JPS61166667U (en) 1985-04-03 1985-04-03

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5017385U JPS61166667U (en) 1985-04-03 1985-04-03

Publications (1)

Publication Number Publication Date
JPS61166667U true JPS61166667U (en) 1986-10-16

Family

ID=30568061

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5017385U Pending JPS61166667U (en) 1985-04-03 1985-04-03

Country Status (1)

Country Link
JP (1) JPS61166667U (en)

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