JPS61164299A - Thick film multilayer ceramic wiring board and manufacture thereof - Google Patents

Thick film multilayer ceramic wiring board and manufacture thereof

Info

Publication number
JPS61164299A
JPS61164299A JP526285A JP526285A JPS61164299A JP S61164299 A JPS61164299 A JP S61164299A JP 526285 A JP526285 A JP 526285A JP 526285 A JP526285 A JP 526285A JP S61164299 A JPS61164299 A JP S61164299A
Authority
JP
Japan
Prior art keywords
conductor
paste
wiring board
thick film
film multilayer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP526285A
Other languages
Japanese (ja)
Inventor
三森 誠司
堀部 芳幸
上山 守
宮 好宏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP526285A priority Critical patent/JPS61164299A/en
Publication of JPS61164299A publication Critical patent/JPS61164299A/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明はセラミック配線板、特に電子回路用の厚膜多層
セラミック配線板およびその製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a ceramic wiring board, particularly a thick film multilayer ceramic wiring board for electronic circuits, and a method for manufacturing the same.

(従来技術とその問題点) 従来厚膜多層セラミック配線板の導体として用いられて
いる導体ペーストは、Ag−Pd粉にガラス粉を加えた
ものが主に用いられている。このAg−Pd導体ペース
トは、セラミック基板にスクリーン印刷法により所望の
パターンで印刷し、乾燥したのち大気中で800〜85
0℃の温度で10分間焼成される。しかしながら、この
Ag−Pd導体ペーストは、導通抵抗が650mΩと比
較的高く。
(Prior Art and its Problems) The conductor paste conventionally used as a conductor for thick-film multilayer ceramic wiring boards is mainly a mixture of Ag--Pd powder and glass powder. This Ag-Pd conductor paste is printed with a desired pattern on a ceramic substrate by screen printing method, dried, and then exposed to 800 to 850
It is baked for 10 minutes at a temperature of 0°C. However, this Ag-Pd conductor paste has a relatively high conduction resistance of 650 mΩ.

Agを用いる事によシマイグレーションによる導体間の
ショートが起こシやすい、高価であるなどの欠点を有す
る。これに対し最近は中性雰囲気焼成のCu導体ペース
トが用いられ始めた。Cu導体ペーストはAg−Pd導
体ペーストと同じプロセスで配線パターンを形成するが
、Cu導体はA g −P d導体に比べ導通抵抗が6
6mΩと低く、−iたマイグレーションも少なく半田濡
れ性もよい。しかしながらCuは酸化速度が速いため焼
成後しばらく空気中に置いておくと導体表面に酸化膜が
出きるなど、酸化に対しての製品の保管にやや問題があ
る。
The use of Ag has drawbacks such as being prone to short circuits between conductors due to shimigration and being expensive. In contrast, recently, a Cu conductor paste fired in a neutral atmosphere has begun to be used. Cu conductor paste forms wiring patterns using the same process as Ag-Pd conductor paste, but Cu conductor has a conduction resistance of 6 compared to Ag-Pd conductor.
It is as low as 6 mΩ, has little -i migration and has good solder wettability. However, since Cu has a fast oxidation rate, there are some problems in storing the product against oxidation, such as an oxide film appearing on the conductor surface if it is left in the air for a while after firing.

(発明の目的) 本発明は上記の欠点のない厚膜多層配線板およびその製
造方法を提供することを目的とするものである。
(Objective of the Invention) An object of the present invention is to provide a thick film multilayer wiring board and a method for manufacturing the same, which are free from the above-mentioned drawbacks.

(問題点を解決するだめの手段) 本発明者らは上記の欠点について種々検討した結果、セ
ラミック基板上にCu導体ペーストを塗布し、それを焼
付けて内部導体層を形成し、その後内部導体層の上面に
絶縁ペーストを塗布し、それを焼付けて絶縁層を形成し
、さらに絶縁層の上面にAg−Pd導体ペーストを塗布
し、それを焼付けたところ上記の欠点のない厚膜多層セ
ラミック配線板を製造できることを確認した。
(Means for Solving the Problem) As a result of various studies on the above-mentioned drawbacks, the present inventors applied a Cu conductor paste on a ceramic substrate, baked it to form an inner conductor layer, and then formed an inner conductor layer. By applying an insulating paste on the top surface and baking it to form an insulating layer, and then applying an Ag-Pd conductor paste on the top surface of the insulating layer and baking it, a thick film multilayer ceramic wiring board without the above defects was created. It has been confirmed that it can be manufactured.

本発明は内部導体層にCu導体の層を9表面露出溝体層
にAg−Pd導体の層を形成して庁る厚膜多層セラミッ
ク配線板およびセラミック基板上にCu導体ペーストを
塗布、焼付けて内部導体層を形成する工程と絶縁層の上
面にA、g−Pd導体ペーストを塗布、焼付けて表面露
出導体層を形成する工程とを含む厚膜多層セラミック配
線板の製造方法に関する。
The present invention involves forming a layer of Cu conductor on the internal conductor layer and a layer of Ag-Pd conductor on the surface exposed groove layer, and applying and baking a Cu conductor paste on the thick film multilayer ceramic wiring board and ceramic substrate. The present invention relates to a method of manufacturing a thick film multilayer ceramic wiring board, which includes a step of forming an internal conductor layer and a step of applying an A, g-Pd conductor paste on the upper surface of an insulating layer and baking it to form a surface exposed conductor layer.

本発明において、内部導体層を形成するCu導体ペース
トは通常のガラスボンドタイプ、)y:slylポルド
タイプ、ミックスボンドタイプ等中性雰囲気焼成のCu
導体ペーストが用いられ、丑だ表面露出導体層を形成す
るAg−Pd導体ペーストは通常ホーロー基板用として
用いられる低温焼成(650℃以下)用のペーストを用
いることが好すしい。絶縁ペーストは通常一般に市販さ
れているオーバーコート用のガラスペーストが用いられ
る。
In the present invention, the Cu conductor paste forming the internal conductor layer is a Cu conductor paste baked in a neutral atmosphere, such as a normal glass bond type, )y:syl pold type, or a mixed bond type.
A conductive paste is used, and the Ag--Pd conductive paste forming the exposed conductor layer is preferably a paste for low-temperature firing (650° C. or lower), which is normally used for hollow substrates. As the insulating paste, a commercially available glass paste for overcoating is usually used.

各々のペーストの焼付温度ばCu導体ペーストを用いた
場合は850〜1050℃、絶縁ペーストを用いた場合
は850−=1050℃およびA−g−Pd導体ペース
トを用いた場合は500〜650°Cの範囲の温度で焼
成することが好ましい。
The baking temperature of each paste is 850-1050°C when Cu conductor paste is used, 850-1050°C when insulating paste is used, and 500-650°C when A-g-Pd conductor paste is used. Preferably, the firing is carried out at a temperature in the range of .

また各々のペーストの塗布方法については特に制限はな
いがスクリーン印刷法で塗布することが好ましい。
There are no particular restrictions on the method of applying each paste, but it is preferable to apply it by screen printing.

(実施例) 以下本発明の実施例を図面により説明する。(Example) Embodiments of the present invention will be described below with reference to the drawings.

第1図の(a)、 (1))および(C)は本発明の実
施例に々る厚膜多層セラミック配線板の製造工程を示す
上面図であり、1はアルミナ純度96%、厚み1 mm
(a), (1)) and (C) of FIG. 1 are top views showing the manufacturing process of a thick film multilayer ceramic wiring board according to an embodiment of the present invention; mm
.

寸法20X40mmのセラミック基板で、その上面に第
1図の(a)に示す形状にケミカルボンドタイプのCu
導体ペースト(デュポン社製、商品名4425)をスク
リーン印刷法で塗布し、N2雰囲気中で1025℃の温
度で10分間焼成して焼付けて内部導体層2を形成した
It is a ceramic substrate with dimensions of 20 x 40 mm, and a chemical bond type Cu plate is placed on the top surface in the shape shown in Fig. 1 (a).
A conductor paste (manufactured by DuPont, trade name 4425) was applied by a screen printing method, and baked at a temperature of 1025° C. for 10 minutes in an N2 atmosphere to form the inner conductor layer 2.

次に第1図の(b)に示す如くオーバーコート用のし+
 N2雰囲気中で900℃の温度で10分間焼成して焼
付けて絶縁層3およびスルーホール4を形成した。さら
に第1図の(C)に示す如く絶縁層3の上面に電極端子
となる部分およびスルーホール4にAg−Pd導体ペー
スト(住友金属鉱山KK*、商品名C−4260)をス
クリーン印刷法で塗布し。
Next, as shown in Fig. 1(b),
The insulating layer 3 and the through holes 4 were formed by baking at a temperature of 900° C. for 10 minutes in a N2 atmosphere. Furthermore, as shown in FIG. 1(C), Ag-Pd conductive paste (Sumitomo Metal Mining KK*, trade name C-4260) is applied on the upper surface of the insulating layer 3 to the portion that will become the electrode terminal and to the through hole 4 by screen printing. Apply.

大気中で650℃の温度で10分間焼成して焼付けて表
面露出導体層5を形成して厚膜多層セラミンク配線板を
得た。
A thick film multilayer ceramic wiring board was obtained by baking in the air at a temperature of 650° C. for 10 minutes to form a surface-exposed conductor layer 5.

実施例2 Cu導体ペーストとしてガラスボンドタイプのCu導体
ペースト(デュポン社製、商品名9922 )を使用し
、900℃で焼付け、オーバーコート用のガラスペース
トとして(デュポン社製、商品名4375)を使用し、
875℃で焼付けおよびAg−Pdペーストとして(サ
ーマロイ社製、商品名4800)を使用し、600℃で
焼付けを行なった以外は実施例1と同様の方法および同
一のパターンを形成して厚膜多層セラミック配線板を得
た。
Example 2 A glass bond type Cu conductor paste (manufactured by DuPont, trade name 9922) was used as the Cu conductor paste, and baked at 900°C, and a glass paste (manufactured by DuPont, trade name 4375) was used as the overcoat glass paste. death,
A thick film multilayer was formed using the same method and the same pattern as in Example 1, except that baking was performed at 875°C, Ag-Pd paste (manufactured by Thermalloy, trade name 4800) was used, and baking was performed at 600°C. A ceramic wiring board was obtained.

次に実施例1および実施例2で得た厚膜多層セラミック
配線板の導通抵抗を測定したところ70mΩを示し、同
一パターンのCu導体単体の導通抵抗66mΩに近い値
を示した。また実施例1および実施例2で得た厚膜多層
セラミック配線板を大気中で温度60℃、湿度90%R
hの条件中に放置したところ内部導体層のCu導体の酸
化劣化による導通抵抗の変化は観察されなかった。
Next, when the conduction resistance of the thick film multilayer ceramic wiring boards obtained in Examples 1 and 2 was measured, it was found to be 70 mΩ, which is close to the conduction resistance of a single Cu conductor of the same pattern, 66 mΩ. Further, the thick film multilayer ceramic wiring boards obtained in Example 1 and Example 2 were placed in the atmosphere at a temperature of 60°C and a humidity of 90% R.
When left under the conditions of h, no change in conduction resistance due to oxidative deterioration of the Cu conductor in the internal conductor layer was observed.

(発明の効果) 6一 本発明によれば、導通抵抗は従来のAg−Pd導体単体
の厚膜多層セラミック配線板の約1/10と小さく、マ
イグレーンヨンによる導体間のショートも少々<、捷た
耐酸化性に1愛れた厚膜多層セラミック配線板を得るこ
とができる。
(Effects of the Invention) 6. According to the present invention, the conduction resistance is as small as about 1/10 of that of a conventional thick-film multilayer ceramic wiring board made of a single Ag-Pd conductor, and there is little short circuit between conductors due to migration. A thick film multilayer ceramic wiring board with excellent oxidation resistance can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図の(a)、 (1))および(C1は本発明の実
施例になる厚膜多層セラミック配線板の製造工程を示す
上面図である。 符号の説明 ■・・・セラミック基板   2・・・内部導体層3・
・・絶縁層       4・・・スルーホール5・・
・表面露出導体層 第 1 口 (C)
(a), (1)) and (C1) in FIG. 1 are top views showing the manufacturing process of a thick film multilayer ceramic wiring board according to an embodiment of the present invention.・Inner conductor layer 3・
...Insulating layer 4...Through hole 5...
・Surface exposed conductor layer 1st opening (C)

Claims (1)

【特許請求の範囲】 1、内部導体層にCu導体の層を、表面露出導体層にA
g−Pd導体の層を形成してなる厚膜多層セラミック配
線板。 2、セラミック基板上にCu導体ペーストを塗布、焼付
けて内部導体層を形成する工程とその上面に絶縁ペース
トを塗布、焼付けて絶縁層を形成する工程と絶縁層の上
面にAg−Pd導体ペーストを塗布、焼付けて表面露出
導体層を形成する工程とを含むことを特徴とする厚膜多
層セラミック配線板の製造方法。
[Claims] 1. A Cu conductor layer is used as the inner conductor layer and A layer is used as the surface exposed conductor layer.
A thick film multilayer ceramic wiring board formed by forming a layer of g-Pd conductor. 2. A process of applying Cu conductor paste on the ceramic substrate and baking it to form an internal conductor layer, a process of applying an insulating paste on the top surface and baking it to form an insulating layer, and a process of applying Ag-Pd conductor paste on the top surface of the insulating layer. 1. A method for manufacturing a thick film multilayer ceramic wiring board, comprising the steps of coating and baking to form a surface exposed conductor layer.
JP526285A 1985-01-16 1985-01-16 Thick film multilayer ceramic wiring board and manufacture thereof Pending JPS61164299A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP526285A JPS61164299A (en) 1985-01-16 1985-01-16 Thick film multilayer ceramic wiring board and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP526285A JPS61164299A (en) 1985-01-16 1985-01-16 Thick film multilayer ceramic wiring board and manufacture thereof

Publications (1)

Publication Number Publication Date
JPS61164299A true JPS61164299A (en) 1986-07-24

Family

ID=11606313

Family Applications (1)

Application Number Title Priority Date Filing Date
JP526285A Pending JPS61164299A (en) 1985-01-16 1985-01-16 Thick film multilayer ceramic wiring board and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS61164299A (en)

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