JPS61163763A - Carrier wave recovery system - Google Patents

Abstract

PURPOSE:To recover stably a carrier wave by providing a discriminating means of a carrier wave recovery and synchronizing pattern part CR of a head part of a receiving burst signal, a bit timing regenerating and synchronizing pattern part BTR, a unique word part UW, and a data part DATA, and switching it to reverse modulation of the number of phases which has coincided with each number of modulation phases. CONSTITUTION:A receiving PSK signal (a) is applied to a demodulator 1, a carrier wave recovery circuit 2 and a bit timing regenerating circuit 5, a carrier wave (b) recovered by the carrier wave recovery circuit 2, and a bit terminal signal (c) regenerated by a bit timing regenerating circuit 5 are applied to the demodulator 1, and the receiving PSK signal (a) is demodulated. A demodulated signal (d) and the regenerated bit timing signal (c) are applied to a unique word detector 6, a unique word part UW is detected and applied to a phase number controlling circuit 7, and a time position of a carrier wave recovery and synchronizing pattern part CR and a bit timing regenerating and synchronizing pattern part BTR of the next burst signal is discriminated exactly.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a carrier wave regeneration method for regenerating a reference carrier wave for demodulation in a PSK-TDMA system from a received burst signal by an inverse modulation method.

[Conventional technology]

As a method for regenerating a reference carrier wave from a received PSK wave, a frequency-multiplying method, an inverse modulation method, etc. are known. In the frequency multiplication/division method, the frequency is multiplied according to the number of modulation phases to create an unmodulated wave, and then the frequency is divided to obtain a signal at the original frequency to obtain a regenerated carrier wave. , intermittent PSK
When receiving waves, high-speed acquisition is possible and so-called hang-up phenomenon can be prevented. In addition, the inverse modulation method modulates the received PSK wave with a demodulated signal to form an unmodulated wave, and compared to the above-mentioned frequency-multiplying method, it has a C/
If N is the same, the cycle skip phenomenon is less likely to occur.

[Problem that the invention seeks to solve]

In the PSK-TDMA system applied to satellite communications, it is required to be able to transmit and receive even in low C/N conditions, and from the viewpoint of transmission efficiency, the synchronization pattern part for carrier wave recovery and the synchronization pattern part for bit timing recovery are required. It is desired to shorten the pattern portion as much as possible. The above-mentioned frequency multiplication/division method has a drawback that, in a low C/N state, there is a large cycle skip phenomenon that causes a phase transition. On the other hand, the above-mentioned inverse modulation method is
Although it has the characteristic that the cycle skip phenomenon is small, it has the disadvantage that the hang-up phenomenon easily occurs. As a means to alleviate this hang-up phenomenon, it has been proposed to stop inverse modulation in the synchronization pattern section for carrier wave reproduction. However, as described above, when the synchronization pattern section is shortened, there is a drawback that the hang-up phenomenon cannot be sufficiently alleviated.

The present invention aims to improve the above-mentioned conventional drawbacks.

[Means for solving problems]

The carrier wave regeneration method of the present invention is a carrier wave regeneration method in which a reference carrier for demodulation in the PSK-TDMA system is regenerated by an inverse modulation method. A means for discriminating between the synchronization pattern section for reproduction, the unique word section, and the data section is provided, and the discriminating means performs switching control of the number of inverse modulation phases of each, thereby reproducing the reference carrier wave.

[Effect]

The synchronization pattern section for carrier wave reproduction is generally “O” or “
Since it is modulated with a continuous signal of l'', it becomes an unmodulated part,
When this synchronization pattern section is received, inverse modulation is stopped, and the synchronization pattern section for bit timing reproduction is alternately set to "l".
Since it is modulated by a signal that repeats "0" and "0", two-phase inverse modulation is performed when this synchronization pattern part is received, and the unique word part and data part have a modulation phase number such as 4 phases. When receiving the data part, the number of modulation phases is inversely modulated to prevent the hang-up phenomenon during high-speed pull-in, and the synchronization pattern part for bit timing reproduction can also be used for carrier wave reproduction. It is possible to shorten the time.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention, where l is a demodulator, 2 is a carrier recovery circuit, 3 is an inverse modulator, 4 is a bandpass filter (or phase locked loop PLL), and 5 is a bit timing recovery circuit. , circuit, 6 is a unique word detector, and 7 is a phase number control circuit. This unique word detector 6 and the number of phases 111
1 control circuit 7 constitutes means for discriminating between a synchronization pattern section for carrier wave reproduction, a synchronization pattern section for bit timing reproduction, and a data section of the received burst signal.

The received PSK signal a is applied to a demodulator 1, a carrier wave recovery circuit 2, and a bit timing recovery circuit 5. C and demodulator l
The received PSK signal a is demodulated. The demodulated signal d and the reproduced bit timing signal C are applied to the unique word detector 6, the unique word part included in the demodulated signal d is detected, and the unique word detection signal e is sent to the phase number control circuit 7. Added. Phase number control circuit 7
is the inverse modulator 3 using the unique word detection signal e as a reference.
It outputs a control signal f that controls the number of phases.

Further, the demodulated signal d is transferred to a subsequent processing device as received data, and the reproduced bit timing signal C is transferred as a clock signal.

The received PSK signal a in the TDMA system is, for example, a burst signal shown in FIG. Department, DATA
is a data portion, each time length is predetermined, and the time position is set so that each burst signal can be received at a predetermined time position with reference to the reference burst signal.

The carrier wave regeneration synchronization pattern section CR is an unmodulated carrier wave section, and the bit timing reuse synchronization pattern section B
Since TR is alternately modulated by "1" and "O", it becomes a two-phase transformation part.

Furthermore, the unique word section UW and the data section DATA are four-phase transformed sections since four-phase PSK modulation is normally adopted in satellite communications. Therefore, 0° in (a) of Figure 3
The carrier wave vector indicates the synchronization pattern part CR for carrier wave reproduction, the two-phase modulation vector of 0° and 180° in (b) indicates the synchronization pattern part BTR for bit timing reproduction,
(The four-phase modulation vectors of 0°, 90°, 180°, and 270° of C1 indicate the unique word section UW and the data section DATA.

Since the time positions of the synchronization pattern section CR for carrier wave reproduction and the synchronization pattern section BTR for bit timing reproduction are predetermined with respect to the unique word section UW, the unique word section UW is detected by the unique word detector 6, and When the detection signal e is applied to the phase number control circuit 7, the time position of the synchronization pattern section CR for carrier wave reproduction and the synchronization pattern section BTR for bit timing reproduction of the next burst signal can be accurately determined. Therefore, the phase number control circuit 7
For example, as shown in FIG. 4, the counter is composed of a counter 8 and a decoder 9, and a unique word detection signal e is applied to the reset terminal R of the counter 8, a clock signal is applied to the clock terminal CK, and the unique word detection signal e is applied to the reset terminal R of the counter 8. After being reset by the signal e, the count contents of the counter 8 that counts up the clock signal are decoded by the decoder 9, and the control signal f1 is used to stop the inverse modulation when receiving the synchronization pattern part CR for carrier wave reproduction of the next burst signal. and a control signal f2 for performing two-phase inverse modulation when receiving the bit timing reproduction synchronization pattern section BTR.

The control signal r applied from the phase number control circuit 7 to the inverse modulator 3 is
For the synchronization pattern section CR for carrier wave reproduction, the control signal for stopping the inverse modulation shown in Figure 2 is used, and for the synchronization pattern section BTR for bit timing reproduction, the second
A control signal for performing two-phase inverse modulation shown in (C) of the figure,
For the other unique word part UW and data part DATA, a control signal is used to perform four-phase inverse modulation as shown in FIG. 2(d). Thereby, the inverse modulator 3
In this case, inverse modulation is stopped for the synchronization pattern section CR- for carrier wave regeneration, and the received PSK signal a is applied to the demodulator l via the bandpass filter 4 as a regenerated carrier wave. That is, since it is a non-modulated part, it can be used as a reproduced carrier wave as it is.

Two-phase inverse modulation is performed on the next bit timing reproduction synchronization pattern section BTR, and the bit timing reproduction synchronization pattern section BTR in the two-phase modulation state is converted into an unmodulated signal and passed through the bandpass filter 4. It becomes a regenerated carrier wave. Also, for the unique word part UW and data part DATA,
The carrier wave will be recovered by performing four-phase inverse modulation.

FIG. 5 is a block diagram of a four-phase inverse modulation type carrier wave regeneration circuit according to an embodiment of the present invention, in which 11.12 is a balanced modulator, 13
．． 14 is a low-pass filter, 15° 16 is a discriminator, 17.18
1 is a balanced modulator, 19 is a selector, 20.21 is a hybrid circuit, 22 is a delay circuit, and 2.3 is a bandpass filter or phase locked circuit (PLL) for outputting a recovered carrier wave. The regenerated carrier signal output from the bandpass filter 23 is
The signals are distributed by the 90' hybrid circuit 20 with a phase difference of 90° and applied to the balanced modulators 11.12, and the received 4-phase PSK signals are applied to the balanced modulators 11.12, respectively, and synchronized by the regenerated carrier signal. Detected.

The output signals of the balanced modulators 11 , 12 are respectively applied to a discriminator 15 , 16 via a low-pass filter 13 , 14 , and the data is recovered by level discrimination and applied to a selector 19 . The selector 19 is controlled by the phase number control circuit 7, and an inverse modulation stop control signal f1 or a two-phase inverse modulation control signal f2 is applied to the selector 19. Selector 1
The data selected at step 9 is applied to balanced modulators 17 and 18, and input PSK signals delayed by delay circuits 22 corresponding to the delay times of each part are applied to balanced modulators 17 and 18, respectively.
The signals in the unmodulated state are applied to the bandpass filter 23, and a regenerated carrier signal is output from the bandpass filter 23 with the carrier frequency as the center frequency. will be done.

FIG. 6 is a circuit diagram of the main part of the selector 19, which is composed of gate circuits Gl and G2 and a switching circuit SW. When the phase modulation control signal f2 does not instruct two-phase modulation, the switching circuit SW is in the state shown, and the discriminator 15.1
6 output data Iin, Qtn are gate circuits Gl, G
2 becomes the data [out, Qout] and is applied to a balanced modulator IT, 18 which performs inverse modulation. That is, a state of carrier wave regeneration by four-phase inverse modulation is entered, and a carrier wave for demodulation for the unique word part UW and data part DATA is regenerated.

To stop the inverse modulation for the synchronization pattern section CR for carrier wave reproduction, the inverse modulation stop control signal r1 of "0" is applied from the phase number control circuit 7 to the selector 19, and thereby the gate circuit G
Since l and G2 are closed, the data Iout and Qout applied to the modulator 17.18 become logic "0", the passing phase in the balanced modulator 17.18 becomes constant, and the data is input to the bandpass filter 23. The phase of the signal does not change, so a stable reference carrier is obtained at the output of the bandpass filter.

Since the synchronization pattern section CR for carrier wave reproduction is a non-modulated signal, it can be used as it is as a reproduced carrier wave signal.

In addition, the two-phase inverse modulation for the synchronization pattern section BTR for bit timing reproduction is performed by switching the switching circuit SW by the two-phase inverse modulation control signal f2 from the phase number control circuit 7, and the data fin is switched between the gate circuit Gl and the gate circuit. Since the inverse modulation stop signal r1 is "L" at that time, the data Iin is added to the output data 1out, Q
Since it is added to the balanced modulators 17 and 18 as out and performs inverse modulation with the same data, it becomes two-phase inverse modulation, and the synchronization pattern section B for bit timing reproduction
Since the TR is in a two-phase modulation state, an unmodulated signal, that is, a carrier wave signal is reproduced.

〔Effect of the invention〕

As explained above, in the PSK-TDMA system, the present invention provides a carrier wave regeneration synchronization pattern section CR at the beginning of a received burst signal, a bit timing regeneration synchronization pattern section BTR, a unique word section UW, and a data section. D.A.
A means for discriminating between the TA section and the TA section is provided to switch to inverse modulation with a phase number that matches each modulation phase number. In this way, by changing the number of modulation phases of the received burst signal and changing the number of inverse modulation phases, it is possible to reduce the hang-up phenomenon even if the time length of the synchronization pattern sections CR and BTR is shortened. It is. Further, there is an advantage that the synchronization pattern section BTR for bit timing reproduction can also be used for carrier wave reproduction. Therefore, even in a low C/Na'' state, the carrier wave is regenerated by the inverse modulation method, so the cycle skip phenomenon is small, and as mentioned above, the hang-up phenomenon is also reduced, so transmission efficiency is improved. PSK-T
It has the advantage that it can be applied to a DMA system to perform stable carrier wave regeneration.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of an embodiment of the present invention, Fig. 2 is an explanatory diagram of received burst signals and control signals, Fig. 3 is an explanatory diagram of modulation vectors, and Fig. 4 is a block diagram of an example of a phase number control circuit. , FIG. 5 is a block diagram of a four-phase inverse modulation type carrier wave regeneration circuit according to an embodiment of the present invention, and FIG. 6 is a circuit diagram of the main part of the selector. 2 is a demodulator, 2 is a carrier recovery circuit, 3 is an inverse modulator, 4 is a bandpass filter, 5 is a bit timing recovery circuit, 6 is a unique word detector, 7 is a phase number control circuit, 8 is a counter,
9 is a decoder, CR is a synchronization pattern section for carrier wave reproduction, B
TR is a synchronization pattern section for bit timing reproduction, UW is a unique word section, and DATA is a data section.

Claims (1)

[Claims] In a carrier wave regeneration method in which a reference carrier wave for demodulation in the PSK-TDMA system is regenerated by an inverse modulation method, a synchronization pattern section for carrier wave regeneration at the beginning of a received burst signal;
A means for discriminating between a synchronization pattern section for bit timing reproduction, a unique word section, and a data section is provided, and a control signal from the discriminating means controls switching of the number of inverse modulation phases to convert the received burst signal to the reference carrier wave for demodulation. A carrier wave regeneration method characterized by regenerating.