JPH0213984B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a carrier recovery circuit using a narrow band filter used in a burst demodulator for TDMA.

(Prior art) In order to synchronously demodulate a modulated wave such as PSK, it is necessary to regenerate a reference carrier wave, and as a carrier wave regeneration circuit used in a burst demodulator for TDMA, a narrow carrier wave that does not have hang-up and can perform high-speed phase pull-in is used. A carrier wave regeneration method using a bandpass filter is used, and an inverse modulation method, a transmission method, etc. are known as means for extracting carrier wave components. FIG. 8 shows an example of a conventional carrier wave recovery circuit using an inverse modulation method. When a 4-phase PSK wave is input, a received signal a is distributed to an inverse modulator 1 and a 4-phase phase demodulator 2, and demodulated outputs b, c is input to the inverse modulator 1, which performs an inverse modulation operation on the received signal a and extracts the carrier wave component d. This carrier wave component d is applied to a tracking filter 3 to remove noise and obtain a reproduced carrier wave e. The tracking filter 3 is composed of mixers 4 and 5, a voltage controlled oscillator 6, a narrowband filter 7, a limiter 8, and a phase comparator 9, as shown in FIG. By controlling the voltage controlled oscillator 6 by detecting it with the comparator 9, and controlling the output frequency of the voltage controlled oscillator 6, which is applied to the mixers 4 and 5, so that the output of the phase comparator 9 becomes zero,
The output frequency of the mixer 4 and the center frequency of the narrow band filter 7 are made to match. Also, Figure 10 shows 4-phase
This shows an example of a conventional carrier wave regeneration circuit using a multiplication method in the case of a PSK wave, in which the received signal a is multiplied by 4 by a quadruple multiplier 10 and sent to a tracking filter 3.
The recovered carrier wave e obtained by dividing the frequency by 1/4 by the 1/4 frequency divider 11 produces demodulated outputs b and c in the 4-phase phase demodulator 2.

(Problems to be Solved by the Invention) In the conventional carrier wave regeneration circuit as described above, the phase error in the narrow band filter is compensated by the tracking filter shown in FIG. etc., phase errors occur due to temperature fluctuations, etc., which causes a deterioration of the error rate. In addition, the so-called tracking filter
In TDMA, the AFC loop is usually a loop with a sufficiently large time constant so as to reduce the noise bandwidth of the AFC loop and the phase slip frequency of the recovered carrier wave. Therefore, the tracking filter only tracks the average value of the frequency of each burst signal, but does not track the frequency deviation between bursts. For this reason, when low slip characteristics are required, the bandwidth of the narrowband filter becomes extremely narrow, and the phase error of the recovered carrier wave due to the frequency deviation between bursts cannot be ignored and becomes a factor in the deterioration of the error rate characteristics. Become.

Therefore, the present invention aims to solve these problems.

(Means for Solving the Problems) A feature of the present invention is that the phase of the regenerated carrier wave output from the narrow band filter is controlled by a phase shifter using a phase control signal that maximizes the demodulated eye pattern. This method obtains a regenerated carrier wave that quickly compensates for phase errors due to changes in frequency and frequency deviations between bursts.One example of this is an inverse modulator that extracts the carrier wave component from the received signal, and an inverse modulator connected to its output. a voltage-controlled phase shifter connected to the output of the filter; a phase demodulator that demodulates and outputs the received signal according to the output of the voltage-controlled phase shifter; and a phase error detection circuit that detects a phase error, and the voltage-controlled phase shifter is controlled so that the phase error of the reproduced carrier wave output from the narrowband filter is reduced by the phase error detection output of the phase error detection circuit. It is in the carrier wave regeneration circuit that is used.

(Function) The present invention detects phase errors caused by circuit elements such as delay lines and inter-burst frequency deviations from the demodulated output, so the phase is automatically compensated at high speed so that the demodulated output error rate is minimized. Carrier waves can be regenerated.

(Embodiment) FIG. 1 is a block diagram showing an embodiment of the present invention, in which a carrier wave is regenerated from a four-phase PSK wave by an inverse modulation method. The 4-phase PSK signal a is distributed to the inverse modulator 1 and the 4-phase phase demodulator 2, and the demodulated outputs b and c drive the inverse modulator 1, and the received signal a
An inverse modulation operation is performed on the carrier wave component d to extract the carrier wave component d. This carrier wave component d is applied to a tracking filter 3 to remove noise and obtain a reproduced carrier wave e. This regenerated carrier wave e is input to the voltage-controlled phase shifter 13, and the voltage-controlled phase shifter 13 is controlled by the phase error detection output of the phase error detection circuit 12 to obtain a regenerated carrier wave e' whose phase error has been compensated. regenerated carrier wave
e' is applied to the four-phase phase demodulator 2.

Here, in the four-phase phase demodulator 2, the four-phase PSK wave a is demodulated by the recovered carrier wave e' using a known configuration, and the demodulated outputs b and c are applied to the phase error detection circuit 12. The phase error detection circuit 12 has a known configuration such as a Costas calculation circuit.
A baseband calculation is performed on the demodulated outputs b and c to obtain a phase error detection output f, and the voltage controlled phase shifter 13 is controlled by this phase error detection output f so that the phase error of the reproduced carrier wave is small. Thereby, it is possible to compensate for a phase error in a delay line or the like and a phase error of a reproduced carrier wave caused by a frequency deviation between bursts so that the demodulated eye pattern is maximized, that is, the error rate is minimized.

FIG. 2 is a block diagram showing an example of a phase error detection circuit in the case of 4-phase PSK. The 4-phase PSK signal a is a recovered carrier wave having a phase difference of 90° in each of the phase detectors 14-1 and 14-2. e′1, e′2
The demodulated outputs b and c are applied to the phase error detection circuit 12. Phase error detection circuit 12
are discriminators 15-1, 15-2 and multiplier 16-1,
16-2 and a subtracter 17. The demodulated outputs b and c are identified in discriminators 15-1 and 15-2, and the mutually identified outputs and the demodulated outputs b and c are multiplied in multipliers 16-1 and 16-2, and the output is multiplied by the subtracter 17. By subtracting , a phase error output f from which the modulation component has been removed can be obtained.

FIG. 3 shows the embodiment of the present invention shown in FIG. 1 using a transfer function. T(S) is a transfer function of tracking filter 3, 12 is a phase error detection circuit, and input phase θin(S) and output phase θout
(S) to obtain a phase error detection output, θin(S)−θout(S). 13 is a voltage controlled phase shifter, and the phase error detection output θin(S)−θout
The S/N of (S) is improved by a loop filter 18 having a transfer function of F(S), and controlled by a phase error detection signal f multiplied by K by a DC amplifier 19.
Represented by a phase adder.

If the transfer function of this loop is H(S), θout(S)=H(S)θin(S)...(1) H(S)=T(S)+KF(S)/1+KF(S)
...(2) becomes.

Here, the transfer function T of the tracking filter 3
Considering (S) as an equivalent low-frequency system, T(S)=W _B /S+W _B (3). W _B is the one-sided bandwidth of the tracking filter. On the other hand, when considering a lag filter as the transfer function F(S) of the loop filter 18, F(S)=W _L /S+W _L (4). However, W _L is the one-sided bandwidth of the loop filter. Substituting this into equation (2), H(S)=S(W _B +KW _L )+W _B W _L (
1+K)/S ² +{W _B +(1+K)W _L }S+W _B W _L (1+K
)……(5) is obtained. This has the same form as the transfer function of a second-order PLL in the case of an incomplete lag-lead type loop filter. If the transfer function of a second-order PLL with an incomplete lag-lead type loop filter is H(S), then H
(S) is given by the following equation.

H(S)=K ₀ (S+a)/S ² +(K ₀ +e)S+Ka
...(6) Comparing (5) and (6), K ₀ =W _B +KW _L ...(7) a=W _B W _L (1+K)/W _B +KW _L ...(8) e=W _L ...(9) becomes. According to the configuration shown in FIG. 4,
Since the transfer function regarding the phase is the same as that of the quadratic PLL, it is understood that the phase error θin(S)−θout(S) is controlled to be zero. Therefore, the phase error caused by circuit elements such as delay lines is detected from the demodulated output, and the phase demodulator is controlled so that the phase error is zero, so that the phase of the recovered carrier wave minimizes the error rate of the demodulated output. You will be automatically compensated. On the other hand, in the TDMA system, the tracking filter 3 does not follow the frequency deviation of each burst, so in the conventional configuration shown in FIG. The phase error △θ caused by the frequency deviation △W between bursts with respect to the frequency is △θ△W/W _B ……(10) if △W is sufficiently small with respect to W _B , and if the frequency deviation △W becomes large, the phase error Δθ becomes so large that it cannot be ignored, and becomes a major cause of deterioration of error rate characteristics.

According to the configuration shown in Figure 2, the phase-related transfer function has the form of a quadratic PLL, so the phase error △θ' due to the frequency deviation △W is △θ' = e△W/aK ₀ = △ W/W _B (1+K)…
...(11) Therefore, the phase error Δθ' is compressed to 1/(1+K). Therefore, according to the present invention, it is possible to follow frequency deviation between bursts at high speed.

FIG. 4 shows another embodiment of the present invention, in which a carrier wave is regenerated from a four-phase PSK wave by a quadrupling method. The 4-phase PSK signal a is multiplied by 4 by a quadruple multiplier 10 and sent to a tracking filter 3.
After that, the frequency is divided by 1/4 by a 1/4 frequency divider 11 to obtain a reproduced carrier wave e. This recovered carrier wave e is input to the voltage controlled phase shifter 13, and the recovered carrier wave e' whose phase error has been compensated is applied to the four-phase phase demodulator 2. The demodulated outputs b and c of the four-phase phase demodulator 2 are applied to the phase error detection circuit 12, and the phase error detection output f
The voltage controlled phase shifter 13 is controlled to compensate for the phase error of the reproduced carrier wave. Therefore, in the embodiment shown in FIG. 4 as well, in the same manner as explained in the embodiment shown in FIG. The rate can be automatically compensated to be minimized.

FIG. 5 shows an embodiment of a voltage-controlled phase shifter used in a carrier wave regeneration circuit according to the present invention as set forth in claim 3. The recovered carrier wave e is distributed by a distributor 20, and Distribution output g
-1 is phase-shifted by π/2 by the π/2 phase shifter 21,
The distributed output g-2 is applied to multiplier 22. The demodulated outputs b and c are inputted, and the phase error detection output f obtained by the phase error detection circuit 12 is applied to the multiplier 22 as a control signal. π/2 phase shifter output h-
1 and the multiplier output h-2 are added to the combiner 23,
Obtain a recovered carrier wave e′ whose phase error has been compensated. When the recovered carrier wave input e is set as e=asWt, the synthesizer inputs h-1 and h-2 are as follows: h-1=sinWt...(12) h-2=AasWt...(13) However, A is It is the multiplication coefficient of the multiplier, and the phase error △
It is determined by θ.

At this time, the composite output e' is e' = √1 + ² sin (Wt + tan ^-1 A) ... (14), and if A≪1, e'sin (Wt + A) ... (14)', so the multiplication By providing the coefficient A with a voltage, the amount of phase shift can be controlled with the voltage. By applying this voltage-controlled phase shifter to the carrier wave regeneration circuit shown in FIG. 4 or FIG. 7, the phase error of the recovered carrier wave can be automatically compensated for.

FIG. 6 is a block diagram showing another embodiment of the present invention according to claim 2, and is a four-phase
The carrier wave is regenerated from the PSK wave using an inverse modulation method. The 4-phase PSK signal a is sent to inverse modulators 1 and 4.
The demodulated outputs b and c drive the inverse modulator 1, perform an inverse modulation operation on the received signal a, and extract the carrier wave component d. This carrier wave component d is input to the voltage-controlled phase shifter 13, and the voltage-controlled phase shifter 13 is controlled by the phase error detection output obtained in the phase error detection circuit 12, and the carrier wave component d' whose phase error has been compensated for is generated. By adding this carrier wave component d' to the tracking filter 3, a reproduced carrier wave e' whose phase error is compensated and noise is removed is obtained.

FIG. 7 shows the embodiment shown in FIG. 6 using a transfer function. T(S) is a transfer function of the tracking filter 3, and 12 is a phase error detection circuit, which takes the difference between the input phase θin(S) and the output phase θout(S), and obtains the phase error detection output θin(S). )
-θout(S) is obtained. 13 is a voltage controlled phase shifter, and the phase error detection output θin (S) - θout (S) is S/
Loop filter 1 with a transfer function of N as F(S)
8 and is controlled by the phase error detection signal f multiplied by K by the DC amplifier 19. This is represented by an adder in phase.

If the transfer function of this loop is H(S), θout(S) = H(S) θin(S) ...(15) H(S) = T(S) [1+KF(S)]/ 1+
K・F(S)・T(S) ……(16) becomes.

Here, by substituting T(S)・F(S) into equation (16) from equations (3) and (4), H(S)=W _B {S+(1+K)W _L }/S ² +(W _B ＋W _L ）S
+(1+K)W _B W _L ...(17) is obtained. This has the same form as the transfer function of a quadratic PLL in the case of an incomplete lag-lead type loop filter. Here, when compared with equation (6), K ₀ =W _B a = (1 + K) W _L e = W _L. Therefore, even with the configuration shown in FIG.
According to the configuration shown in Figure 1, the phase-related transfer function is the same as that of a quadratic PLL, so the phase error θin (S) - θout (S) is controlled to be zero, and the reproduction The phase of the carrier wave is automatically compensated to minimize the error rate of the demodulated output.

(Effects of the Invention) As explained above, the present invention detects the phase error of a recovered carrier wave from the demodulated output of a PSK signal using a phase error detection circuit, and reproduces the detected output as a control signal for a voltage-controlled phase shifter. It is characterized by compensating for the phase error of the carrier wave, and detects from the demodulated output the phase error caused by circuit elements such as delay lines and the phase error caused by the frequency deviation between bursts, so the error rate of the demodulated output is automatically minimized. This has the advantage of being able to reproduce a carrier wave whose phase has been compensated for at high speed.

Note that the present invention is not limited to the 4-phase PSK system, but is generally applicable to multi-phase PSK systems such as 8-phase PSK that can detect phase errors from demodulated output, or to carrier recovery circuits using narrowband filters such as OQPSK and MSK. It is clearly possible.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a 4-phase PSK carrier wave recovery circuit using an inverse modulation method, which is an embodiment of the present invention.
Fig. 2 is a block diagram showing an example of a phase error detection circuit, Fig. 3 is a block diagram showing a transfer function of a carrier regeneration circuit in the present invention, and Fig. 4 is a quadruple multiplication system which is an embodiment of the present invention. 5 is a block diagram showing an embodiment of a voltage controlled phase shifter applied to the present invention, and FIG. 6 is a block diagram of a 4-phase PSK carrier regeneration circuit according to the present invention.
Other embodiments of the carrier wave recovery circuit for phase PSK, FIG. 7 is a block diagram showing the transfer function of the carrier wave recovery circuit according to the present invention, and FIG. FIG. 9 is a block diagram showing an embodiment of a tracking filter, and FIG. 10 is a block diagram showing an embodiment of a conventional four-phase PSK carrier wave recovery circuit using a quadrupling method. 1... Inverse modulator, 2... Phase demodulator, 3... Tracking filter, 4, 5... Mixer, 6...
Voltage controlled oscillator, 7... Narrowband filter, 8...
Limiter (amplitude limiter), 9... Phase comparator, 1
0...4 multiplier, 11...1/4 frequency divider, 12...
Phase error detection circuit, 13... Voltage controlled phase shifter, 1
4... Phase detector, 15... Discriminator, 16... Multiplier, 17... Subtractor, 18... Loop filter, 19... DC amplifier, 20... Divider, 21
...π/2 phase shifter, 22...multiplier, 23...combiner.

[Claims]

1 With the sender data signal having a code transmission rate f ₁
2 ⁿ (n = 2, 3, 4,...) phase PSK modulated signal is further modulated by 2 phase PSK modulation by a sending sub data signal with a symbol transmission rate f ₂ (f ₁ > f ₂ ). In a demodulation device equipped with a phase-locked demodulator that obtains at least two demodulated signals having an orthogonal relationship from an input signal, a received sub-data signal corresponding to the sent sub-data signal is regenerated from the demodulated signal. means for determining the phase attraction state of the phase synchronization demodulator based on a frame signal included in the received sub-data signal; 1. A demodulation device comprising means for reproducing a receiver data signal corresponding to the sender data signal from the demodulated signal.