JPS6115610B2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to a demodulator for amplitude modulated (hereinafter abbreviated as AM) waves, and in particular to an AM demodulator suitable for demodulating when the carrier frequency and the frequency of the modulated signal are close to each other. It is related to.

Various types of AM demodulators have been known in the past, and their operations are well known, so
Although a general explanation will be omitted, all of these conventionally known demodulators are unsuitable as demodulators for AM waves in which the carrier frequency and the frequency of the modulated signal are close to each other, and each has its own drawbacks. It has

Figure 1 is a block diagram showing an example of a conventional AM demodulator, where 1 is a demodulation circuit, 2 is a compensation circuit, waveform A is the AM wave input to demodulation circuit 1, waveform B is the output of demodulation circuit 1, and waveform H is the AM wave input to demodulation circuit 1. This is the output of the compensation circuit 2.

In the AM demodulator shown in Fig. 1, when the carrier frequency and the frequency of the modulated signal are close to each other, the demodulation circuit 1 has a flat pass characteristic over the entire signal frequency band in order to separate the two, and the signal A low-pass filter (hereinafter abbreviated as LPF) must be provided with a steep cutoff characteristic that can provide sufficient attenuation to carrier frequencies close to the highest frequency within the frequency band. Since the demodulated waveform B passes through this LPF, it becomes a waveform containing overshoot and ringing. Generally, this waveform is passed through a compensation circuit 2 to obtain waveform C without delay distortion. That is, the shortcomings of the conventional circuit shown in FIG. 1 are that it requires an LPF with high quality characteristics and also requires a delay distortion compensation circuit 2.

Figure 2 is a block diagram showing another example of a conventional AM demodulator, in which 3 is a sampling pulse generator, 4 is a sample hold circuit, 5 is a buffer amplifier, and 6 is a block diagram showing another example of a conventional AM demodulator.
is the LPF, waveform E is the input AM wave, waveform H is the sampling pulse, waveform G is the output of buffer amplifier 5,
Waveform H shows the output of LPF6.

The sampling pulse generator 3 receives the waveform E and generates the sampling pulse shown in the waveform H at a phase corresponding to the positive peak point of the carrier wave. That is, the period T ₁ to the sampling pulse is equal to the period of the carrier wave. The switch 41 and capacitor 42 of the sample-and-hold circuit 4 represent the operation of the sample-and-hold circuit in terms of an equivalent circuit, but since the sample-and-hold circuit is generally well known, the explanation thereof will be omitted. The value of the positive peak point of waveform E is sampled and held, and its output becomes waveform G. The buffer amplifier 5 is provided to prevent the sample and hold circuit 4 from being affected by loads such as the LPF 6.

It is clear from the waveforms that the LPF 6 of the circuit of FIG. 2 can be made simpler than the LPF provided in the demodulation circuit 1 of the circuit of FIG. That is, the waveform T contains more high-order harmonic components of the carrier wave frequency than the carrier wave frequency component itself, and these high-order harmonic components can be sufficiently attenuated by a simple LPF. However, the waveform also includes a carrier frequency component, and the LPF 6 is required to provide a certain degree of attenuation to this carrier frequency component as well. Therefore, when the carrier frequency and the modulation signal frequency are close to each other, high performance is required for the LPF6, and the first
In the circuit of FIG. 2 in which the compensation circuit 2 in the corridor shown in the figure is not provided, the LPF 6 is also required to have low delay distortion, and the LPF included in the demodulator 1 of FIG.
Compared to , LPF6 is not very easy.

Furthermore, in the circuit of FIG. 2, since the sampling frequency is equal to the carrier wave frequency, there is a drawback that when the frequency of the modulation signal approaches this frequency, the demodulated signal component is distorted.

The purpose of this invention is to eliminate the above-mentioned drawbacks of conventional AM demodulators, and to provide an AM demodulator that does not cause overshoot or ringing as shown in waveform B of Figure 1. Embodiments of the invention will be described below with reference to the drawings.

FIG. 3 is a block diagram showing an embodiment of the present invention. In FIG. 3, 7 is a waveform processing circuit, and since this waveform processing circuit performs the first stage demodulation, it may also be called a demodulation circuit. The embodiment shown in FIG. 3 is comprised of a full-wave rectifier circuit 71, a phase lock loop (hereinafter abbreviated as PLL) 72, a 1/2 frequency divider circuit 73, and a multiplier circuit 74. 8 is a monostable multivibrator, 9 is a first differentiating circuit,
10 is a second differentiating circuit, 43 and 44 are circuits corresponding to 4 in FIG. In the circuit corresponding to 5 in Figure 2, 53 is the first buffer amplifier, and 5
4 is called a second buffer amplifier. 11 is a subtraction circuit, 12 is an analog gate, 13 is an integration circuit,
14 is an LPF.

Figure 4 is a waveform diagram showing the waveforms of each part in Figure 3.
Waveform a shows the input AM wave, waveform b shows the output of the full-wave rectifier circuit 71, waveform c shows the output of the PLL 72, and waveform d
is the output of the frequency dividing circuit, waveform e is the output of the differentiating circuit 10, waveform f is the output of the malte vibrator 8, waveform g is the output of the differentiating circuit 9, waveform h is the output of the multiplier circuit 74, and waveform i is the output of the buffer amplifier 53. , waveform j is the output of the buffer amplifier 54, waveform k is the output of the subtraction circuit 11, waveform l is the output of the analog gate 12, waveform m is the output of the integration circuit 13, waveform n is the LPF
14 output is shown.

The operation of the circuit shown in FIG. 3 will be explained below with reference to FIG. Waveform a is input to the full-wave rectifier circuit 71 to obtain waveform b as its output, but waveform b contains many frequency components twice the carrier wave, so the full-wave rectifier circuit 71 is called a frequency multiplier circuit. Alternatively, a frequency multiplier circuit other than a full-wave rectifier circuit may be used. PLL 72 is a circuit that automatically synchronizes the frequency and phase of an independent oscillator with the frequency and phase of waveform b, and in the embodiment shown in FIG. 3 outputs a rectangular wave shown as waveform c in FIG. 4. The phase of the peak point of waveform a matches the phase of the peak point of waveform b, and the waveform c is controlled so that the phase of its rising point matches the phase of the peak point of waveform b. For convenience, in this specification, the phase of a carrier wave component is expressed with its zero crossing point as zero degree. Therefore, waveform c is 0 ⁰ to 90 ⁰ of the carrier wave.
Low potential level at phase and 180 ⁰ to 270 ⁰ phase, 90 ⁰ to
It can be said that it is a rectangular wave with high potential levels at the 180 ⁰ phase, 270 ⁰ and 360 ⁰ phases. Frequency dividing circuit 73
inputs waveform c and outputs waveform d, which is a rectangular wave with half the frequency. Waveform d is carrier wave 0 ⁰ ~ 180 ⁰
high potential level in phase (i.e. first half cycle),
The potential level is low in the 180 ⁰ to 360 ⁰ phase (that is, the second half period). Differentiating circuit 1 calculates the rising point of waveform c.
Differentiate by 0 to obtain a sampling pulse of waveform e. That is, waveform e matches the ⁹⁰⁰ phase and ²⁷⁰⁰ phase of the carrier wave, and matches the peak point of waveform b. The waveform c also triggers the monostable multivibrator 8 at its rising point to generate a rectangular wave f that continues for a predetermined time from that point, and the rising point of the waveform f is detected by the differentiating circuit 9.
A sampling pulse represented by waveform g delayed by a predetermined short time from waveform e is obtained.

The first input of the multiplier circuit 74 is the waveform d, and the second input is the waveform a.While the waveform d is at a high potential level, the waveform a is multiplied by +1 (the waveform remains as it is), and the waveform d is While at a low potential level, the waveform a is multiplied by -1 (that is, the polarity is inverted) and output. Therefore, the output of the multiplier circuit 74 becomes as shown by waveform h in FIG.

Since the waveform h is sampled and held using the waveform g, the output of the buffer amplifier 53 becomes a waveform i. Since waveform i is sampled and held as waveform e, the output of buffer amplifier 54 becomes waveform j.
It is easy to understand that waveform j corresponds to a waveform obtained by delaying waveform i by a time corresponding to one sampling pulse.
It is clear that by subtracting waveform j from , the increment value of waveform i for each sampling pulse is obtained.
This is the signal shown by waveform k in FIG. Further, when waveform j is passed through the analog gate 12 only while waveform f is at a high potential level, waveform l is obtained. waveform l
is given as an initial value to the integrating circuit 13, and the integrating circuit 13 integrates the waveform k and outputs the waveform m. Waveform m is smoothed by LPF 14 to obtain waveform n.

It is easy to understand that the envelope connecting the carrier wave peak points of waveform h (indicated by the dotted line of waveform h in Figure 4) corresponds to the modulation signal, and waveform i
is a waveform whose peak point is sampled and held, waveform k corresponds to a waveform obtained by differentiating waveform i, and waveform m corresponds to a waveform obtained by integrating waveform k and corresponds to waveform i, so waveform m is the desired demodulated waveform. That is clear.

As explained above, in the AM demodulator of the present invention, the data obtained by the first stage of demodulation is obtained through the process of sampling by the sample and hold device 43, incremental value calculation by the subtraction circuit 11, and integration by the integration circuit 13. Since the waveform m can be obtained by sufficiently removing the carrier frequency component included in the waveform h obtained by sampling and holding the waveform h, or the carrier frequency component included in the waveforms i and j obtained by sampling and holding the waveform h, LPF1
4 may be a simple one, so that no delay distortion occurs, and therefore there is no need to provide the compensation circuit 2.

Also, compared to the sampling pulse (waveform c) in Figure 2, the sampling pulse in Figure 3 (waveforms e and g in Figure 4) has twice the carrier wave, so the frequency of the modulated signal is that much higher than the carrier wave. It has the advantage of being close to the frequency.

Although one embodiment of the present invention has been described above with reference to FIG. 3, it goes without saying that the present invention is not limited to a particular embodiment, and many different designs are possible. For example, the monostable multivibrator 8 and the first differentiator 9 in FIG. 3 can be replaced with a delay circuit that delays the output pulse of the second differentiator 10 by an appropriate amount, and the initial value It is not necessarily necessary to perform the setting for each sampling pulse as in the embodiment shown in FIG.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an example of a conventional AM demodulator, FIG. 2 is a block diagram showing another example of a conventional AM demodulator, and FIG. 3 is a block diagram showing an embodiment of the present invention. FIG. 4 is a waveform diagram showing waveforms at various parts in FIG. In the figure, 7 is a waveform processing circuit, 71 is a full-wave rectifier circuit, 72 is a PLL, 73 is a frequency dividing circuit, 74 is a multiplication circuit, 8 is a monostable multivibrator, 9 is a first differentiating circuit, and 10 is a second differential circuit. , 43 is a first sample and hold circuit, 44 is a second sample and hold circuit, 53 is a first buffer amplifier,
54 is a second buffer amplifier, 11 is a subtraction circuit, 53, 44, 54, and 11 constitute an incremental value calculation circuit, 12 is an analog gate, 12 is an integration circuit, and 14 is an LPF.

Claims (1)

[Scope of Claims] 1. A waveform processing circuit that inputs an amplitude-modulated carrier wave, inverts the polarity of the waveform in the latter half cycle of one cycle starting from the zero-crossing point of the carrier wave component, and outputs the inverted polarity. a first sample and hold circuit that samples and holds the output of the waveform processing circuit at a point near its peak point using a sampling pulse having a frequency twice that of the carrier wave;
An incremental value calculation circuit that calculates the increment value for each sampling pulse of the output of the sample hold circuit and the initial value that is the output of the first sample hold circuit before the increment value is added, and the first half initial value is the initial value of the integration. 1. A demodulator for amplitude modulated waves, comprising an integrating circuit that time-integrates a first half increment value given as a value. 2. The waveform processing circuit is a frequency multiplier circuit that inputs an amplitude-modulated carrier wave and outputs a waveform with twice the carrier wave frequency.The waveform processing circuit is phase-locked to the output of this frequency multiplier circuit and generates a rectangular waveform with a frequency twice the carrier wave frequency. A phase lock loop that generates a wave, a 1/2 frequency divider circuit that inputs the output of this phase lock loop and outputs the same rectangular wave as the carrier wave, and converts the output rectangular wave of this frequency divider circuit into a first The amplitude modulated carrier wave is used as an input, and when the first input is at a high potential level, the second input is multiplied by +1, and when the first input is at a low potential level, the second input is multiplied by +1. 2. The amplitude modulated wave demodulator according to claim 1, further comprising a multiplier circuit that multiplies the input of the signal by -1 and outputs the result. 3. The incremental value calculation circuit includes a first buffer amplifier that receives the output of the first sample and hold circuit, and uses a sampling pulse having a frequency twice that of the carrier wave to convert the output of the first buffer amplifier into a signal near the peak point of the carrier wave. A second sample-and-hold circuit samples and holds the sample at a point, and generates a delayed sampling pulse delayed by a sufficiently short time compared to the period of the sampling pulse from the sampling pulse of this second sample-and-hold circuit, and then returns the sample to the first sample-and-hold circuit. A pulse delay circuit that is used as a sampling pulse of the circuit, a second buffer amplifier that receives the output of the second sample and hold circuit, and the output of the second buffer amplifier is subtracted from the output of the first buffer amplifier for each sampling pulse. between the sampling pulse of the second sample hold circuit and the delayed sampling pulse;
2. The amplitude modulated wave demodulator according to claim 1, further comprising an analog gate that passes the output of the buffer amplifier and uses it as an initial value for integration.