JPS60217766A - Television receiver - Google Patents

Abstract

PURPOSE:To obtain a simply constituted digital television receiver, by performing the AD conversion by performing the sampling with a clock signal synchronizing to the carrier of an intermediate-frequency video signal, and making the video processing, sound processing, and synchronizing processing by means of the AD-converted output. CONSTITUTION:TV signals inputted from an antenna 1 are supplied to an AD converter 10 after passing through a tuner and video intermediate-frequency amplifier stage 9. The AD converter 10 also acts as a video detecting circuit and data sampled with clock pulses A1, A2, A3, A4... are used as detecting outputs among the outputs of the AD converter 10. Moreover, data sampled with clock pulses B1, B2, B3, B4... are used for driving a VCO11. Therefore, the AD converter 10 can be used as an image detecting circuit and, the AD converter 10 can be used in common for sound and image. Thus the AD converter including the sound IF stage of the downstream side can be digitized.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a television receiver that processes television signals using a digital circuit.

2. Description of the Related Art Structures of Conventional Examples and Their Problems In recent years, with advances in semiconductor technology and digital technology, digital television receivers have been developed in which signal processing in the television receiver is carried out by digital circuits. The effects are the following four points.

(1) It is easy to connect to TV peripheral equipment that supports new media such as teletext.

(Isao: New applications for television are possible through the application of memory.

(3) The number of parts can be significantly reduced, and costs and man-hours can be significantly reduced.

←No. One of the features of digital circuits is program-based control, which makes it easy to support various broadcasting systems and makes it possible to create a standard chassis that can be used worldwide.

A digital television receiver commonly considered at present is as shown in FIG. In this receiver, a television signal inputted from an antenna 1 passes through a tuner 2 and a video intermediate frequency amplification/detection stage 3, and then passes through an A/D converter 4 for sound and an A/D converter 6 for audio. The video signal and audio signal are each converted into digital signals. They are processed by the subsequent signal processing circuits 6 and 7 and added to the CRT and speakers. In this case, an A/D converter is required for each of the audio and movie systems, which has the disadvantage that the configuration is complicated.

OBJECTS OF THE INVENTION It is an object of the present invention to overcome the drawbacks of the prior art and to provide a digital television receiver with a simple configuration.

Structure of the Invention In the present invention, A/D conversion is performed in which a television signal supplied from a tuner and a video intermediate frequency amplification stage is sampled using a clock signal synchronized with the carrier of the intermediate frequency video signal and A/D converted. This is done using a circuit.

Description of an Actual Case An outline of an example of a real persimmon according to the present invention is shown in FIG. The difference from the one in Figure 1 is that the intermediate frequency imager (8) detection circuit is eliminated, and the A/
This is where only one D conversion 610 is provided. here,
The A/D converter 10 also serves as a video detection circuit.

The principle of operation will be explained with reference to FIGS. 3 and 4. Third
The figure shows a conventional video detection circuit, which has a vC08 that generates a subcarrier whose phase and frequency match the carrier, and a PLL circuit 12, which is used to perform synchronous detection, and is called a fully synchronous detection circuit. There is.

FIG. 4 shows a detection circuit using an A/D conversion circuit according to an example of the present invention, and the oscillation frequency of VC○11 is four times that in the case of FIG.

Figure 6 is an explanatory diagram, where a is an intermediate frequency video signal, b is ■C
011 clock signal. The clock signal (divided by the frequency divider 13 and used as a clock for various digital circuits. Among the outputs of the A/D converter 10, A1.A2.A)
3. The data sampled by the clock pulse of A4... is used for the detection output. Also, B1. B
2. B3. The data ~ sampled at B4 is input to the digital PLL filter 15, follows the D/A converter 16, and drives C011. The former extracts the peak value and can be used as a video detection output, and the latter can be used as the output of a phase detection output circuit.

Another practical example of the present invention having the same effect is shown in FIG. This means that the oscillation output of VC○11' is the same as in Figure 3.
Two frequencies with the same phase as the video intermediate frequency may be used. The basic operation of this circuit is the same as that shown in FIG.

Effects of the Invention As described above, according to the present invention, the following effects can be obtained.

(1) The A/D converter and video detection can be used together, simplifying the circuit.

(2) A/D converters for audio and video can be shared. This means that the filter circuit that separates the video signal and audio signal and the subsequent audio IF stage can also be included in the digital circuit, and the circuit can be simplified. (3) IF multiplied signal Since the signal is directly converted into a digital signal, signal deterioration and distortion are greatly reduced.As mentioned above, the present invention is basically a PLL synchronous detection circuit, but it can be greatly improved by using an A/D converter. It is something that can have great effects.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a conventional television receiver, FIG. 2 is a block diagram of a television receiver according to an embodiment of the present invention, and FIG. 3 is a block diagram of a conventional detection circuit.
FIG. 4 is a block diagram of a detection circuit according to the present invention, FIG. 5 is a block diagram of a detection circuit in another embodiment, and FIGS. 61a and 61b are waveform diagrams for explaining the operation. 9...Cheese video intermediate frequency amplification stage, 1o...
...A/D converter, 6...Video digital processing circuit, 7...Audio digital processing circuit, 1
1・・・・・・■ Name of CO0 agent Patent attorney Toshio Nakao and 1 other person Figure 1 Figure 3

Claims (1)

[Claims] A that samples the television signal supplied from the amplification stage using a clock signal synchronized with the carrier of the intermediate frequency video signal and converts it A/D.
/ A television receiver that is equipped with a D converter and uses the output of the A/D converter to perform television signal processing such as video processing, audio processing, and synchronization processing in a digital circuit.