JPS6025392A - Digital system television receiver - Google Patents

Abstract

PURPOSE:To decrease number of components by detecting both a video signal and a sound signal by one A/D converter. CONSTITUTION:A signal of a required channel is extracted from a television signal by a tuner 1 and the result is converted into an intermediate frequency signal. Then the A/D converter 14 applies A/D conversion to the sound signal and the video signal at the same time to attain detection. A digital video signal being the output is subjected to digital signal processing at a video chrominance circuit 3, where the signal is demodulated into a chrominance signal and then D/A-converted. Further, a cathode-ray tube 12 is driven via a video output circuit 4 of the next stage. On the other hand, the sound digital signal is demodulated into left and right channel sound signals separately at a sound processing circuit 15 and a speaker 11 is driven via a sound output circuit 10. Furthermore, a horizontal pulse and a vertical sawtooth wave are generated from the digital video signal via a deflection processing circuit 7.

Description

[Detailed description of the invention] Industrial application field of the present invention
This invention relates to a color television receiver that performs initial processing for reproduction.

Conventional configuration and its problems Traditionally, most color television receivers have been constructed from analog circuits. A block diagram of an example of its configuration is shown in FIG.

The video signal and the audio signal are each modulated into high frequency signals and transmitted. The tuner 1 extracts all the high frequency signals of one channel from the IS frequency signals and converts them to intermediate frequencies. The obtained intermediate frequency signal is amplified and detected by the next-stage IF detector 2 and separated into a video signal and an audio intermediate frequency signal (SIF signal). The video signal is demodulated into a color signal in the video chroma circuit 3, and amplified to a voltage sufficient to drive the cathode ray tube 12 in the next stage video output circuit 4. The video signal is separated into a direct synchronization signal and a horizontal synchronization signal in the deflection processing circuit, and the deflection processing circuit generates a horizontal pulse and a vertical sawtooth wave based on this synchronization signal. The horizontal pulse is amplified in the horizontal output circuit 8 and drives the horizontal deflection coil of the deflection coils 13. On the other hand, the vertical sawtooth wave is amplified in the vertical output circuit 9 and drives all of the vertical deflection coils of the deflection coils 13.

The SIF signal is input to the SIF detector 5 and detected, and is separated into necessary sounds in the next stage audio multiplexing circuit 6. The obtained audio signal is power amplified enough to drive the speaker 11 in the audio output circuit 1o.

This conventional analog television receiver has disadvantages such as requiring a large number of components other than resistors, capacitors, coils, etc., requiring many adjustment points, and being susceptible to aging.

On the other hand, digital television receivers have been attracting attention in recent years. The overall purpose of this is to eliminate the above drawbacks by using digital signal processing, and furthermore, by applying digital signal processing technology, it is possible to improve noise reduction, frame memory, etc. This makes it possible to perform functions that would not be possible with analog television receivers.

However, current digital television receivers convert all video signals from analog to digital (A/D conversion), and the IF detection stage has not yet been digitalized, so the above drawbacks still exist. What remains of the circuit before the wave stage.

Purpose of the Invention The entire purpose of the present invention is to digitize the IF detection stage to alleviate the following disadvantages. This makes it possible to reduce the number of A/D converters compared to conventional digital television receivers.

Composition of the Invention The digital television receiver according to the present invention has an analog-to-digital conversion of an intermediate frequency signal at a sampling frequency equal to the intermediate frequency of the television receiver.
/D converter is used.

Extract the synchronous signal part of the converted output signal, compare the position of the synchronous signal part with the sampling clock of the A/D converter, and use the output voltage of the phase detection signal to set the clock for the A/D converter. Voltage control for oscillation Controls the oscillation frequency of oscillation.

Then, from the video signal represented by the output digital signal of the A/D converter, video chroma signal processing,
The digital signal is thinned out by a subsampling processing circuit to a sampling rate required for deflection processing or audio signal processing. This allows video signal detection and audio signal detection to be processed using only one A/D converter.

DESCRIPTION OF EMBODIMENTS A digital television receiver according to an embodiment of the present invention will be described below with reference to all the drawings.

The entire configuration of this device is shown in Figure 2. R received by the antenna
The tuner 1 extracts one high frequency signal of the required channel from the F television channel and outputs the intermediate frequency (IF) signal.
Convert to belief υ. Then, the A/D converter 14 simultaneously A/D converts the intermediate frequency signal into an audio signal and a video signal, thereby performing detection. The output digital video signal is digitally processed in the video chroma circuit 3, demodulated into a color signal, and then sent to the D/A.
Convert. Then, in the next stage video output circuit 4, the digital video signal is amplified to a voltage sufficient to drive the cathode ray tube 12, and the digital video signal is subjected to digital signal processing in the deflection processing circuit 7. death,
Generates horizontal pulses and vertical sawtooth waves. The horizontal pulse is amplified in the water 114 output circuit 12 and deflection coil 13
All of the horizontal deflection coils are driven. Tare 1i! 1' sawtooth wave is amplified in the vertical output circuit 9 and deflection coil 1
All three vertical deflection coils are driven.

The audio digital signal is subjected to digital signal processing in the audio processing circuit 16 and is separated and demodulated into the left A and A sounds. and,
The next stage audio output circuit 1o amplifies the power enough to drive the speaker 11 and drives the speaker 11.

Next, the A/D converter 14 will be explained.

FIG. 3a is an intermediate frequency signal, fully showing how it is modulated by a video signal and an audio signal. In FIG. 3B, the envelope becomes the video signal and audio signal to be demodulated. Therefore, as shown in FIG. 3, by sampling the apex of the intermediate 1D wave signal υ with a sampling clock of all the intermediate frequencies and performing A/D conversion, detection can be performed.

FIG. 4 shows an example of the configuration of such an A/D converter 14. The IF multiplied signal is input to an A/D converter 142L that uses the intermediate frequency as a sampling clock, and is converted into a digital signal using the intermediate frequency sampling clock from the voltage controlled oscillator (vCO) 14C. The phase detector 14b extracts only the synchronizing signal part of the video signal converted into a digital signal, performs phase detection between the synchronizing signal part of the converted output digital signal and the sampling clock, and detects errors in sampling frequency and phase. To detect. The error detection signal is output as a full analog voltage and input to the VCO 14c. The frequency of vC014C is controlled by this analog voltage, and is precisely synchronized with the generated sampling clock all intermediate frequency signals.

This phase detector 14b will be explained ○Figure 3(b)
schematically shows an intermediate frequency signal sampled using an intermediate frequency sampling clock; here, P
,,P,1 (j is an integer) is a sampling point. Further, phase detection is performed only during the horizontal pulse period when a horizontal pulse is inputted from the subsequent deflection processing circuit.

The phase error signal is extracted by the phase detector 14b as follows. Assuming that the number of samples in the horizontal pulse period is 5, the error signal Er is E - Σ P.

r, ]=1. Here, P, = a + bcosθ
When expressed as Er:,Σ(a,,+bcosθ)1=1. Here, assuming that the intermediate frequency signal is AGC-controlled in advance and clamped before A/D conversion, the constants a and b can be normalized to 1. Further k
When divided by , the error signal Er' becomes E,'=cosθ. Here, if the control signal is EC, the sampling clock can be synchronized with the peak of the intermediate frequency signal by performing the calculation E=9=sin0.

The n-bit digital signal output from the OA/D converter 14a is transferred to the accumulator 16 as shown in FIG.
Enter. Here, the error signal Er' is obtained by extracting and calculating only that period of the horizontal pulse and averaging it. Further, the squarer 16 in the next stage and subsequent stages performs squaring, and the subtracter 17
The control signal E is obtained by subtracting it from 1 and performing the square root calculation using a square rooter.

get. This control signal EC (5D/A converter 19
is converted into an analog voltage to control the frequency of the VCO 14c.

On the other hand, the digital signal converted by the A/D converter 14a is input to the next-stage sub-sampling circuit 14d, where it is thinned out and sampled to the required frequency, and then sent to the next-stage video chroma circuit 3, deflection processing circuit 7, or audio processing circuit. The signal is input to the circuit 16.

Effects of the Invention As described above, the configuration of the present invention enables a digital television receiver in which the intermediate frequency signal detection stage is digitalized. According to this configuration, the intermediate frequency signal detection stage and subsequent stages are digitized, thereby reducing the number of parts, man-hours, and deterioration over time. In addition, the application of digital signal processing allows noise removal and the use of frame memory to enable various applications that are not possible with analog television receivers. Also, compared to current digital television receivers, it is A/
D: The number of parts can be reduced by requiring only one converter.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a conventional analog television receiver, and FIG. 2 is an example of the configuration of a digital television receiver according to an embodiment of the present invention.
It is a block diagram of a D converter. 1...Tuner, 3...Video chroma circuit, 4...Picture output circuit, 7...Deflection processing circuit, 14...A/D conversion circuit , 16... Calendar processing circuit, 14a... A/D converter, 14b... Phase detector, 14c...
VCo, 14d...Zubzampling circuit.

Claims (1)

[Claims] An A/D converter converts an intermediate frequency signal from analog to digital at a sampling frequency equal to the television intermediate frequency, and the synchronizing signal portion of the converted output signal is taken in its entirety, and the signal of the synchronizing signal portion is combined with the signal of the above A/D converter. Compare the entire phase with the spring/pulling clock.
A voltage-controlled oscillator whose oscillation frequency is controlled by the output voltage of the phase detector and a voltage-controlled oscillator that generates the sampling clock, and a video chroma signal from the video signal represented by the output digital signal of the A/D converter. It has a subsampling processing circuit that thins out the digital signal to the sampling rate required for processing, deflection processing, or audio signal processing, and has a subsampling processing circuit that thins out the digital signal to the sampling rate required for processing, deflection processing, or audio signal processing.
A digital television receiver that uses a /D converter to detect waves.