JPS5935205B2 - Carrier wave generation circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a carrier wave generation circuit that synchronizes with pilot input and generates a carrier wave having a frequency that is an integral multiple of the pilot m wave number.

Conventionally, a circuit as shown in FIG. 1 has been used as such a carrier wave generating circuit.

In Fig. 1, 1 is a pilot signal input terminal, 2 is a pilot frequency band-pass filter, 3 is a clipper, and 4 is a pilot signal input terminal.
5 is a differential circuit, 5 is a full-wave rectifier circuit, 6 is a band-pass filter with a carrier frequency (an integral multiple of the pilot frequency), 7 is an amplifier, and 8 is a carrier output terminal.

In this circuit, a constant frequency (for example, 6
After noise and interference signals are removed from the pilot signal (0Hz) by a bandpass filter 2, it is shaped by a clipper 3 into a rectangular wave (to be precise, a trapezoidal wave) with a duty of 50%, and is differentiated by a differentiator 4.

Since the output of the differentiating circuit 4 contains harmonics of the pilot frequency in a substantially uniform spectrum, it is passed through the bandpass filter 6.
Only predetermined harmonics are extracted through the amplifier 7, amplified to a predetermined level by an amplifier 7, and outputted from an output terminal 8.

In this case, the output of the differentiating circuit 4 includes only odd harmonics of the pilot frequency, so if you want to obtain a carrier wave with an odd multiple of the pilot frequency, you can directly apply the output of the differentiating circuit 4 to the bandpass filter 6. However, when it is desired to obtain a carrier wave that is an even number multiple of the pilot frequency, the output of the differentiating circuit 4 is converted to an even number harmonic through a full-wave rectifier circuit 5 and then applied to a band pass filter 6.

Such a conventional carrier wave generation circuit has the following characteristics: (a) Good ability to follow the ON-OFF state of the carrier wave output with respect to the ON/OFF state of the pilot input.

b. When the circuit fails, the carrier wave output is turned off and has fail-safe characteristics.

However, it has the disadvantage that spurious components are likely to be mixed into the carrier wave output if AM is applied to the pilot input or interference waves are superimposed.

In other words, the AM of the pilot input is suppressed by the clipper 3, but when the input level is low, the effect of the clipper is incomplete and sideband spurious occurs in the clipper output.
Multiplication increases the level of spurious signals.

Interfering waves are removed by band pass filter 2, but if the interference wave's self-wave number is close to the pylon T [wave number], it is necessary to make the bandwidth of the band pass filter extremely narrow, and the filter is large and has a high side. becomes.

It is conceivable to use a phase-locked loop (hereinafter referred to as PLL) as a means of improving the drawbacks of such a conventional carrier wave generation circuit.

FIG. 2 shows a circuit diagram of the PLL.

In the figure, 9 is a phase detector 10 is a voltage controlled oscillator (hereinafter ■C
11 is a frequency divider, and 12 is a loop filter.

The operation of PLL as shown in the figure is well known, and the frequency divider 1
When the frequency division number of 1 is n, the oscillation frequency of C010 is synchronized to a frequency n times the frequency of the signal applied from input terminal 1.

Therefore, by adding a pilot signal from input terminal 1 and choosing n equal to a predetermined multiplication number, the output from output terminal 8 will be the desired carrier wave.

In principle, this PLL is less susceptible to input level fluctuations and AM effects, and by appropriately designing the negative feedback loop gain and loop filter to make the closed loop bandwidth sufficiently narrow, it is possible to eliminate interference waves that are quite close to the pilot frequency. It is also possible to eliminate the influence, and the drawbacks of the conventional carrier wave generation circuit as described above can be improved.

However, as it is, there is a drawback that the ability to follow the on/off of the pilot input and the fail-safe property against circuit failure are lost.

By adding some circuits to the PLL, this invention
The present invention solves the drawbacks of the PLL described above and provides a carrier wave generation circuit with excellent performance.

The present invention will be explained below using an embodiment of the present invention shown in FIG.

In FIG. 3, 9, 10, 11, and 12 constitute the same PLL as in FIG. 2, 13 is a 90° phase shifter, 14 is a synchronous wave detector, and 15 is a gate circuit.

Since the PLL is automatically controlled so that the output of the divider 11 has a phase almost orthogonal to the pilot input (the output of the phase detector 9 is almost zero), the output of the divider 11 is passed through the phase shifter 13 to the pilot input. Almost in phase, synchronous detector 14
In addition, when the pilot signal from the input terminal 1 is synchronously detected, a DC voltage proportional to the amplitude of the pilot input is obtained at the output of the input terminal 14.

This voltage controls the gate circuit 15, and when the synchronous detection output is above a certain voltage, the gate is opened and the output of vcoio is guided to the output terminal 8, and when the synchronous detection output is below a certain voltage, the gate is closed and the output terminal No output will be output to 8.

In this way, when the pilot input is turned OFF or when the phase synchronization is lost due to a circuit failure, the output of the synchronous detector 14 becomes zero, and when the pilot input is turned on, the output of the synchronous detector 14 becomes zero.
It is possible to provide followability when the device is turned off and fail-safe property against circuit failure.

As described above, the present invention is stable against fluctuations in pilot input level, amplitude modulation, and interference wave contamination.
It is possible to obtain a carrier wave generation circuit that generates a carrier wave with less spurious, has good followability to on/off of pilot input, and has fail-safe properties against circuit failure.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a conventional carrier wave generation circuit, FIG. 2 is a block diagram of a PLL, and FIG. 3 is a block diagram showing an embodiment of the present invention. In the figure, 1 is a pilot input terminal, 9 is a phase detector, 10 is a frequency divider, vCOll is a frequency divider, 12 is a loop filter, 13 is a 90° phase shifter, 14 is a synchronous detector, 15 is a gate circuit,
8 is a carrier wave output terminal. Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

[Claims] 1 Voltage controlled oscillator (VCO), branch unit, phase detector,
A phase-locked loop (PLL) consisting of a loop filter and
), by adding a pilot input to the phase detector, the frequency of the vCO is synchronized to an integer multiple of the pilot frequency (an integer equal to the number of divisions of the divider), and the output of the divider is set to 90
° After passing through a phase shifter, the pilot input is added to a synchronous detector together with the pilot input, and the pilot input is synchronously detected, and the synchronous detection output and vCO output are added to the gate circuit. Only when the synchronous detection output is above a certain voltage, ■ CO output 1. A carrier wave generation circuit characterized in that the carrier wave is guided to an output terminal.