JPS61152053A - Lead frame, semiconductor device incorporating said lead frame, and manufacture thereof - Google Patents

Lead frame, semiconductor device incorporating said lead frame, and manufacture thereof

Info

Publication number
JPS61152053A
JPS61152053A JP59273104A JP27310484A JPS61152053A JP S61152053 A JPS61152053 A JP S61152053A JP 59273104 A JP59273104 A JP 59273104A JP 27310484 A JP27310484 A JP 27310484A JP S61152053 A JPS61152053 A JP S61152053A
Authority
JP
Japan
Prior art keywords
lead
lead frame
semiconductor device
oxide film
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59273104A
Other languages
Japanese (ja)
Inventor
Hajime Murakami
元 村上
Akira Suzuki
明 鈴木
Kazu Sasaki
計 佐々木
Shunichiro Matsumoto
俊一郎 松本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Proterial Ltd
Original Assignee
Hitachi Ltd
Hitachi Metals Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi Metals Ltd filed Critical Hitachi Ltd
Priority to JP59273104A priority Critical patent/JPS61152053A/en
Publication of JPS61152053A publication Critical patent/JPS61152053A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485—Material
    • H01L2224/48505—Material at the bonding interface
    • H01L2224/48599—Principal constituent of the connecting portion of the wire connector being Gold (Au)
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485—Material
    • H01L2224/48505—Material at the bonding interface
    • H01L2224/48599—Principal constituent of the connecting portion of the wire connector being Gold (Au)
    • H01L2224/486—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/48638—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/48644—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/85444—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01014—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE:To improve the damp-proof feature of a semiconductor device packaged in molding resin by a method wherein, on the surface of a lead section to adhere to a packaging resin, a lead frame is built of iron-base material coated with an oxide film similar to that coating the lead material. CONSTITUTION:A package 1 is molded in a novolak epoxy resin 2 and a pellet 5 is installed, through the intermediary of a gold-silicon eutectic layer 4, on a tab 3 located approximately at the middle of the package 1. The bonding pad 6 of the pellet 5 is electrically connected to the inner lead 7a of a lead 7 by a gold wire 8. A bonding section 9 built of gold is provided on the upper surface of the point of the inner lead 7a. The surface of the inner lead 7a other than the bonding section 9 is provided with an oxide film 10 similar to the one covering the lead material. Further, by forming an oxide film with its thickness not thinner than 100Angstrom on said surface of the inner lead 7a, adhesion is greatly increased between said surface and the resin 2, which also suppresses the invasion of moisture etc. along the interface of adhesion.

Description

【発明の詳細な説明】 ［技術分野］ 本発明は、樹脂モールドでパッケージを形成する技術に
関し、リードフレームおよびそれを用いた半導体装置に
適用して有効な技術に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a technique for forming a package using a resin mold, and relates to a technique that is effective when applied to a lead frame and a semiconductor device using the same.

［冑景技術］ 近年、半導体装置の多機能化と該半導体装置の大型化と
該ペレットを内蔵するパッケージの小型化という相反す
る要求を満たす必要があるため、ペレット側端とパッケ
ージ側端との間の寸法がますます減少する傾向にある。[Kukei Technology] In recent years, it has become necessary to satisfy the contradictory demands of increasing the functionality of semiconductor devices, increasing the size of the semiconductor devices, and miniaturizing the packages containing the pellets. The trend is for the dimensions between them to become smaller and smaller.

前記傾向の結果として、°いわゆる樹脂封止型半導体装
置においては、パッケージ樹脂に埋設され接着されてい
る内部リードの短縮が現れ、半導体装置の耐湿性低下を
来すという問題を生じることになる。As a result of the above-mentioned tendency, in so-called resin-sealed semiconductor devices, the internal leads embedded and bonded in the package resin tend to be shortened, resulting in a problem that the moisture resistance of the semiconductor device is reduced.

すなわち、内部リードの短縮に伴いパッケージ樹脂との
接着面積が減少する；とになるため、リードノハッケー
ジへの固定強度が低下することになる。その結果、温度
変化を繰り返し受けるという温度サイクルにより、また
は半導体装１の製造工程におけるリード折曲時の応力に
より、内部リードとパッケージ樹脂との接着界面に剥が
れが生じ易くなり、この剥がれにより水分等の腐食物質
が侵入し、さらにワイヤを伝ってペレットの電極部に至
り、該電極部等を腐食して断線等を来すのである。That is, as the internal leads are shortened, the adhesive area with the package resin is reduced; therefore, the strength of fixing the leads to the hack cage is reduced. As a result, the adhesive interface between the internal leads and the package resin tends to peel off due to the temperature cycle of repeated temperature changes or due to stress during lead bending in the manufacturing process of the semiconductor device 1, and this peeling can cause moisture etc. The corrosive substances enter the wire and reach the electrode portion of the pellet through the wire, corroding the electrode portion and causing wire breakage.

また、剥がれが生じないまでも、内部リードとパッケー
ジ樹脂との接着が不十分であれば、その接着界面より水
分等が浸透していき、同様に断線等の電気的不良を来す
ことになるが、内部リードが短縮されると水分等の浸透
経路も短縮されることになるため、耐湿性の低下を来す
という問題もある。Furthermore, even if peeling does not occur, if the adhesion between the internal leads and the package resin is insufficient, moisture, etc. will permeate through the adhesion interface, causing electrical failures such as disconnections. However, if the internal leads are shortened, the permeation path for moisture and the like is also shortened, resulting in a problem of reduced moisture resistance.

以上の問題を解決するためには是非とも内部リードとパ
ッケージ樹脂との接着性を向上させることが必要である
。In order to solve the above problems, it is absolutely necessary to improve the adhesiveness between the internal leads and the package resin.

そのための技術の一つに、リードフレームの表面を粗面
化し、パッケージ樹脂との接着性の向上を図るとするも
のがあり、特開昭５８−６４０５６号公報に詳細に説明
されている。One of the techniques for this purpose is to roughen the surface of the lead frame to improve its adhesion to the package resin, which is described in detail in Japanese Patent Laid-Open No. 58-64056.

ところで、リードフレームのタブ周囲に配置されている
リード内端部には通常ボンディング部を金または銀の貴
金属を部分めっき法等により被着して形成することが行
われるが、前記粗面化されナー　ＩＩ　　　　　Ｖ−）
ＩＩ−１，１９ＤＲ１５−ｋｈ　　　　＆　辻’ＭＥ−
１１，Ｍ　　リ：、−Ｊグ部を形成する場合、リード表
面の凹凸面を埋めるために余分な貴金属が必要となるた
め問題であることが本発明者により見い出された。By the way, bonding parts are usually formed on the inner ends of the leads arranged around the tabs of the lead frame by depositing precious metals such as gold or silver by selective plating, etc. Nah II V-)
II-1, 19DR15-kh &Tsuji'ME-
The inventors have found that when forming the 11,M ri:, -J portion, an extra precious metal is required to fill in the uneven surface of the lead surface, which is a problem.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、パッケージが樹脂でモールド形成され
た半導体装置の耐湿性を向上させることのできる技術を
提供することにある。An object of the present invention is to provide a technique that can improve the moisture resistance of a semiconductor device whose package is molded with resin.

本発明の他の目的は、前記半導体装置の製造に好適なリ
ードフレームおよびその製造技術を提供することにある
。Another object of the present invention is to provide a lead frame suitable for manufacturing the semiconductor device and a manufacturing technique thereof.

本発明の前記ならびにその他の目的と新規な特徴は、本
明細書の記述および添付図面から明らかになるであろう
。The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

〔発明の概要〕 本願において開示される発明のうち代表的なものの概要
を簡単に説明すれば、次の通りである。[Summary of the Invention] A brief overview of typical inventions disclosed in this application is as follows.

すなわち、少なくともパッケージ樹脂に接着するリード
部（以下、内部リードともいう、）の表面に該リード材
料自体を酸化してなる酸化膜が形成された炒系材料から
なるリードフレームを用いて樹脂封止型半導体装置を製
造することにより、またはパッケージのモールド形成前
の任意の段階において鉄系材料からなるリードフレーム
の少なくとも内部リードの表面に酸化膜を形成せしめて
樹脂封止型半導体装置を製造することにより、内部リー
ドとパンケージ樹脂との接着強度を増大させることがで
きることより、リード折曲成形時または温度サイクルを
受けた場合等に内部リードとパッケージ樹脂との接着面
に剥がれが発生することを防止できることより、前記目
的が達成できるものである。That is, resin sealing is performed using a lead frame made of a oxidized material in which an oxide film formed by oxidizing the lead material itself is formed on the surface of at least the lead portion (hereinafter also referred to as internal lead) that is bonded to the package resin. or by forming an oxide film on the surface of at least the internal leads of a lead frame made of an iron-based material at any stage before molding a package to produce a resin-sealed semiconductor device. By increasing the adhesive strength between the internal leads and the package resin, it is possible to prevent the adhesive surface between the internal leads and the package resin from peeling off during lead bending molding or when subjected to temperature cycling. As a result, the above objectives can be achieved.

また、同様に内部リードとパッケージ樹脂との接着強度
を増大させることができることより、両者をより密着し
た状態にすることができるため、両者の界面を伝って水
分等の腐食物質が浸透してい（ことをも抑制でき、前記
目的が達成できるものである。In addition, by increasing the adhesive strength between the internal leads and the package resin, it is possible to bring them into closer contact, which prevents corrosive substances such as moisture from penetrating through the interface between the two. It is also possible to suppress the above-mentioned problems and achieve the above-mentioned purpose.

〔実施例１〕 第１図は本発明による実施例１である半導体装置に用い
られているリードを、拡大部分断面図で示すものであり
、第２図は本実施例１の半導体装置を、そのほぼ中心を
切る面における断面図で示すものである。[Example 1] FIG. 1 shows an enlarged partial sectional view of a lead used in a semiconductor device according to Example 1 of the present invention, and FIG. 2 shows a lead used in a semiconductor device according to Example 1 of the present invention. This is a cross-sectional view taken along a plane cut approximately at the center.

本実施例１の半導体装置は、いわゆる樹脂封止型半導体
装置であり、パッケージ１がノボラックエポキシ樹脂２
でモールド形成され、該パッケージ１のほぼ中央のペレ
ット取付部であるタブ３には金−シリコン共晶４を介し
てペレット５が取り付けられており、該ペレット５のボ
ンディングパソド６はリード７の内端部と金ワイヤ８に
より電気的に接続されているものである。The semiconductor device of Example 1 is a so-called resin-sealed semiconductor device, and the package 1 is made of novolac epoxy resin 2.
A pellet 5 is attached to a tab 3 which is a pellet attaching part in the approximate center of the package 1 via a gold-silicon eutectic 4, and a bonding pad 6 of the pellet 5 is attached to a tab 3 which is a pellet attaching part in the approximate center of the package 1. It is electrically connected to the inner end by a gold wire 8.

本実施例１の特徴は、材料が４２アロイと称される鉄ニ
ツケル合金のような鉄系材料であるリード７のパッケー
ジ形成樹脂２に埋設されている内部リード７ａにある。The feature of the first embodiment is that the inner lead 7a is embedded in the package forming resin 2 of the lead 7, which is made of an iron-based material such as an iron-nickel alloy called 42 alloy.

すなわち、第１図においてリード７を拡大して示すよう
に、リード７の内端部である内部リード７ａの先端上面
には金でボンディング部９が形成されており、それ以外
の内部リード７ａの表面には該リード材料を酸化してな
る酸化膜１０がｉ成されている。That is, as shown in an enlarged view of the lead 7 in FIG. 1, a gold bonding part 9 is formed on the top surface of the tip of the internal lead 7a, which is the inner end of the lead 7, and the other part of the internal lead 7a is An oxide film 10 formed by oxidizing the lead material is formed on the surface.

樹脂２との接着強度は、酸化膜１ｏが形成されることに
よって増大される。The adhesive strength with the resin 2 is increased by forming the oxide film 1o.

かかる接着強度は、酸化膜１０の厚さに影響されること
が明らかとなった。接着強度は、所定の酸化膜厚さにお
いて極大となる０種々実験の結果、接着強度は、酸化膜
１Ｇが４００人ないし８００Ａの範囲である場合に著し
く増大することが明らかとなった。It has become clear that such adhesive strength is influenced by the thickness of the oxide film 10. The adhesive strength reaches its maximum at a predetermined oxide film thickness.As a result of various experiments, it has been revealed that the adhesive strength increases significantly when the oxide film 1G is in the range of 400 to 800A.

次表は、４２アロイからなるリードフレームを、空気中
において酸化する場合の加熱時間もしくは酸化時間を３
分間に固定し、かつ加熱温度もしくは酸化温度を変化さ
せた場合に得られる酸化膜ＩＯの厚さと、接着強度との
関係を示している。The following table shows the heating time or oxidation time when a lead frame made of 42 alloy is oxidized in air.
The graph shows the relationship between the thickness of the oxide film IO obtained when the heating temperature or the oxidation temperature is fixed for 10 minutes and the adhesive strength is varied.

□表□ なお、上表の剪断接着力は酸化処理を行ったリードフレ
ームの表面に樹脂を接着し、その接着面におけるずれ応
力を測定したものである。□Table □ The shear adhesive strength in the above table is obtained by bonding a resin to the surface of a lead frame that has been subjected to oxidation treatment, and measuring the shear stress on the bonded surface.

前記表より、４００Å以上の厚さの酸化膜を形成するこ
とにより、明らかに接着力の増大が認められる。６００
人の場合は未処理の場合に比べ２倍以上の９．４ｋｇ／
（ｄめ接着力を示した。したがって、内部リード部７ａ
に形成する酸化膜の厚さとしては４００Å以上であれば
よく、６００人前後にすることが特に望ましいものであ
る。From the above table, it is clearly recognized that the adhesive force is increased by forming an oxide film with a thickness of 400 Å or more. 600
In the case of humans, it weighs 9.4 kg/more than twice that of untreated cases.
(The adhesive strength was d. Therefore, the inner lead portion 7a
The thickness of the oxide film to be formed may be 400 Å or more, and it is particularly desirable to have a thickness of about 600 Å.

このように、内部リード７ａの表面に１００人以上の厚
さの酸化膜を形成することにより、樹脂２との接着強度
を大巾に増大させることができるものであり、その結果
、リード７をパフケージｌの側端近傍で折曲形成を行う
場合であっても、または温度サイクルを受ける場合であ
っても、内部リード７ａと樹脂との接着面に剥がれが発
生することを有効に防止できるものである。In this way, by forming an oxide film with a thickness of 100 mm or more on the surface of the internal lead 7a, the adhesive strength with the resin 2 can be greatly increased, and as a result, the lead 7 can be Even when bending is performed near the side end of the puff cage l or when the puff cage l is subjected to temperature cycling, peeling can be effectively prevented from occurring on the adhesive surface between the internal lead 7a and the resin. It is.

また、同様の理由により、前記接着面を伝って水分等が
浸透していくことも抑制できる。Furthermore, for the same reason, it is also possible to suppress the penetration of moisture and the like along the adhesive surface.

第３図は、本発明により実施例であるリードフレームを
、その１単位の平面図で示すものである。FIG. 3 is a plan view of one unit of a lead frame according to an embodiment of the present invention.

そして、本実施例のリードフレームは、前記半導体装置
の製造に用いられるものである。The lead frame of this example is used for manufacturing the semiconductor device.

本実施例のリードフレームは、第３図に示すものを１単
位として、該単位が図中左右に連設されてなるものであ
り、その１単位は外枠１１と仕切枠１２とで周囲が四角
形に形成されており、該単位のほぼ中央にはタブ３がタ
ブ吊りリード１３を介して外枠１１で固定され、該タブ
３の周囲にはリード７の内端部が、その途中を両端が外
枠１１に連結されているタイバー１４で支持された状態
で、仕切枠１２より延在形成されてなるものである。The lead frame of this embodiment has the unit shown in FIG. 3 as one unit, and these units are successively arranged on the left and right in the figure, and each unit is surrounded by an outer frame 11 and a partition frame 12. It is formed into a rectangular shape, and a tab 3 is fixed to the outer frame 11 via a tab suspension lead 13 at approximately the center of the unit. are extended from the partition frame 12 while being supported by tie bars 14 connected to the outer frame 11.

本実施例においては、リード７内端部上面に金でボンデ
ィング部９が形成されている以外は、はぼタイバー１４
より内側に位置する内部リード７ａの表面には、酸化膜
１０が形成されている。In this embodiment, the tie bar 14 is hollow except that the bonding part 9 is formed of gold on the upper surface of the inner end of the lead 7.
An oxide film 10 is formed on the surface of the internal lead 7a located further inside.

リードフレームは、材料である４２アロイを所定の厚さ
に圧延成形した後、プレス加工またはエツチングにより
、所定のパターンに形成して製造される０本実施例のリ
ードフレームは、パターン形成後にリード７の内端部の
上面にのみ、たとえば部分めっき法で金を被着した後、
目的の部分以外にステンレス等のマスクを密着させた状
態で、所定条件下たとえば３５０℃〜５００℃で３分間
空気酸化を行って完成されるものである。この加熱条件
は、通常のワイヤボンディング工程における条件を超え
るものである。The lead frame is manufactured by rolling 42 alloy material to a predetermined thickness and then forming it into a predetermined pattern by press working or etching. After applying gold only to the top surface of the inner end, for example, by selective plating,
It is completed by air oxidation under predetermined conditions, for example, at 350° C. to 500° C. for 3 minutes, with a mask made of stainless steel or the like in close contact with areas other than the target area. This heating condition exceeds the conditions in a normal wire bonding process.

なお、前記酸化処理を高温で、たとえば４００℃以上で
行う場合は、酸化膜形成の他に、リード表面に製造工程
等で付着した油等の付着物を除去することができるので
、リード表面の浄化をも達成できる。Note that when the oxidation treatment is performed at a high temperature, for example, 400°C or higher, in addition to forming an oxide film, it is also possible to remove deposits such as oil that have adhered to the lead surface during the manufacturing process. Purification can also be achieved.

本実施例のリードフレームを用いて前記実施例１の半導
体装置を製造する場合は、通常の樹脂封止型半導体装置
の製造技術が、そのまま適用できる。When manufacturing the semiconductor device of Example 1 using the lead frame of this example, the manufacturing technology of ordinary resin-sealed semiconductor devices can be applied as is.

すなわち、ペレット５をタブ３に取り付けた後、ワイヤ
ボンディングを行って組立が完了したものを金型を用い
て、樹脂をモールドしてパッケージｌを形成し、その後
リード７の切断、折曲等の成形を行い、さらにリード７
にめっき等の方法で半田を被着して完成されるものであ
る。That is, after attaching the pellet 5 to the tab 3, wire bonding is performed to complete the assembly, and then a resin is molded using a metal mold to form the package l, and then the leads 7 are cut, bent, etc. After molding, lead 7
It is completed by applying solder using a method such as plating.

［実施例２］ 第４図は、本発明による実施例２であるリードフレーム
を、その１単位の平面図で示すものである。[Example 2] FIG. 4 is a plan view of one unit of a lead frame according to Example 2 of the present invention.

本実施例２のリードフレームは、ぼぼ前記実施例と同様
であるが、酸化膜１０が内部リードに限定されず、タブ
３の片面を除きリードフレーム仝体に酸化膜ｌＯが形成
されていることにある。The lead frame of Example 2 is almost the same as the previous example, but the oxide film 10 is not limited to the internal leads, and the oxide film 10 is formed on the entire lead frame body except for one side of the tab 3. It is in.

このリードフレームはタブのみをマスクして酸化処理を
行うことにより製造できるため、製造が容易であす、゛
それ故に量産に適している。This lead frame can be manufactured by masking only the tabs and performing oxidation treatment, so it is easy to manufacture and is therefore suitable for mass production.

本実施例２のリードフレームを用いる場合であっても、
前記実施例の場合と同様に、通常の製造技術で容易に前
記実施例１の半導体装置を製造することができる。Even when using the lead frame of Example 2,
As in the case of the above embodiment, the semiconductor device of the above embodiment 1 can be easily manufactured using normal manufacturing techniques.

すなわち、最終工程の半田めっきを行う前に、通常の酸
洗いでリードを前処理することにより活性化を行うが、
その前処理工程で内部リード以外の酸化膜は容易に除去
できるため、結果的に前記実施例２の場合とほぼ同一の
ものが完成する。In other words, before the final process of solder plating, the leads are pretreated with normal pickling to activate them.
Since the oxide film other than the internal leads can be easily removed in the pretreatment step, a product almost the same as that of the second embodiment is completed as a result.

半田ディツプを行う場合もリードの酸処理等の前処理を
行うので同様のことがいえる。The same thing can be said when performing solder dipping, since pretreatment such as acid treatment of the leads is performed.

［実施例３］ 実施例３は、本発明による半導体装置の一製造方法であ
る。[Example 3] Example 3 is a method for manufacturing a semiconductor device according to the present invention.

本実施例の製造方法は、前記実施例１または２で示した
方法と異なり、通常のリードフレームを用い、パッケー
ジ１のモールド形成前の任意の段階に酸化工程を導入す
るものである。The manufacturing method of this example differs from the method shown in Example 1 or 2 above, in that a normal lead frame is used and an oxidation step is introduced at an arbitrary stage before forming the mold of the package 1.

すなわち、酸化工程を、＋１１リ一ド内端部にボンディ
ング部を形成した後、（２）タブ３ヘペレツト５を取り
付けた後または（３）ワイヤボンディング後のいずれか
の段階に導入し、内部リード７ａのみにまたはリードフ
レーム全体に酸化膜ｌＯを形成し、その他の工程は通常
の製造技術により、前記実施例２または３とほぼ同様の
半導体装置の製造が゛達成される。That is, the oxidation process is introduced at any stage after forming the bonding part at the inner end of the +11 lead, (2) after attaching the tab 3 heperet 5, or (3) after wire bonding. By forming the oxide film 10 only on the lead frame 7a or on the entire lead frame, and using ordinary manufacturing techniques for the other steps, a semiconductor device substantially similar to that of the second or third embodiment can be manufactured.

第５図は、前記（２）として記載したペレット取付工程
後の酸化工程を示す、前記第４図における■−■切断面
に対応する場所における拡大断面図である。FIG. 5 is an enlarged cross-sectional view at a location corresponding to the section (■--■) in FIG. 4, showing the oxidation step after the pellet attachment step described as (2) above.

第５図では、ペレット５がタブ３に金−シリコン共晶４
で取り付けられており、リードフレームのタブ吊りリー
ド１３より外側にはマスク１５が密着されている。この
状態で酸化処理、たとえば３５０℃以上の加熱炉に所定
時間、たとえば３分間放置することにより、内部リード
部７ａ表面およびタブ裏面等のモールド工程後に樹脂に
埋設され接着されるリードフレーム部に酸化膜１０を形
成することができるものである。In FIG. 5, pellet 5 is attached to tab 3 with gold-silicon eutectic 4.
A mask 15 is tightly attached to the outside of the tab suspension lead 13 of the lead frame. In this state, oxidation treatment is performed, for example, by leaving it in a heating furnace at 350° C. or higher for a predetermined time, for example, 3 minutes, to oxidize the lead frame portions embedded in the resin and bonded after the molding process, such as the surface of the internal lead portion 7a and the back surface of the tab. The film 10 can be formed thereon.

このようにペレット取付後に酸化処理工程をおくことに
より、一連の組立工程の中でリードフレームの酸化処理
を行うことができ、組立作業の効率化が達成される。By carrying out the oxidation process after attaching the pellets in this manner, the lead frame can be oxidized during a series of assembly processes, thereby increasing the efficiency of the assembly work.

また、組立工程におけるモールド工程の前に酸化処理を
行うため、酸化処理により浄化された内部リード７ａの
表面またはタブ３裏面等に異物付着の機会を与えること
な（、パッケージのモールド形成を行うことができる。In addition, since the oxidation treatment is performed before the molding process in the assembly process, there is no chance of foreign matter adhering to the surfaces of the internal leads 7a or the back surfaces of the tabs 3 that have been purified by the oxidation treatment. I can do it.

にたがって、極めて耐湿性の高い半導体装置を製造でき
る。Accordingly, a semiconductor device with extremely high moisture resistance can be manufactured.

なお、ペレット工程の後に酸化処理を行う場合は、酸化
工程の後、ワイヤボンディングを行う必要があるが、ポ
ンディングパッド６の表面を耐酸化性材料で形成してお
くことで対応できる。Note that if the oxidation treatment is performed after the pellet process, it is necessary to perform wire bonding after the oxidation process, but this can be done by forming the surface of the bonding pad 6 with an oxidation-resistant material.

第６図は、前記（３）として記載したワイヤボンディン
グ工程後の酸化工程を示す第５図と同位置における断面
図である。FIG. 6 is a cross-sectional view at the same position as FIG. 5 showing the oxidation step after the wire bonding step described as (3) above.

第６図は、ポンディングパッド６とリード内端部のボン
ディング部９とが金ワイヤ８で接続されている以外は前
記第６図と同様である。FIG. 6 is similar to FIG. 6 except that the bonding pad 6 and the bonding portion 9 at the inner end of the lead are connected by a gold wire 8.

このようにワイヤボンディング工程後に酸化工程をおく
ことにより、ペレット取付工程後に酸化工程をおく場合
に比ベモールド工程にさらに近いために、一段と耐湿性
向上を達成できる。In this way, by performing the oxidation process after the wire bonding process, the oxidation process is more similar to the molding process compared to the case where the oxidation process is performed after the pellet attaching process, so that a further improvement in moisture resistance can be achieved.

［効果］ （１）、少なくとも内部リードの表面に該リード材料自
体を酸化してなる酸化膜が形成された鉄系材料からなる
リードフレームを用髪１て樹脂封止型半導体装置を製造
することにより、またはパッケージのモールド形成前の
任意の段階において鉄系材料からなるリードフレームの
少なくとも内部リードの表面に酸化膜を形成せしめて樹
脂封止型半導体装置を製造することにより、内部リード
とパフケージ樹脂との接着強度を増大させることができ
るので、リード折曲成形時または温度サイクルを受けた
場合等に、前記内部リードとパッケージ樹脂との界面に
剥れが発生することを防止できる。[Effects] (1) Manufacturing a resin-sealed semiconductor device using a lead frame made of an iron-based material on which an oxide film formed by oxidizing the lead material itself is formed on at least the surface of the internal leads. By manufacturing a resin-sealed semiconductor device by forming an oxide film on the surface of at least the internal leads of a lead frame made of iron-based material at any stage before molding the package, the internal leads and puff cage resin can be manufactured. Since the adhesive strength between the internal leads and the package resin can be increased, peeling can be prevented from occurring at the interface between the internal leads and the package resin during lead bending molding or when subjected to temperature cycling.

（２）、内部リードとパッケージ樹脂との接着強度の増
大により、両者をより密着させることができるので、該
両者の界面を伝って水分等が浸透していくことを抑制で
きる。(2) By increasing the adhesive strength between the internal leads and the package resin, it is possible to bring them into closer contact with each other, so that it is possible to suppress the penetration of moisture and the like through the interface between the two.

（３）、前記（１）により、パッケージ内部へ水分等の
腐食物質が侵入していくことを防止できる。(3) According to (1) above, it is possible to prevent corrosive substances such as moisture from entering the inside of the package.

（４）、前記（２）および（３）により、ペレットの電
極または配線等の腐食による電気的不良発生を防止でき
ることより、半導体装置の信鯨性向上を達成できる。(4) According to (2) and (3) above, it is possible to prevent the occurrence of electrical defects due to corrosion of the electrodes or wiring of the pellet, thereby improving the reliability of the semiconductor device.

（５）、リードフレームの所定部に予め酸化膜を形成し
たものを用いることにより、通常の製造工程をそのまま
適用して半導体装置を製造できる。(5) By using a lead frame with an oxide film formed in advance on a predetermined portion, a semiconductor device can be manufactured by applying the normal manufacturing process as is.

（６）、パッケージのモールド形成前の任意の段階にお
いて酸化膜形成を行うことにより、通常のリードフレー
ムをそのまま利用することができる。(6) By forming an oxide film at an arbitrary stage before molding the package, a normal lead frame can be used as is.

（７）、パッケージの外側に出ているリード部（外部リ
ード）に形成されている酸化膜は、外部リードをめっき
法またはディップ法で半田被着を行う前の酸化処理工程
で容易に除去が可能である。(7) The oxide film formed on the lead parts (external leads) protruding from the outside of the package can be easily removed in the oxidation treatment process before soldering the external leads by plating or dipping. It is possible.

（８）、酸化膜形成をリードフレームを高温加熱して行
うことにより、付着物を揮散させることができるので、
該リードフレームの表面浄化をも達成できる。(8) By heating the lead frame to a high temperature to form an oxide film, the deposits can be evaporated.
Surface cleaning of the lead frame can also be achieved.

（９）、前記（８）により、パッケージ樹脂と内部リー
ドとの接着性が害されることを防止できるので、半導体
装置の耐湿性不良の発生を防止できる。(9) According to (8) above, it is possible to prevent the adhesion between the package resin and the internal leads from being impaired, thereby preventing the occurrence of moisture resistance defects in the semiconductor device.

（至）、タブを除き、他の表面に酸化膜が形成されたリ
ードフレームは、タブのみをマスクして酸化・すること
により容易に製造されるので、量産に適している。(To) A lead frame in which an oxide film is formed on the other surfaces except for the tabs is easily manufactured by masking and oxidizing only the tabs, and is therefore suitable for mass production.

ａυ、パッケージのモールド形成前に酸化工程を導入す
ることにより、一連の組立工程の中で酸化処理ができる
ので、製造の効率化ができる。By introducing an oxidation process before molding the package, the oxidation process can be performed during a series of assembly processes, making manufacturing more efficient.

儲、酸化工程をペレット取付工程の後に導入することに
より、酸化により浄化された面に異物付着の機会を与え
ることなくパッケージのモールド形成が可能であるので
、極めて耐湿性の高い半導体装置を製造できる。By introducing the oxidation process after the pellet mounting process, it is possible to mold the package without giving the surface cleaned by oxidation a chance for foreign matter to adhere, making it possible to manufacture semiconductor devices with extremely high moisture resistance. .

（２）、酸化工程をワイヤボンディング工程の後に導体
装置の耐湿性を向上させることができる。(2) The moisture resistance of the conductor device can be improved after the oxidation process is performed after the wire bonding process.

以上本発明者によってなされた発明を実施例に基づき具
体的に説明したが、本発明は前記実施例に限定されるも
のではなく、その要旨を逸脱しない範囲で種々変更可能
であることはいうまでもない。Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that the present invention is not limited to the Examples and can be modified in various ways without departing from the gist thereof. Nor.

たとえば、リードフレームの材料としては４２アロイに
ついてのみ説明したが、これに限るものでなく、鉄系材
料からなるものであれば如何なるもにも適用できるもの
である。For example, although only 42 alloy has been described as the material of the lead frame, the present invention is not limited to this, and can be applied to any material made of iron-based material.

リードフレームの酸化膜形成部も実施例に示したものに
限るものではない、特に、第４図ではタブの片面のみに
酸化膜が形成されていないものを示したが、タブを含め
た表裏全体に形成するものであってもよい、この場合は
、ペレット取付は前にタブ表面を酸で処理することによ
り、酸化膜の除去が可能である。The oxide film forming part of the lead frame is not limited to that shown in the example. In particular, in Fig. 4, an oxide film is not formed on only one side of the tab, but the entire front and back sides including the tab are shown. In this case, the oxide film can be removed by treating the tab surface with acid before attaching the pellet.

また、リードフレームの形状も実施例のものに限らない
ことはいうまでもなく、リード内端部に形成されている
ボンディング部も金に限るものでなく銀等であってもよ
い。Further, it goes without saying that the shape of the lead frame is not limited to that of the embodiment, and the bonding portion formed at the inner end of the lead is not limited to gold, but may be made of silver or the like.

さらに、リードフレームの所定部に酸化膜を形成する方
法として、空気酸化のみを示したが、これに限るもので
なく、同一の目的が達成できるものであれば如何なる方
法によってもよいことはいうまでもない、たとえばプラ
ズマ酸化法があるが、これは部分的酸化を行う場合にも
有効である。Further, although only air oxidation is shown as a method for forming an oxide film on a predetermined portion of the lead frame, it is not limited to this, and it goes without saying that any method that can achieve the same purpose may be used. For example, there is a plasma oxidation method, which is also effective when performing partial oxidation.

すなわち、開口部を有する放電室の該開口部に対向する
位置に、陽極としてリードフレームを配置し、放電室内
に酸素プラズマを発生させることにより、前記開口部に
対応する形状でリードフレームを選択的に、それも高速
で部分的に酸化を行うことができる。That is, a lead frame is placed as an anode in a discharge chamber having an opening at a position facing the opening, and by generating oxygen plasma in the discharge chamber, the lead frame is selectively shaped in a shape corresponding to the opening. Moreover, it can also perform partial oxidation at high speed.

［利用分野］ 以上の説明では主として本発明者によってなされた発明
をその背景となった利用分野である、いわゆるＤＩＰ型
半導体装置に適用した場合について説明したが、これに
限定されるものではなく、たとえばフラットパッケージ
等の樹脂封止型半導体装置であれば如何なるものにも適
用して有効な技術である。[Field of Application] In the above explanation, the invention made by the present inventor was mainly applied to a so-called DIP type semiconductor device, which is the field of application that formed the background of the invention, but the present invention is not limited to this. For example, it is an effective technique that can be applied to any resin-sealed semiconductor device such as a flat package.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は、本発明による実施例１である半導体装置に用
いられているリードを示す拡大部分断面図、 第２図は、実施例１の半導体装置の断面図、第３図は、
本発明による実施例１であるリードフレームの１単位を
示す平面図、 第４図は、本発明による実施例２であるリードフレーム
の１単位を示す平面図、 第５図および第６図は、実施例３におけるリードの断面
図である。 ｌ・・・パフケージ、２・・・樹脂、３・・・タブ、４
・・・金−シリコン共晶、５・・・ペレット、６・・・
ボンディングパソド、７・・・リード、７ａ・・・内部
リード、８・・・ワイヤ、９・・・ボンディング部、１
ｏ・・・酸化膜、１１・・・外枠、１２・・・仕切枠、
１３・・・タブ吊りリード、１４・・・タイバー、１５
・・・マスク。 第　　１　　図 第　　３　　図 第　　４　　図 第　　５　　図 １δ 第　　６　　図 １１５″FIG. 1 is an enlarged partial cross-sectional view showing a lead used in a semiconductor device according to a first embodiment of the present invention, FIG. 2 is a cross-sectional view of a semiconductor device according to a first embodiment, and FIG.
FIG. 4 is a plan view showing one unit of a lead frame according to Example 1 of the present invention; FIG. 4 is a plan view showing one unit of a lead frame according to Example 2 of the present invention; FIGS. 5 and 6 are: FIG. 7 is a cross-sectional view of a lead in Example 3. l...puff cage, 2...resin, 3...tab, 4
...gold-silicon eutectic, 5... pellet, 6...
Bonding pad, 7... Lead, 7a... Internal lead, 8... Wire, 9... Bonding part, 1
o... Oxide film, 11... Outer frame, 12... Partition frame,
13...Tab hanging lead, 14...Tie bar, 15
···mask. Figure 1 Figure 3 Figure 4 Figure 5 Figure 1δ Figure 6 Figure 115''

Claims (1)

【特許請求の範囲】 １、少なくともパッケージ樹脂に接着するリード部の表
面に該リード材料自体を酸化してなる酸化膜が形成され
た鉄系材料からなるリードフレーム。 ２、鉄系材料が４２アロイであることを特徴とする特許
請求の範囲第１項記載のリードフレーム。 ３、酸化膜が４００Å以上の厚さで形成されていること
を特徴とする特許請求の範囲第１項記載のリードフレー
ム。 ４、リード内端部に金属を部分被着することによりボン
ディング部が形成されていることを特徴とする特許請求
の範囲第１項記載のリードフレーム。 ５、リード内端部に被着された金属が金または銀である
ことを特徴とする特許請求の範囲第４項記載のリードフ
レーム。 ６、樹脂封止型半導体装置であって、パッケージ樹脂と
接着するリード部の表面に該リード材料自体を酸化して
なる酸化膜が形成された鉄系材料からなるリードフレー
ムを用いて製造された半導体装置。 ７、鉄系材料が４２アロイであることを特徴とする特許
請求の範囲第６項記載の半導体装置。 ８、酸化膜が４００Å以上の厚さで形成されていること
を特徴とする特許請求の範囲第６項記載の半導体装置。 ９、リード内端部に金属を部分被着することによりボン
ディング部が形成されていることを特徴とする特許請求
の範囲第６項記載の半導体装置。 １０、リード内端部に被着された金属が金または銀であ
ることを特徴とする特許請求の範囲第９項記載の半導体
装置。 １１、リードフレームのリード内端部にボンディング部
を形成する工程、リードフレームのタブにペレットを取
り付ける工程、該ペレットの電極とリードのボンディン
グ部とをワイヤボンディングする工程、樹脂でパッケー
ジをモールド形成する工程およびリードの成形工程から
なる半導体装置の製造方法であって、パッケージをモー
ルド形成する工程前の工程において少なくともパッケー
ジ樹脂に接着するリード部の表面に、該リード材料自体
を酸化して酸化膜を形成する工程を有する半導体装置の
製造方法。 １２、酸化膜をリードフレームの所定部を所定条件下で
空気酸化して形成することを特徴とする特許請求の範囲
第１１項記載の半導体装置の製造方法。 １３、酸化膜をリードフレームの所定部を所定条件下で
プラズマ酸化して形成することを特徴とする特許請求の
範囲第１１項記載の半導体装置の製造方法。[Scope of Claims] 1. A lead frame made of an iron-based material, in which an oxide film formed by oxidizing the lead material itself is formed on at least the surface of the lead portion bonded to the package resin. 2. The lead frame according to claim 1, wherein the iron-based material is 42 alloy. 3. The lead frame according to claim 1, wherein the oxide film is formed with a thickness of 400 Å or more. 4. The lead frame according to claim 1, wherein the bonding portion is formed by partially depositing metal on the inner end of the lead. 5. The lead frame according to claim 4, wherein the metal coated on the inner end of the lead is gold or silver. 6. A resin-sealed semiconductor device manufactured using a lead frame made of an iron-based material on which an oxide film formed by oxidizing the lead material itself is formed on the surface of the lead portion that is bonded to the package resin. Semiconductor equipment. 7. The semiconductor device according to claim 6, wherein the iron-based material is 42 alloy. 8. The semiconductor device according to claim 6, wherein the oxide film is formed with a thickness of 400 Å or more. 9. The semiconductor device according to claim 6, wherein the bonding portion is formed by partially depositing metal on the inner end of the lead. 10. The semiconductor device according to claim 9, wherein the metal deposited on the inner end of the lead is gold or silver. 11. Step of forming a bonding part on the inner end of the lead of the lead frame. Step of attaching the pellet to the tab of the lead frame. Step of wire bonding the electrode of the pellet and the bonding part of the lead. Molding a package with resin. A method for manufacturing a semiconductor device comprising a step of molding a package and a step of molding a lead, in which the lead material itself is oxidized to form an oxide film on at least the surface of the lead portion to be bonded to the package resin in the step before the step of molding the package. A method for manufacturing a semiconductor device, which includes a step of forming a semiconductor device. 12. The method of manufacturing a semiconductor device according to claim 11, wherein the oxide film is formed by air oxidizing a predetermined portion of the lead frame under predetermined conditions. 13. The method of manufacturing a semiconductor device according to claim 11, wherein the oxide film is formed by plasma oxidizing a predetermined portion of the lead frame under predetermined conditions.
JP59273104A 1984-12-26 1984-12-26 Lead frame, semiconductor device incorporating said lead frame, and manufacture thereof Pending JPS61152053A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59273104A JPS61152053A (en) 1984-12-26 1984-12-26 Lead frame, semiconductor device incorporating said lead frame, and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59273104A JPS61152053A (en) 1984-12-26 1984-12-26 Lead frame, semiconductor device incorporating said lead frame, and manufacture thereof

Publications (1)

Publication Number Publication Date
JPS61152053A true JPS61152053A (en) 1986-07-10

Family

ID=17523191

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59273104A Pending JPS61152053A (en) 1984-12-26 1984-12-26 Lead frame, semiconductor device incorporating said lead frame, and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS61152053A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0587966U (en) * 1992-04-28 1993-11-26 シャープ株式会社 Lead frame
EP0867935A3 (en) * 1997-03-25 2000-03-15 Mitsui Chemicals, Inc. Plastic package, semiconductor device, and method of manufacturing plastic package
JP2008300492A (en) * 2007-05-30 2008-12-11 Rohm Co Ltd Semiconductor device
JP2014096430A (en) * 2012-11-08 2014-05-22 Panasonic Corp Led package, led light emitting element and manufacturing method thereof

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0587966U (en) * 1992-04-28 1993-11-26 シャープ株式会社 Lead frame
EP0867935A3 (en) * 1997-03-25 2000-03-15 Mitsui Chemicals, Inc. Plastic package, semiconductor device, and method of manufacturing plastic package
JP2008300492A (en) * 2007-05-30 2008-12-11 Rohm Co Ltd Semiconductor device
JP2014096430A (en) * 2012-11-08 2014-05-22 Panasonic Corp Led package, led light emitting element and manufacturing method thereof

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