JP2004282103A - Partial noble metal plating method of lead frame - Google Patents

Partial noble metal plating method of lead frame Download PDF

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Publication number
JP2004282103A
JP2004282103A JP2004199765A JP2004199765A JP2004282103A JP 2004282103 A JP2004282103 A JP 2004282103A JP 2004199765 A JP2004199765 A JP 2004199765A JP 2004199765 A JP2004199765 A JP 2004199765A JP 2004282103 A JP2004282103 A JP 2004282103A
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Japan
Prior art keywords
plating
lead frame
noble metal
copper
silver
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JP2004199765A
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Japanese (ja)
Inventor
Hideo Hotta
日出男 堀田
Chiaki Hatsuda
千秋 初田
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Dai Nippon Printing Co Ltd
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Dai Nippon Printing Co Ltd
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Priority to JP2004199765A priority Critical patent/JP2004282103A/en
Publication of JP2004282103A publication Critical patent/JP2004282103A/en
Pending legal-status Critical Current

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Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method of a copper alloy lead frame which can prevent delamination caused by the lead frame and not damage bonding-property without the limitation of IC assembly condition. <P>SOLUTION: The partial noble metal plating method of the lead frame for a resin sealed semiconductor device, which is made of copper alloy and used for wire bonding or die bonding, subjected to partial noble metal plating with at least one of silver, gold and palladium, further, subjected to thin noble metal plating with at least one of silver, gold and platinum at all portion or designated portion of copper member surface of the side contacted with at least sealing resin. The method comprises (A) the process of copper plating on the surface of a lead frame workpiece composed of the copper alloy worked in outline, (B) the process of thin noble metal plating at all or designated portion of the surface of the lead frame treated by the copper plating, and (C) the process of partial noble metal plating. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は，封止樹脂とリードフレームとの密着性を向上させた樹脂封止型の半導体装置に用いられるリードフレームの部分貴金属めっき方法に関する。   The present invention relates to a partial noble metal plating method for a lead frame used in a resin-encapsulated semiconductor device having improved adhesion between a sealing resin and a lead frame.

従来より用いられている樹脂封止型の半導体装置（プラスチックリードフレームパッケージ）は、一般に図１０（ａ）に示されるような構造であり、半導体素子１０２０を搭載するダイパッド部１０１１や周囲の回路との電気的接続を行うためのアウターリード部１０１３、アウターリード部１０１３に一体となったインナーリード部１０１２、該インナーリード部１０１２の先端部と半導体素子１０２０の電極パッド（端子）１０２１とを電気的に接続するためのワイヤ１０３０、半導体素子１０２０を封止して外界からの応力、汚染から守る樹脂１０４０等からなっており、半導体素子１０２０をリードフレーム１０１０のダイパッド１０１１部等に搭載した後に、樹脂１０４０により封止してパッケージとしたもので、半導体素子１０２０の電極パッド１０２１に対応できる数のインナーリード１０１２を必要とするものである。
そして、このような樹脂封止型の半導体装置の組立部材として用いられる（単層）リードフレーム１０１０は、一般には図１０（ｂ）に示すような構造のもので、半導体素子を搭載するためのダイパッド１０１１と、ダイパッド１０１１の周囲に設けられた半導体素子と結線するためのインナーリード１０１２、該インナーリード１０１２に連続して外部回路との結線を行うためのアウターリード１０１３、樹脂封止する際のダムとなるダムバー１０１４、リードフレーム１０１０全体を支持するフレーム（枠）部１０１５等を備えており、通常、コバール、４２合金（４２％ニッケル−鉄合金）、銅系合金のような導電性に優れた金属を用い、プレス法もしくはエッチング法により外形加工されていた。
半導体素子と結線するためのインナーリード１０１２のワイヤボンディング領域には、銀めっきが必要とされ、一般には、外形加工後に、必要部のみに銀めっきを部分的に施していた。
また、銀ペースト等を介して半導体素子をダイボンディングする側のダイパッド１０１１表面にも銀めっきを必要とし、銀めっきを施していた。
特に、インナーリード１０１２のワイヤボンデイング領域やダイパッド１０１１のダイボンディング領域等の銀めっきが必要な領域のみへの銀めっきを、部分銀めっきと言っている。
尚、図１０（ｂ）（イ）はリードフレーム１０１０の平面図で、図１０（ｂ）（ロ）は、図１０（ｂ）（イ）のＦ１−Ｆ２における断面図である。 Conventionally, a resin-encapsulated semiconductor device (plastic lead frame package) has a structure as shown in FIG. 10A, and includes a die pad portion 1011 on which a semiconductor element 1020 is mounted and peripheral circuits. The outer lead portion 1013 for electrical connection, the inner lead portion 1012 integrated with the outer lead portion 1013, the tip portion of the inner lead portion 1012 and the electrode pad (terminal) 1021 of the semiconductor element 1020 are electrically connected. Wire 1030 for connecting to the semiconductor device 10 and resin 1040 for sealing the semiconductor element 1020 to protect it from external stress and contamination. After mounting the semiconductor element 1020 on the die pad 1011 portion of the lead frame 1010, etc. 1040 is a package sealed with a semiconductor element 10 Those requiring the number of inner leads 1012 capable of handling 0 of the electrode pad 1021.
A (single layer) lead frame 1010 used as an assembly member of such a resin-encapsulated semiconductor device generally has a structure as shown in FIG. 10B, and is used for mounting a semiconductor element. A die pad 1011, an inner lead 1012 for connecting to a semiconductor element provided around the die pad 1011, an outer lead 1013 for connecting to an external circuit continuously to the inner lead 1012, and a resin sealing step It is equipped with a dam bar 1014 to be a dam, a frame portion 1015 for supporting the entire lead frame 1010, etc., and is usually excellent in conductivity such as Kovar, 42 alloy (42% nickel-iron alloy), copper alloy. The outer shape was processed by a press method or an etching method.
Silver plating is required for the wire bonding region of the inner lead 1012 for connecting to the semiconductor element. Generally, after the outer shape processing, only the necessary part is subjected to silver plating.
Further, the surface of the die pad 1011 on the side where the semiconductor element is die-bonded via a silver paste or the like needs to be silver-plated, and silver plating has been applied.
In particular, silver plating only on regions that require silver plating, such as the wire bonding region of the inner lead 1012 and the die bonding region of the die pad 1011 is referred to as partial silver plating.
10B and 10A are plan views of the lead frame 1010, and FIGS. 10B and 10B are cross-sectional views taken along line F1-F2 in FIGS. 10B and 10A.

銅合金で形成され、必要部分に銀めっきが施される半導体装置用リードフレームにおいては、従来、図９に示すように部分銀めっきの下地めっきとして、０．１〜０．３μｍ程度の厚さの銅（Ｃｕ）めっきを施した後に部分銀めっきが行われている。
そして、この部分銀めっきの際に、必要部以外に薄くついた銀をとる為に、電解剥離をし、次いで、銅部分の表面酸化、水酸化等による変色を防止する変色防止処理を行っていた。
銅合金製リードフレームの、このようにして設けられた銅下地めっきは、４２合金（４２％ニッケル−鉄合金）等鉄系のリードフレームの表面に銀めっきの下地めっきとして銅めっきを施した場合とは異なり、通常剥離作業は行うことはなく、リードフレームの表面に形成したまま使用していた。
しかしながら、このように処理された銅合金製リードフレームに対しても、最近、半導体装置組み立て工程及び実装工程で生じるパッケージのデラミネーションが問題視されるようになってきた。
そして、銅合金製リードフレームを用いた場合に発生する封止樹脂とダイパッド裏面間で生じるデラミネーションは、リードフレームの表面処理方法、組み立て条件等と密接な関係があることが分かってきた。
尚、一般に、デラミネーションとは、ＩＣパッケージ内の界面、ＩＣチップと封止樹脂間、タイボンディング剤とＩＣチップ間、ダイパッド表面とダンボンディング剤間、封止樹脂とダイパッド裏面間等で生じる剥離を言うが、リードフレームが原因となるデラミネーションは、封止樹脂とダイパッド裏面間で生じるものであり、ＩＣの信頼性を低下させ、ＩＣ組み立て工程や実装工程における良品率を低下させるため問題となっいた。
上記処理による銅合金製のリードフレームのデラミネーションは、ＩＣ組み立て工程中の加熱処理（工程）で銅合金表面に酸化膜が生じ、酸化膜と金属の間の密着強度が不十分であることが発生の原因と考えられている。 In a lead frame for a semiconductor device, which is formed of a copper alloy and is subjected to silver plating on a necessary portion, a thickness of about 0.1 to 0.3 μm is conventionally used as a base plating for partial silver plating as shown in FIG. After the copper (Cu) plating is performed, partial silver plating is performed.
And, in this partial silver plating, in order to remove thin silver other than the necessary part, electrolytic peeling is performed, and then a discoloration prevention treatment is performed to prevent discoloration due to surface oxidation, hydroxylation, etc. of the copper part. It was.
The copper base plating provided in this way for a copper alloy lead frame is the case where the surface of an iron-based lead frame such as 42 alloy (42% nickel-iron alloy) is subjected to copper plating as the base plating for silver plating. Unlike the conventional method, the peeling operation is not usually performed, and the film is used as it is formed on the surface of the lead frame.
However, recently, delamination of packages generated in the semiconductor device assembly process and the mounting process has been regarded as a problem for the copper alloy lead frame thus processed.
It has been found that the delamination generated between the sealing resin and the die pad back surface generated when using a copper alloy lead frame is closely related to the surface treatment method of the lead frame, assembly conditions, and the like.
In general, delamination means delamination that occurs at the interface in the IC package, between the IC chip and the sealing resin, between the tie bonding agent and the IC chip, between the die pad surface and the dan bonding agent, between the sealing resin and the back surface of the die pad, etc. However, the delamination caused by the lead frame occurs between the sealing resin and the backside of the die pad, which reduces the reliability of the IC and reduces the yield rate in the IC assembly process and mounting process. It became.
The delamination of the copper alloy lead frame by the above treatment may cause an oxide film on the surface of the copper alloy by the heat treatment (process) during the IC assembly process, and the adhesion strength between the oxide film and the metal is insufficient. It is considered the cause of the outbreak.

一方、封止樹脂とダイパッド裏面間、さらには封止樹脂とリードフレーム全面の間の密着強度を向上させ、デラミネーション発生を防止するためのリードフレームとして、特表平７−５０３１０３には、接着性を改善するためにクロムと亜鉛の混合体あるいはそれぞれの単体からなる薄い被膜で全面を被膜されたリードフレームが開示されている。
しかし、このリードフレームでは銀めっき部分も他の金属被膜で覆われるため、金ワイヤボンディングの安定性が劣るという問題があった。 On the other hand, as a lead frame for improving the adhesion strength between the sealing resin and the back surface of the die pad and between the sealing resin and the entire lead frame and preventing the occurrence of delamination, In order to improve the properties, a lead frame is disclosed in which the entire surface is coated with a mixture of chromium and zinc or a thin film made of a single substance of each.
However, this lead frame has a problem that the stability of gold wire bonding is inferior because the silver-plated portion is also covered with another metal film.

また、ＩＣ組み立て工程の条件は、組立を実施するＩＣメーカーにより異なり、銅合金製リードフレームの表面酸化状態、酸化膜形成過程もメーカー毎に異なる為、リードフレームに起因するデラミネーションの発生状況がＩＣ組み立てメーカーによって異なっていた。例えば、ベンゾトリアゾール系の被膜により、銅の酸化、水酸化による変色を防止する処理方法では、ＩＣ組み立て温度が低いメーカに対しては、デラミネーション防止効果が得られるが、ＩＣ組み立て温度が高いメーカではデラミネーション防止効果が得られない。このため、従来はデラミネーションに対する対策をＩＣ組み立て条件に合わせて各メーカ毎に行っていたのが実状で、ＩＣの組み立て条件によらず、リードフレームに起因するデラミネーションに対応できる手段が求められていた。   Also, the conditions of the IC assembly process vary depending on the IC manufacturer that performs the assembly, and the surface oxidation state of the copper alloy lead frame and the oxide film formation process also vary from manufacturer to manufacturer, so there is a situation where delamination occurs due to the lead frame. It was different depending on the IC assembly manufacturer. For example, a treatment method that prevents discoloration due to copper oxidation and hydroxylation with a benzotriazole-based coating can provide a delamination prevention effect for manufacturers with low IC assembly temperatures, but manufacturers with high IC assembly temperatures. However, the delamination prevention effect cannot be obtained. For this reason, conventionally, countermeasures against delamination have been taken for each manufacturer in accordance with the IC assembly conditions, and there is a need for means capable of dealing with delamination caused by the lead frame regardless of the IC assembly conditions. It was.

このように、銅合金製のリードフレームにおいては、リードフレームに起因した半導体装置（ＩＣ）におけるデラミネーションを防止し、ＩＣの信頼性低下、ＩＣ組み立て工程、実装工程における良品率の低下を防止することが望まれており、特に、ＩＣの組み立て条件によらず、リードフレームに起因するデラミネーションの発生を防止できるものが求められていた。
本発明は、このような状況のもと、ＩＣの組み立て条件によらず、リードフレームに起因するデラミネーションの発生を防止でき、且つ、ボンディング性を損なわない銅合金製のリードフレームを製造する方法を提供しようとするものである。 As described above, in the lead frame made of copper alloy, delamination in the semiconductor device (IC) caused by the lead frame is prevented, and deterioration in the reliability of the IC, in the IC assembly process, and in the mounting process is prevented. In particular, there has been a demand for a device that can prevent the occurrence of delamination caused by the lead frame regardless of the IC assembly conditions.
Under such circumstances, the present invention is a method for manufacturing a lead frame made of a copper alloy that can prevent the occurrence of delamination caused by the lead frame and does not impair the bondability regardless of the assembly conditions of the IC. Is to provide.

本発明のリードフレームの部分貴金属めっき方法により作製されるリードフレームとしては、銅合金材からなり、ワイヤボンディング用ないしダイボンディング用の、銀、金、パラジウムの少なくとも１つからなる部分貴金属めっきが施された樹脂封止型の半導体装置用リードフレームであって、少なくとも封止樹脂と接する側の銅部表面の全部ないし所定の部分に銀、金、白金、パラジウムの少なくとも１つからなる薄い貴金属めっきが施されていることを特徴とするものが挙げられる。
そして、上記において、薄い貴金属めっきの厚みが０．５μｍ以下、０．００１μｍ以上であることを特徴とするものが挙げられる。
そしてまた、上記における部分貴金属めっきは部分銀めっきであり、且つ、薄い貴金属めっきが薄い銀めっきであることを特徴とするものが挙げられる。
尚、銅合金を素材とするリードフレームにおいては、部分銀めっきの下地めっきとして０．１〜０．３μｍ程度の厚さの銅めっきを形成した上に、部分銀めっきを施すのが一般的である。 The lead frame produced by the method of partially precious metal plating of the lead frame of the present invention is made of a copper alloy material, and is subjected to partial precious metal plating made of at least one of silver, gold, and palladium for wire bonding or die bonding. A resin-encapsulated lead frame for a semiconductor device, which is a thin noble metal plating made of at least one of silver, gold, platinum, and palladium on all or a predetermined portion of the surface of the copper portion in contact with the sealing resin The thing characterized by having been given is mentioned.
And in the above, what is characterized by the thickness of thin noble metal plating being 0.5 micrometer or less and 0.001 micrometer or more is mentioned.
Moreover, the partial noble metal plating in the above is partial silver plating, and the thin noble metal plating is thin silver plating.
In a lead frame made of a copper alloy, it is common to form a partial silver plating after forming a copper plating with a thickness of about 0.1 to 0.3 μm as a base plating for the partial silver plating. is there.

本発明のリードフレームの部分貴金属めっき方法は、銅合金材からなり、ワイヤボンディング用ないしダイボンディング用の、銀、金、パラジウムの少なくとも１つからなる部分貴金属めっきが施され、且つ、少なくとも封止樹脂と接する側の銅部表面の全部ないし所定の部分に、銀、金、白金、パラジウムの少なくとも１つからなる薄い貴金属めっきが施されている樹脂封止型の半導体装置用リードフレームの部分貴金属めっき法であって、少なくとも、順に、（Ａ）外形加工された銅合金からなるリードフレーム素材の表面に銅めっきを施す工程と、（Ｂ）銅めっきが施されたリードフレームの表面の全部ないし所定の部分に薄い貴金属めっきを施す工程と、（Ｃ）部分貴金属めっきを施す工程とを有することを特徴とするものである。
そして、上記において、薄い貴金属めっきは、電解めっきないし無電解めっきにより施されることを特徴とするものである。
そしてまた、上記において、部分貴金属めっきは部分銀めっきであり、且つ、薄い貴金属めっきが薄い銀めっきであることを特徴とするものである。 The lead frame partial noble metal plating method of the present invention is made of a copper alloy material, subjected to partial noble metal plating made of at least one of silver, gold, and palladium for wire bonding or die bonding, and at least sealing. Resin-encapsulated lead frame for a semiconductor device lead frame in which a thin noble metal plating made of at least one of silver, gold, platinum, and palladium is applied to all or a predetermined portion of the surface of the copper portion in contact with the resin A plating method, at least in order, (A) a step of copper plating on the surface of a lead frame material made of a copper alloy that has undergone external processing, and (B) the entire surface of the lead frame that has been subjected to copper plating. The method includes a step of performing thin noble metal plating on a predetermined portion and a step of performing (C) partial noble metal plating.
In the above, the thin noble metal plating is performed by electrolytic plating or electroless plating.
In the above, the partial noble metal plating is partial silver plating, and the thin noble metal plating is thin silver plating.

本発明のリードフレームの部分貴金属めっき方法により作製されるリードフレームを用いた半導体装置としては、銅合金材からなり、ワイヤボンディング用ないしダイボンディング用の、銀、金、パラジウムの少なくとも１つからなる部分貴金属めっきが施された樹脂封止型の半導体装置用リードフレームで、且つ、少なくとも封止樹脂と接する側の銅部表面の全部ないし所定の部分に銀、金、白金、パラジウムの少なくとも１つからなる薄い貴金属めっきが施されているリードフレームを、用いた半導体装置であって、少なくとも封止用樹脂と接するリードフレーム表面の全部ないし所定の部分の銅酸化膜形成領域において、貴金属の濃度が、Ｘ線光電子分光による測定で、０．１原子％以上〜２０原子％未満であるものが挙げられる。   The semiconductor device using the lead frame produced by the method of partially precious metal plating of the lead frame of the present invention is made of a copper alloy material, and is made of at least one of silver, gold, and palladium for wire bonding or die bonding. At least one of silver, gold, platinum, and palladium on a resin-encapsulated semiconductor device lead frame that has been subjected to partial precious metal plating and at least a predetermined portion of the surface of the copper portion that is in contact with the sealing resin. A semiconductor device using a lead frame on which a thin noble metal plating is formed, wherein the concentration of the noble metal is at least in the entire surface of the lead frame in contact with the sealing resin or in a predetermined portion of the copper oxide film formation region. And those measured by X-ray photoelectron spectroscopy that are 0.1 atomic% or more and less than 20 atomic%.

（作用）
本発明のリードフレームの部分貴金属めっき方法により作製されるリードフレームは、上記のような構成にすることにより、ＩＣの組み立て条件によらず、リードフレームに起因する半導体装置における封止樹脂のデラミネーションの発生を防止でき、且つ、ボンデイング性を損なわない銅合金製のリードフレームの提供を可能としている。
詳しくは、少なくとも封止樹脂と接する側の銅部表面の全部ないし所定の部分に銀、金、白金、パラジウムの少なくとも１つからなる薄い貴金属めっきが施されていることにより、薄い貴金属めっきが施された箇所においては、銅の表面に施された薄い貴金属めっきは銅の酸化を抑えて、酸化膜厚を低減するとともに、酸化膜生成の際にはＣｕＯよりＣｕ2 Ｏの生成を優先させるため、酸化膜自体が破壊されにくくなり、封止樹脂とのデラミネーションの発生を抑えることができるのである。
特に、半導体素子を搭載するダイバッドの裏面の銅部表面にのみ貴金属の薄いめっきを施してもその効果は大きい。
薄い貴金属めっきが銅表面に施されると、該貴金属はＩＣ組み立て工程中における加熱により銅酸化膜内部に拡散するため、銅の酸化膜破壊強度を向上させるとともに、本来、封止樹脂との密着性が劣る貴金属の特質をカバーすることができる。
そして、薄い貴金属めっきの厚みを０．５μｍ以下、０．００１μｍ以上としていることにより、適切な厚みとしている。薄い貴金属めっきの厚みが０．００１μｍより薄いと上記効果が得られず、厚みを０．５μｍより厚くするとめっき時間と費用がかかるばかりでなく、ＩＣ組み立て工程で貴金属が銅酸化膜内部に十分に拡散しないため封止樹脂との密着強度が劣化すると考えられる。
また、本発明のリードフレームの部分貴金属めっき方法により作製されるリードフレームにおいては、構造上金ワイボンディング性に悪影響を与えることはない。
本発明のリードフレームの部分貴金属めっき方法により作製されるリードフレームのはんだめっき性については、はんだめっきの前処理として行われる酸洗浄や化学研磨処理によって銅酸化膜が除去されるため、従来のリードフレームと変わることはなく、良好となる。
また、部分貴金属めっきは、部分銀めっきであり、且つ、薄い貴金属めっきが薄い銀めっきであることにより、従来使用されている電解めっき方法や無電解めっき方法により、比較的簡単にめっきを安定的に行うことができ、生産コストを下げることができる。 (Function)
The lead frame produced by the partial noble metal plating method of the lead frame of the present invention is configured as described above, so that the delamination of the sealing resin in the semiconductor device caused by the lead frame, regardless of the assembly conditions of the IC. It is possible to provide a lead frame made of a copper alloy that can prevent the occurrence of the above and that does not impair the bonding property.
Specifically, at least all of the copper surface on the side in contact with the sealing resin or a predetermined portion is subjected to thin noble metal plating made of at least one of silver, gold, platinum, and palladium. In these places, the thin noble metal plating applied to the copper surface suppresses the oxidation of copper, reduces the oxide film thickness, and prioritizes the generation of Cu 2 O over CuO when forming the oxide film. Thus, the oxide film itself is less likely to be destroyed, and the occurrence of delamination with the sealing resin can be suppressed.
In particular, the effect is large even if a thin noble metal plating is applied only to the copper surface on the back surface of the die pad on which the semiconductor element is mounted.
When a thin noble metal plating is applied to the copper surface, the noble metal diffuses into the copper oxide film by heating during the IC assembly process, thereby improving the copper oxide film breakage strength and inherently adhering to the sealing resin. It can cover the characteristics of precious metals that are inferior.
The thickness of the thin noble metal plating is 0.5 μm or less and 0.001 μm or more, so that the thickness is appropriate. If the thickness of the thin precious metal plating is less than 0.001 μm, the above effect cannot be obtained, and if the thickness is thicker than 0.5 μm, not only the plating time and cost are required, but also the precious metal is sufficiently contained inside the copper oxide film in the IC assembly process. It is considered that the adhesion strength with the sealing resin deteriorates because it does not diffuse.
In addition, the lead frame produced by the method of partially precious metal plating of the lead frame of the present invention does not adversely affect the gold-wire bonding property in terms of structure.
With respect to the solder plating property of the lead frame produced by the partial noble metal plating method of the lead frame of the present invention, the copper oxide film is removed by the acid cleaning or chemical polishing treatment performed as a pretreatment of the solder plating. It does not change with the frame and is good.
In addition, partial precious metal plating is partial silver plating, and thin precious metal plating is thin silver plating, so that plating can be performed relatively easily and easily by conventional electrolytic plating methods and electroless plating methods. The production cost can be reduced.

本発明のリードフレームの部分貴金属めっき方法は、上記のような構成にすることにより、上記のような、ＩＣの組み立て条件によらず、リードフレームに起因する半導体装置における封止樹脂のデラミネーションの発生を防止でき、且つ、ボンデイング性を損なわない銅合金製のリードフレームを製造する、製造方法の提供を可能とするものである。
具体的には、少なくとも、順に、（Ａ）外形加工された銅合金からなるリードフレーム素材の表面に銅めっきを施す工程と、（Ｂ）銅めっきが施されたリードフレームの表面の全部ないし所定の部分に薄い貴金属めっきを施す工程と、（Ｃ）部分貴金属めっきを施す工程とを有することにより、薄い貴金属めっきを部分貴金属めっきに影響されずに銅めっき表面に形成することを可能としている。
そして、電解めっきないし無電解めっきにより、薄い貴金属めっきを施すことにより、薄い貴金属めっきの膜厚の制御を簡単なものとしている。
尚、上記において、薄い貴金属めっきを、リードフレームの部分貴金属めっきが施される領域を含め、リードフレーム全体に施す場合には、薄い貴金属めっきの被膜生成作業を簡単なものとできる。
そしてまた、部分貴金属めっきとして部分銀めっきを用い、且つ、薄い貴金属めっきとして薄い銀めっきを施すことにより、従来使用されている電解めっき方法や無電解めっき方法により、比較的簡単にめっきを安定的に行うことができるもおのとしてきる。
同時に、金めっきや白金めっきに比べ生産コストを下げることができる。 In the lead frame partial noble metal plating method of the present invention, the delamination of the sealing resin in the semiconductor device caused by the lead frame is performed regardless of the IC assembly conditions as described above by adopting the above configuration. It is possible to provide a manufacturing method for manufacturing a lead frame made of a copper alloy that can be prevented from occurring and does not impair bonding properties.
Specifically, at least, in order, (A) a step of copper plating on the surface of a lead frame material made of a copper alloy that has undergone external processing, and (B) the entire surface of the lead frame that has been subjected to copper plating or a predetermined amount. By having a step of applying a thin noble metal plating to this portion and a step of (C) applying a partial noble metal plating, it is possible to form a thin noble metal plating on the copper plating surface without being affected by the partial noble metal plating.
Then, by applying thin noble metal plating by electrolytic plating or electroless plating, the control of the film thickness of the thin noble metal plating is simplified.
In the above, when the thin noble metal plating is applied to the entire lead frame including the region where the partial noble metal plating of the lead frame is applied, the operation of generating the thin noble metal plating film can be simplified.
In addition, by using partial silver plating as the partial noble metal plating and thin silver plating as the thin noble metal plating, it is possible to stabilize the plating relatively easily by the electroplating method and the electroless plating method which are conventionally used. It can be done as well.
At the same time, production costs can be reduced compared to gold plating and platinum plating.

本発明のリードフレームの部分貴金属めっき方法により作製されるリードフレームを用いた半導体装置は、上記本発明のリードフレームの部分貴金属めっき方法により作製されるリードフレームを用いることにより、ワイヤボンディング工程における熱処理等を経て、封止用樹脂と接するリードフレーム表面の全部ないし所定の部分に、銀、金、パラジウム、白金の少なくとも１つと銅酸化膜からなる領域をもつ表面部を形成でき、これにより、封止樹脂と接する部分の剥離を防止できるものとしている。
そして、封止用樹脂と接するリードフレーム表面の全部ないし所定の部分の銅酸化膜形成領域において、貴金属の濃度が、Ｘ線光電子分光による測定で、０．１原子％以上であることにより、銅酸化膜のないし銅酸化膜と銅合金との境での破壊強度を充分なものとでき、２０原子％未満であることにより、封止樹脂との密着性が劣る貴金属の特質をカバーすることができ、銅酸化膜と封止樹脂との密着性を充分なものとできる。 The semiconductor device using the lead frame manufactured by the method of partially precious metal plating of the lead frame of the present invention uses the lead frame manufactured by the method of partial precious metal plating of the lead frame of the present invention, thereby performing heat treatment in the wire bonding process. Through the above, a surface portion having a region composed of at least one of silver, gold, palladium, platinum and a copper oxide film can be formed on all or a predetermined portion of the lead frame surface in contact with the sealing resin. It is assumed that peeling of the portion in contact with the stop resin can be prevented.
Then, in the entire region of the lead frame in contact with the sealing resin or in a predetermined portion of the copper oxide film forming region, the concentration of the noble metal is 0.1 atomic% or more as measured by X-ray photoelectron spectroscopy. The fracture strength at the boundary between the oxide film or the copper oxide film and the copper alloy can be made sufficient, and when it is less than 20 atomic%, it can cover the characteristics of noble metals with poor adhesion to the sealing resin. The adhesion between the copper oxide film and the sealing resin can be made sufficient.

本発明は、上記のように、ＩＣの組み立て条件によらず、リードフレームに起因するデラミネーションの発生を防止でき、且つ、ボンディング性を損なわない、銅合金製のリードフレームを用いた半導体装置の提供を可能としており、同時に、そのような半導体装置に用いられるリードフレームを製造する方法の提供を可能としている。
そしてまた、本発明のリードフレームの部分貴金属めっき方法は、特に、薄い貴金属めっきを均一性良く所定の厚さに形成できるものとしている。
As described above, the present invention provides a semiconductor device using a copper alloy lead frame that can prevent the occurrence of delamination caused by the lead frame and does not impair the bondability regardless of the IC assembly conditions. At the same time, it is possible to provide a method for manufacturing a lead frame used in such a semiconductor device.
In addition, the lead frame partial noble metal plating method of the present invention is particularly capable of forming a thin noble metal plating to a predetermined thickness with good uniformity.

本発明の実施の形態例を以下、図にそって説明する。
先ず、本発明のリードフレームの部分貴金属めっき方法により作製されるリードフレームの参考実施例１を挙げる。
図１は参考実施例１のリードフレームを示したもので、図１（ｂ）はその平面図を、図１（ａ）はＡ１−Ａ２における断面の要部拡大図である。
図１中、１１０はリードフレーム、１１１はダイパッド、１１２はインナーリード、１１３はアウターリード、１１４はダムバー、１１５はフレーム、１１６は吊りバー、１２０はリードフレーム素材（銅合金）、１３０は銅めっき、１４０は部分銀めっき、１５０は薄い銀めっきである。
本参考実施例のリードフレーム１１０は、厚さ０．１５ｍｍの銅合金材（古河電気工業株式会社製ＥＦＴＥＣ６４Ｔ−１／２Ｈ材）からエッチング加工により図１（ｂ）のような形状に外形加工されたリードフレーム素材１２０に対し、銅めっき１３０を全面に施してから、この上に所定の領域にのみに部分銀めっき１４０を施し、さらに全面に薄い銀めっき１５０を施したものである。
本参考実施例においては、銅めっき厚を０．１μｍ、部分銀めっき厚を３μｍ、薄い銀めっき厚を０．０１μｍとしたが、銅めっき厚としては、０．１〜０．３μｍ、部分めっき厚としては１．５〜１０μｍ、薄いめっき厚としては０．００１〜０．５μｍが好ましい。また、リードフレーム素材として古河電気工業株式会社製の銅合金ＥＦＴＥＣ６４Ｔ−１／２Ｈ材を用いているが、本発明はこれに限定されることはなく、他の銅合金でも良い。 Embodiments of the present invention will be described below with reference to the drawings.
First, Reference Example 1 of a lead frame manufactured by the method of partially precious metal plating of the lead frame of the present invention will be described.
1A and 1B show a lead frame of Reference Example 1. FIG. 1B is a plan view of the lead frame, and FIG.
In FIG. 1, 110 is a lead frame, 111 is a die pad, 112 is an inner lead, 113 is an outer lead, 114 is a dam bar, 115 is a frame, 116 is a suspension bar, 120 is a lead frame material (copper alloy), and 130 is copper plating. , 140 is partial silver plating, and 150 is thin silver plating.
The lead frame 110 of this embodiment is externally processed into a shape as shown in FIG. 1B by etching from a 0.15 mm thick copper alloy material (EFTEC64T-1 / 2H material manufactured by Furukawa Electric Co., Ltd.). The lead frame material 120 is subjected to a copper plating 130 on the entire surface, and then a partial silver plating 140 is applied only to a predetermined region, and a thin silver plating 150 is applied to the entire surface.
In this reference example, the copper plating thickness was 0.1 μm, the partial silver plating thickness was 3 μm, and the thin silver plating thickness was 0.01 μm, but the copper plating thickness was 0.1 to 0.3 μm, partial plating. The thickness is preferably 1.5 to 10 μm, and the thin plating thickness is preferably 0.001 to 0.5 μm. Moreover, although the copper alloy EFTEC64T-1 / 2H material by Furukawa Electric Co., Ltd. is used as the lead frame material, the present invention is not limited to this, and other copper alloys may be used.

本参考実施例のリードフレームは、図９に示す従来のリードフレームのように、外形加工されたリードフレーム素材１２０に対し、銅めっき１３０を全面に施してから、この上に所定の領域にのみに部分銀めっき１４０を施しただけのものとは異なり、薄い銀めっき１５０を設けているものであり、薄い銀めっき１５０設けていることにより、銅めっき１３０の酸化を抑えて、酸化膜厚を低減するとともに、酸化の際にはＣｕＯよりＣｕ2 Ｏの生成を優先させるため、酸化膜自体が破壊されにくくなり、半導体装置を作製した場合には封止樹脂とのデラミネーションの発生を抑えることができるものとしている。 In the lead frame of the present embodiment, as in the conventional lead frame shown in FIG. 9, the lead frame material 120 that has been processed to the outer shape is subjected to copper plating 130 on the entire surface, and then only on a predetermined region on the copper plating 130. Unlike the case where only the partial silver plating 140 is applied, the thin silver plating 150 is provided. By providing the thin silver plating 150, the oxidation of the copper plating 130 is suppressed, and the oxide film thickness is reduced. In addition to reducing the generation of Cu 2 O over CuO during oxidation, the oxide film itself is less likely to be destroyed, and when a semiconductor device is manufactured, the occurrence of delamination with a sealing resin is suppressed. It is supposed to be possible.

本参考実施例のリードフレームを用いて半導体装置（ＩＣパッケージ）を作製する工程を図５を用いて簡単に説明しておく。
先ず、図１に示す本参考実施例のリードフレーム１１０のダイパッド１１１を、ダウンセット加工し（図５（ａ））、ダイパッド１１１上に銀ペースト１７０を介して半導体素子１６０を接合する。（図５（ｂ））
次いで、銀ペースト１７０を加熱キュアした後、半導体素子１６０の電極パッド（端子）１６１とリードフレーム１１０の部分銀めっき１４０が施されたインナーリード１１２の先端とをワイヤ（金線）１８０でワイヤボンディングして電気的に結線する。（図５（ｃ））
次いで、樹脂封止、ダムバーの除去、アウターリードのフォーミング処理、半田めっきを経て、半導体装置２００を得る。（図５（ｄ））
以上の工程を経て、図１に示すリードフレーム１１０表面の銅めっき１３０、ないしリードフレーム素材（銅合金）１２０の一部は酸化され、図５（ｃ）に示す銅酸化膜１３０Ａを形成する。
これと同時に、図１に示す銅めっき１３０上の薄い銀めっき１５０は、銅酸化膜１３０Ａおよびリードフレーム素材（銅合金）１２０中へ拡散される。 A process of manufacturing a semiconductor device (IC package) using the lead frame of the present embodiment will be briefly described with reference to FIG.
First, the die pad 111 of the lead frame 110 of the present embodiment shown in FIG. 1 is downset (FIG. 5A), and the semiconductor element 160 is bonded onto the die pad 111 via the silver paste 170. (Fig. 5 (b))
Next, after the silver paste 170 is heated and cured, the electrode pads (terminals) 161 of the semiconductor element 160 and the tips of the inner leads 112 on which the partial silver plating 140 of the lead frame 110 is applied are wire-bonded with wires (gold wires) 180. And connect them electrically. (Fig. 5 (c))
Next, the semiconductor device 200 is obtained through resin sealing, dam bar removal, outer lead forming processing, and solder plating. (Fig. 5 (d))
Through the above steps, the copper plating 130 on the surface of the lead frame 110 shown in FIG. 1 or a part of the lead frame material (copper alloy) 120 is oxidized to form a copper oxide film 130A shown in FIG. 5C.
At the same time, thin silver plating 150 on copper plating 130 shown in FIG. 1 is diffused into copper oxide film 130 </ b> A and lead frame material (copper alloy) 120.

上記本参考実施例のリードフレームを用いた半導体装置２００の作製方法においては、図５（ｃ）の段階で、加熱されたことによってダイパッド１１１における銅の表面では、Ｘ線光電子分光（ＥＳＣＡ）で観察すると、図６（ａ）ないし図６（ｂ）に示すようになっている。
尚、図６中、１３０Ａは銅酸化膜、１５０Ａは拡散された銀の存在領域、１２０はリードフレーム素材、１２０ａは銅合金を示している。
図１に示す薄い銀めっき１５０の銀は、銅酸化膜１３０Ａ及び銅リードフレーム素材（銅合金）中に拡散され、図６（ａ）に示すように、銅酸化膜領域１３０Ａ全体と銅合金１２０ａの一部にＡｇが拡散される。銅酸化膜領域１３０Ａは、ＣｕＯ１３０Ａｂを表面側にして、ＣｕＯ１３０ＡｂとＣｕ2 Ｏ１３０Ａａを形成する。
更に、Ａｇの拡散を進めると、Ａｇは銅合金の内側へ移動し、図６（ｂ）に示すように、拡散されたＡｇは表面部にはほとんど無い状態となる。
薄い銀膜１５０の厚さ、加熱条件を変えることにより、銅酸化膜の内側に銀が拡散している状態が異なり、薄い銀膜１５０の厚さがある程度厚く、加熱条件が温和である場合には酸化膜のほぼ全面までに銀が拡散する傾向にあって、銀めっきが薄く、加熱条件が厳しい場合には、銅酸化膜の内部深くに銀が拡散している状態となり易い。銀の拡散は酸化膜のみならずリードフレーム素材（銅合金）１２０まで及ぶ場合もあるまた、薄い銀めっき１５０の厚さと加熱条件が適当である場合には、ＥＳＣＡ等による表面観察によると、銅酸化膜の成分がその表面においても亜酸化銅Ｃｕ2 Ｏである状態が得られる。 In the method of manufacturing the semiconductor device 200 using the lead frame of the reference example, the copper surface of the die pad 111 is heated by X-ray photoelectron spectroscopy (ESCA) at the stage of FIG. When observed, it is as shown in FIGS. 6 (a) to 6 (b).
In FIG. 6, 130A represents a copper oxide film, 150A represents a diffused silver existing region, 120 represents a lead frame material, and 120a represents a copper alloy.
Silver in the thin silver plating 150 shown in FIG. 1 is diffused into the copper oxide film 130A and the copper lead frame material (copper alloy), and as shown in FIG. 6A, the entire copper oxide film region 130A and the copper alloy 120a are diffused. Ag is diffused in a part of. Copper oxide region 130A is the CuO130Ab on the surface side, to form a CuO130Ab and Cu 2 O130Aa.
When the diffusion of Ag further proceeds, the Ag moves to the inside of the copper alloy, and as shown in FIG. 6B, the diffused Ag becomes almost in the surface portion.
When the thickness of the thin silver film 150 and the heating conditions are changed, the state of silver diffusing inside the copper oxide film is different, and the thin silver film 150 is thick to some extent and the heating conditions are mild. In this case, silver tends to diffuse to almost the entire surface of the oxide film, and when the silver plating is thin and the heating conditions are severe, silver tends to diffuse deep inside the copper oxide film. The diffusion of silver may reach not only the oxide film but also the lead frame material (copper alloy) 120. If the thickness of the thin silver plating 150 and the heating conditions are appropriate, according to the surface observation by ESCA or the like, the copper A state in which the component of the oxide film is cuprous oxide Cu 2 O is obtained also on the surface.

これに対し、図５に示す工程と同じ工程にて、従来の図９に示す、銅めっきと部分銀めっきのみを施したリードフレームを用い、半導体装置を作製した場合には、図５（ｃ）に相当する工程での銅の酸化状態は図６（ｃ）のようになる。
従来の図９に示すリードフレームの場合には、銅表面に薄い銀めっきが施されていないため、銅の酸化は速く、結果的に酸化膜厚は、本実例の場合と比べ、厚くなり、且つ、銀の拡散が無いため、本実施例のリードフレームを用いた場合に比べ、ＣｕＯよりＣｕ2 Ｏの生成が優先されることはない。 On the other hand, when a semiconductor device is manufactured by using the lead frame on which only copper plating and partial silver plating are applied as shown in FIG. 9 in the same process as that shown in FIG. The oxidation state of copper in the process corresponding to () is as shown in FIG.
In the case of the conventional lead frame shown in FIG. 9, since the copper surface is not subjected to thin silver plating, the oxidation of copper is fast, and as a result, the oxide film thickness is thicker than in this example, In addition, since there is no silver diffusion, the production of Cu 2 O is not prioritized over CuO as compared to the case where the lead frame of this embodiment is used.

図６より、本参考実施例のリードフレーム１１０は、薄い銀めっき１４０を設けたことにより、図５（ｃ）の工程における、酸化膜の形成を抑えており、薄い銀めっき１４０を設けていない従来の場合に比べ、酸化膜厚を低減していることが分かる。
また、本参考実施例のリードフレーム１１０の場合、酸化膜生成の際、ＣｕＯよりＣｕ2 Ｏの生成を優先させるため、酸化膜自体が破壊されにくくしており、結果として、樹脂封止した際には、封止樹脂とのデラミネーションの発生を抑えることができるものとしている。 As shown in FIG. 6, the lead frame 110 of the present reference example provided the thin silver plating 140, thereby suppressing the formation of the oxide film in the process of FIG. It can be seen that the oxide film thickness is reduced as compared with the conventional case.
In addition, in the case of the lead frame 110 of this reference example, when the oxide film is generated, the generation of Cu 2 O is prioritized over the CuO, so that the oxide film itself is less likely to be destroyed. Therefore, the occurrence of delamination with the sealing resin can be suppressed.

別に、参考実施例１の変形例として、薄い銀めっきの厚さをそれぞれ、０．００１μｍ、０．０１μｍ、０．５μｍとしたものを作製したが、参考実施例１と合わせ、以下の表１のように、これらのリードフレームのダイパッド裏面の銅酸化膜の密着性、封止樹脂密着強度は評価された。
尚、ダイパッド裏面の銅酸化膜の密着性は、リードフレームをワイヤボンディング想定加熱条件２８０°Ｃ、３分間にて加熱し、ダイパッド裏面の酸化膜密着強度をテープピーリング法により調べ、剥離なしを可（○）とし、剥離ありを不可（×）とした。
封止樹脂密着強度は、封止樹脂密着強度評価用の専用フレーム（ベタ状板）に実施例１、各変形例と同じ表面処理を施したものと、従来と同じ表面処理を施したものを比較テストした。但し、両者とも部分銀めっき処理は施していない。
これらの専用フレームをワイヤボンディング想定加熱条件２８０°Ｃ、３分間の条件で加熱した後、銅合金材面に一定面積の封止樹脂を成形し、シエア法により密着強度を測定した。
判定は、２．０Ｎ／ｍｍ2 以上を可（○）とし、２．０Ｎ／ｍｍ2 未満を不可（×）とした。
尚、比較例としては、本参考実施例における薄い銀めっきの厚さを１．０μｍとしたものを挙げた。
従来例は、本参考実施例において薄い銀めっきを施さないものである。
(表１）
┌───────────────┬─────────────────┐
│ │薄い銀めっき厚 │ダイパッド裏面の│ 封止樹脂密着性│
│ │ 〔μｍ〕 │銅酸化膜密着性│ │
├──────┼────────┼────────┼────────┤
│ 変形例１│ ０．００１ │ ○ │ ○ │
├──────┼────────┼────────┼────────┤
│参考実施例１│ ０．０１ │ ○ │ ○ │
├──────┼────────┼────────┼────────┤
│ 変形例２ │ ０．１ │ ○ │ ○ │
├──────┼────────┼────────┼────────┤
│ 変形例３ │ ０．５ │ ○ │ ○ │
├──────┼────────┼────────┼────────┤
│ 比較例１ │ １．０ │ ○ │ × │
├──────┼────────┼────────┼────────┤
│ 比較例２ │薄い銀めっきなし│ × │ × │
│ （従来例）│ │ │ │
└──────┴────────┴────────┴────────┘ Separately, as modifications of Reference Example 1, thin silver plating thicknesses of 0.001 μm, 0.01 μm, and 0.5 μm were prepared. Thus, the adhesion of the copper oxide film on the back surface of the die pad of these lead frames and the sealing resin adhesion strength were evaluated.
The adhesion of the copper oxide film on the backside of the die pad can be achieved by heating the lead frame at 280 ° C for 3 minutes, assuming the wire bonding heating condition, and examining the adhesion strength of the oxide film on the backside of the die pad by the tape peeling method. (○), and no peeling (×).
The sealing resin adhesion strength is obtained by applying the same surface treatment as that of Example 1 and each modification to the dedicated frame (solid plate) for evaluation of the sealing resin adhesion strength and the same surface treatment as before. A comparative test was performed. However, both are not subjected to partial silver plating treatment.
These dedicated frames were heated under the assumption of wire bonding at 280 ° C. for 3 minutes, and then a sealing resin having a certain area was molded on the copper alloy material surface, and the adhesion strength was measured by the shear method.
Judgment made 2.0N / mm2 or more possible (good), and less than 2.0N / mm2 impossible (x).
In addition, as a comparative example, the thin silver plating thickness in this reference example was 1.0 μm.
The conventional example is one in which thin silver plating is not applied in this reference example.
(Table 1)
┌───────────────┬─────────────────┐
│ │Thin silver plating │Die pad back surface│ Sealing resin adhesion │
│ │ [μm] │Copper oxide film adhesion│ │
├──────┼────────┼────────┼────────┤
│ Modification 1 │ 0.001 │ ○ │ ○ │
├──────┼────────┼────────┼────────┤
│Reference Example 1│ 0.01 │ ○ │ ○ │
├──────┼────────┼────────┼────────┤
│ Modification 2 │ 0.1 │ ○ │ ○ │
├──────┼────────┼────────┼────────┤
│ Modification 3 │ 0.5 │ ○ │ ○ │
├──────┼────────┼────────┼────────┤
│ Comparative Example 1 │ 1.0 │ ○ │ × │
├──────┼────────┼────────┼────────┤
│ Comparative Example 2 │ Without thin silver plating │ × │ × │
│ (Conventional example) │ │ │ │
└──────┴────────┴────────┴────────┘

参考実施例では薄い銀めっきは所定の部分銀めっき後に全面に施している例を示したが、ＩＣパッケージのデラミネーション防止には効果的な部分、例えば、ダイパッド裏面への薄い部分銀めっきのみでもデラミネーション防止（酸化剥離防止）に対して効果を示すことは言うまでもない。   In the reference example, an example in which thin silver plating is applied to the entire surface after predetermined partial silver plating has been shown, but an effective part for preventing delamination of an IC package, for example, only thin partial silver plating on the back surface of a die pad Needless to say, it has an effect on delamination prevention (oxidation peeling prevention).

次に参考実施例２のリードフレームを挙げる。
図２は参考実施例２のリードフレームを示したもので、図２（ｂ）はその平面図を、図２（ａ）はＢ１−Ｂ２における断面の要部拡大図である。
図２中、１１０はリードフレーム、１１１はダイパッド、１１２はインナーリード、１１３はアウターリード、１１４はダムバー、１１５はフレーム、１２０はリードフレーム素材（銅合金）、１３０は銅めっき、１４０は部分銀めっき、１５０は薄い銀めっきである。
本参考実施例のリードフレーム１１０は、厚さ０．１５ｍｍの銅合金材（古河電気工業株式会社製ＥＦＴＥＣ６４Ｔ−１／２Ｈ材）からエッチング加工により図１（ｂ）のような形状に外形加工されたリードフレーム素材１２０に対し、銅めっき１３０を全面に施し、この上全面に薄い銀めっき１５０を施し、更にこの上に所定の領域にのみに部分銀めっき１４０を施したものである。
本参考実施例においては、銅めっき厚を０．１μｍ、薄い銀めっき厚を０．０１μｍ、部分銀めっき厚を３μｍ、としたが、実施例１のリードフレームと同様、銅めっき厚としては、０．１〜０．３μｍ、部分めっき厚としては１．５〜１０μｍ、薄いめっき厚としては０．００１〜０．５μｍが好ましい。
また、参考実施例１と同様に、リードフレーム素材として古河電気工業株式会社製の銅合金ＥＦＴＥＣ６４Ｔ−１／２Ｈ材を用いているが、これに限定されることはなく、他の銅合金でも良い。
尚、薄い銀めっきを設けたことによる、ダイパッド裏面の銅酸化膜の密着性、封止樹脂密着強度の評価による結果は、実施例１の場合と同様であった。 Next, the lead frame of Reference Example 2 will be described.
2 shows a lead frame of Reference Example 2. FIG. 2 (b) is a plan view thereof, and FIG. 2 (a) is an enlarged view of a main part of a cross section taken along B1-B2.
In FIG. 2, 110 is a lead frame, 111 is a die pad, 112 is an inner lead, 113 is an outer lead, 114 is a dam bar, 115 is a frame, 120 is a lead frame material (copper alloy), 130 is copper plating, and 140 is partial silver. Plating 150 is a thin silver plating.
The lead frame 110 of this embodiment is externally processed into a shape as shown in FIG. 1B by etching from a 0.15 mm thick copper alloy material (EFTEC64T-1 / 2H material manufactured by Furukawa Electric Co., Ltd.). The lead frame material 120 is provided with a copper plating 130 on the entire surface, a thin silver plating 150 on the entire upper surface, and a partial silver plating 140 only on a predetermined region.
In this reference example, the copper plating thickness was 0.1 μm, the thin silver plating thickness was 0.01 μm, and the partial silver plating thickness was 3 μm. However, like the lead frame of Example 1, as the copper plating thickness, 0.1 to 0.3 μm, the partial plating thickness is preferably 1.5 to 10 μm, and the thin plating thickness is preferably 0.001 to 0.5 μm.
Further, as in Reference Example 1, a copper alloy EFTEC64T-1 / 2H material manufactured by Furukawa Electric Co., Ltd. is used as a lead frame material, but the present invention is not limited to this, and other copper alloys may be used. .
In addition, the result by evaluation of the adhesiveness of the copper oxide film of the die pad back surface and sealing resin adhesion strength by providing thin silver plating was the same as that of the case of Example 1.

次に、リードフレームの部分貴金属めっき方法を説明する。
先ず、参考実施例のリードフレームの部分貴金属めっき方法を挙げ、図３に基づいて説明する。
本参考実施例は、前記参考実施例１のリードフレームを作製する製造方法である。
先ず、外形加工された銅合金からなるリードフレーム１１０Ａに対し、めっき前処理を施したものを用意し（図３（ａ））、この表面全体に銅めっき１３０を０．１μｍの厚さで施した。（図３（ｂ））
めっき前処理としては、エッチングにて外形加工された銅合金からなるリードフレーム１１０Ａの全面をアルカリ水溶液で電解脱脂し、純水で洗浄した後、酸性液で表面に形成されている酸化膜を除去する酸活性化処理を行い、リードフレーム素材１２０である銅合金の表面を活性化して、再度純水で洗浄した。
銅めっきは、液温５０°Ｃで２０秒程度シアン化銅めっきを行い、約０．１μｍの厚さに形成した。
次いで、銅めっき１３０が施されたリードフレーム１１０の所定の部分にのみ部分銀めっき１４０を３．０μｍ厚さで施した。（図３（ｃ））
部分銀めっき１４０は、通常、リードフレームの半導体素子を搭載する側のダイパッド部、半導体素子とワイヤボンディングするインナーリード先端領域のみを露出させるようにマスキング治具で覆い、リードフレームを陰極として、めっき液をノズルより噴射により吹きかける方式の部分めっきにより行うが、この際、所定の部分以外の部分に不要な薄い銀めっきが形成されてしまうことが多々ある。
この不要な薄い銀めっき部分を銀モレ部１４０Ａと言っている。この為、後述する薄い銀めっき１５０を均一に形成するために、銀モレ部１４０Ａ部を電解剥離により除去した。（図３（ｄ））
電解剥離により銀モレ部１４０Ａを除去した後、リードフレームの露出している銅めっき表面、部分銀めっき表面全体に、更に薄い銀めっき１５０を０．０１の厚さで形成した。（図３（ｅ））
このようにして、上記参考実施例１のリードフレームが形成できる。 Next, a method for partially precious metal plating of the lead frame will be described.
First, the lead frame partial noble metal plating method of the reference embodiment will be described and described with reference to FIG.
This reference example is a manufacturing method for producing the lead frame of the reference example 1.
First, an externally processed lead frame 110A made of a copper alloy is prepared by performing a pre-plating process (FIG. 3A), and a copper plating 130 is applied to the entire surface to a thickness of 0.1 μm. did. (Fig. 3 (b))
Pre-plating treatment includes electrolytically degreasing the entire surface of the lead frame 110A made of a copper alloy whose outer shape has been processed by etching with an alkaline aqueous solution, washing with pure water, and then removing the oxide film formed on the surface with an acidic solution. The surface of the copper alloy that is the lead frame material 120 was activated and washed again with pure water.
For copper plating, copper cyanide plating was performed at a liquid temperature of 50 ° C. for about 20 seconds to form a thickness of about 0.1 μm.
Next, partial silver plating 140 was applied to a thickness of 3.0 μm only on a predetermined portion of the lead frame 110 on which the copper plating 130 was applied. (Fig. 3 (c))
The partial silver plating 140 is usually covered with a masking jig so as to expose only the die pad portion of the lead frame on which the semiconductor element is mounted and the inner lead tip region that is wire-bonded to the semiconductor element, and the lead frame is used as a cathode. Although partial plating of a method in which the liquid is sprayed from a nozzle is performed, unnecessary thin silver plating is often formed in a portion other than a predetermined portion.
This unnecessary thin silver plating portion is referred to as a silver mole portion 140A. For this reason, in order to form the thin silver plating 150 mentioned later uniformly, the silver mole part 140A part was removed by electrolytic peeling. (Fig. 3 (d))
After removing the silver mole 140A by electrolytic peeling, a thinner silver plating 150 was formed to a thickness of 0.01 on the exposed copper plating surface and the entire partial silver plating surface of the lead frame. (Fig. 3 (e))
In this way, the lead frame of the reference example 1 can be formed.

次に、本発明のリードフレームの部分貴金属めっき方法の実施例を挙げ、図４に基づいて簡単に説明する。
本実施例は、前記参考実施例２のリードフレームを作製する製造方法であり、実施例１のリードフレームの部分めっき方法と異なり、銀めっきを施す前に薄い銀めっきを施すものである。
先ず、外形加工された銅合金からなるリードフレーム１１０Ａに対し、めっき前処理を施したものを用意し（図４（ａ））、この表面全体に銅めっき１３０を０．１μｍの厚さで施した。（図４（ｂ））
次いで、銅めっき１３０が施されたリードフレーム１１０Ａ全面に薄い銀めっき１５０を０．０１μｍの厚さで施した。（図４（ｃ））
この後、薄い銀めっき１５０が施されたリードフレーム１１０Ａの所定の部分にのみ部分銀めっき１４０を３．０μｍ厚さで施した。（図３（ｃ））
めっき前処理、銅めっき、銀めっき等は参考実施例の方法と同様にして行った。 Next, an example of the lead frame partial noble metal plating method of the present invention will be given and briefly described with reference to FIG.
This embodiment is a manufacturing method for producing the lead frame of the reference embodiment 2, and unlike the lead frame partial plating method of the embodiment 1, a thin silver plating is applied before the silver plating.
First, a lead frame 110A made of an externally processed copper alloy is prepared by subjecting it to a pre-plating treatment (FIG. 4A), and copper plating 130 is applied to the entire surface to a thickness of 0.1 μm. did. (Fig. 4 (b))
Next, a thin silver plating 150 was applied to a thickness of 0.01 μm on the entire surface of the lead frame 110A on which the copper plating 130 was applied. (Fig. 4 (c))
Thereafter, partial silver plating 140 was applied to a thickness of 3.0 μm only on a predetermined portion of the lead frame 110A on which the thin silver plating 150 was applied. (Fig. 3 (c))
Plating pretreatment, copper plating, silver plating and the like were performed in the same manner as in the reference example.

次に、参考実施例の半導体装置を挙げ、図にそって説明する。
参考実施例１の半導体装置は、上記参考実施例１のリードフレームを用いたもので、図５に示すように、ワイヤボンディング工程、樹脂封止工程を経て作製されたものである。 図７はその概略断面図である。
参考実施例２の半導体装置は、上記参考実施例２のリードフレームを用いたもので、参考実施例１と同様に、ワイヤボンディング工程、樹脂封止工程を経て作製されたものであるが、外見上は、図７に示す参考実施例１と同じであるが、表面の銅酸化膜１３０Ａの厚さや、拡散された銀の存在する領域が異なる。
参考実施例１、参考実施例２の半導体装置とも、デラミネーションの発生は見られなかった。 Next, a semiconductor device according to a reference example will be described and described with reference to the drawings.
The semiconductor device of Reference Example 1 uses the lead frame of Reference Example 1 and is manufactured through a wire bonding process and a resin sealing process as shown in FIG. FIG. 7 is a schematic sectional view thereof.
The semiconductor device of Reference Example 2 uses the lead frame of Reference Example 2 and is manufactured through a wire bonding process and a resin sealing process as in Reference Example 1. The above is the same as Reference Example 1 shown in FIG. 7, but the thickness of the surface copper oxide film 130A and the region where the diffused silver is present are different.
In the semiconductor devices of Reference Example 1 and Reference Example 2, no delamination was observed.

このようにして作製される参考実施例の半導体装置のデラミネーションの発生防止の信頼性を確認するため、更に以下のテストを行った。
前述の封止樹脂密着強度評価用の専用フレーム（ベタ状板）に参考実施例１、参考実施例２に示す半導体装置のリードフレームと同じ表面処を施したものと、従来と同じ表面処理を施したリードフレームを用い、各加熱条件にて銅酸化膜の厚さとＡｇ存在領域をＸ線光電子分光分析法（ＥＳＣＡ）により調べた。
そして、各条件における樹脂の密着強度を前述と同様にして測定した。
図８（ａ）は各処理にて作製したリードフレームに対して、加熱条件を変えたときの表面からの酸化膜厚およびＡｇ存在領域を表面からの距離で示したものである。
また、図８（ｂ）は、各加熱処理後の樹脂密着強度を示したものである。
加熱条件Ｌは、１５０°Ｃ１時間、Ｈは２８０°Ｃ３分間、Ｎは加熱なしを表している。
リードフレームの表面処理条件は、（１）は参考実施例１に使用したリードフレームと同じ条件、（２）は参考実施例２で使用したリードフレーム同じ条件、（３）は薄い銀めっきを施さない、銅ストライクめっきのみを施した場合の条件、（４）は銅素材上に銅−銀合金めっきを施した場合のものである。 In order to confirm the reliability of preventing the occurrence of delamination in the semiconductor device of the reference example manufactured in this way, the following test was further performed.
The same surface treatment as that of the lead frame of the semiconductor device shown in Reference Example 1 and Reference Example 2 is applied to the above-described dedicated frame (solid plate) for evaluating the sealing resin adhesion strength, and the same surface treatment as in the past Using the applied lead frame, the thickness of the copper oxide film and the Ag existence region were examined by X-ray photoelectron spectroscopy (ESCA) under each heating condition.
The adhesion strength of the resin under each condition was measured in the same manner as described above.
FIG. 8 (a) shows the oxide film thickness from the surface and the Ag existence region in terms of the distance from the surface when the heating conditions are changed for the lead frame produced by each treatment.
FIG. 8B shows the resin adhesion strength after each heat treatment.
The heating condition L represents 150 ° C. for 1 hour, H represents 280 ° C. for 3 minutes, and N represents no heating.
The lead frame surface treatment conditions were as follows: (1) the same conditions as the lead frame used in Reference Example 1, (2) the same conditions as the lead frame used in Reference Example 2, and (3) thin silver plating The condition when only copper strike plating is applied, (4) is the case when copper-silver alloy plating is applied on the copper material.

図８（ｂ）より、ワイヤボンディングに相当する加熱処理（２８０°Ｃ、３分間）後では、銅酸化膜領域全体にＡｇを含む（１）、（２）が、銅酸化膜領域全体にはＡｇを含まない（３）、（４）に比べ樹脂密着強度が優れていることが分かる。
そして、Ａｇを含まない銅酸化膜のみが形成される（３）が、（４）に比べて樹脂密着強度が劣っていることが分かる。
これより、参考実施例１、参考実施例２の半導体装置に使用されたリードフレームをワイヤボンディングに相当する加熱処理（２８０°Ｃ、３分間）にて処理したものの方が樹脂密着強度が優れていることが分かり、参考実施例１、参考実施例２の半導体装置は、デラミネーションの発生しずらいものと判断できる。 FIG. 8B shows that after the heat treatment corresponding to wire bonding (280 ° C., 3 minutes), the entire copper oxide film region contains Ag (1) and (2). It can be seen that the resin adhesion strength is superior to (3) and (4) which do not contain Ag.
And it turns out that only the copper oxide film which does not contain Ag is formed (3), but resin adhesion strength is inferior compared with (4).
As a result, the lead frame used in the semiconductor devices of Reference Example 1 and Reference Example 2 was treated with heat treatment (280 ° C., 3 minutes) corresponding to wire bonding, and the resin adhesion strength was superior. It can be seen that the semiconductor devices of Reference Example 1 and Reference Example 2 are less likely to cause delamination.

又、（４）が、（３）に比べ、リードフレームをワイヤボンディングに相当する加熱処理（２８０°Ｃ、３分間）後、比較的良好な樹脂密着強度を得ることができたのは、表面から離れてはいるが銅酸化膜中に、Ａｇが存在しているためと思われる。   In addition, compared with (3), (4) was able to obtain relatively good resin adhesion strength after heat treatment (280 ° C, 3 minutes) corresponding to wire bonding on the surface. This is probably because Ag is present in the copper oxide film.

また、（１）、（２）については、薄い銀めっき条件等を変え、酸化膜とＡｇの存在する層の厚さ、Ａｇの濃度を変えたものを幾つか作製し、調べてみたが、Ａｇ濃度はＸ線光電子分光分析法による分析で２０原子％未満が樹脂密着強度の点で適当と判断された。また、この場合、ワイヤボンディングに相当する加熱処理（２８０°Ｃ、３分間）においては、酸化膜とＡｇの存在する膜厚は２０００Å以上となることが分かった。   In addition, for (1) and (2), I made several investigations by changing the thin silver plating conditions, etc., and changing the thickness of the oxide film and the layer where Ag exists, and the concentration of Ag. The Ag concentration was determined to be appropriate in terms of resin adhesion strength by analysis by X-ray photoelectron spectroscopy with less than 20 atomic%. In this case, in the heat treatment corresponding to wire bonding (280 ° C., 3 minutes), it was found that the thickness of the oxide film and Ag was 2000 mm or more.

また、別に上記（１）〜（４）の各条件に対応する半導体装置を作製して、デラミネーションの発生を調べてみたが、デラミネーションの発生に対しては、リードフレームをワイヤボンディングに相当する加熱処理（２８０°Ｃ、３分間）後の脂密着強度は、（３）の２００Ｎは不充分であるが、（４）でもかなりその発生は抑えられ実用レベルとなることも分かった。
（１）、（２）のように、樹脂密着強度が４００Ｎ以上あれば、デラミネーションの発生がほぼ防止できることも分かった。 In addition, another semiconductor device corresponding to each of the above conditions (1) to (4) was manufactured and the occurrence of delamination was examined. For the occurrence of delamination, the lead frame corresponds to wire bonding. It was also found that the oil adhesion strength after heat treatment (280 ° C., 3 minutes) was 200N of (3), but the occurrence was significantly suppressed even in (4) and reached a practical level.
It was also found that, as in (1) and (2), when the resin adhesion strength is 400 N or more, delamination can be substantially prevented.

また、別に、参考実施例１のリードフレームにおいて、薄い銀めっきに代え、薄いパラジウムメッキ（以下、薄いＰｄめっきとも言う）を０．００１μｍ、０．０１μｍ、０、１μｍ、０．５μｍの厚さで設けたもの、および、銅合金上にＰｄめっきを１．０μｍの厚さで設けたもの、従来の薄いめっきを設けないものについて、ダイパッド裏面酸化膜の密着性、封止樹脂の密着強度を評価したが、以下の表２に示すように、表１に示す薄い銀めっきを設けた場合と、薄いＰｄめっきを設けた場合についても、ほぼ同じ結果が得られた。
尚、評価方法、条件は表１に示す薄い銀めっきを設けた場合と同じである。
（表２）
┌──────────┬────────┬────────┬───────┐
│ │薄いＰｄめっき厚│ダイパッド裏面の│封止樹脂密着性│
│ │ ［μｍ］│銅酸化膜密着性│ │
├──────────┼────────┼────────┼───────┤
│（１）全面Ｐｄめっき│ ０．００１ │ ○ │ ○ │
├──────────┼────────┼────────┼───────┤
│（２）全面Ｐｄめっき│ ０．０１ │ ○ │ ○ │
├──────────┼────────┼────────┼───────┤
│（３）全面Ｐｄめっき│ ０．１ │ ○ │ ○ │
├──────────┼────────┼────────┼───────┤
│（４）全面Ｐｄめっき│ ０．５ │ ○ │ ○ │
├──────────┼────────┼────────┼───────┤
│（５）全面Ｐｄめっき│ １．０ │ ○ │ × │
├──────────┼────────┼────────┼───────┤
│ Ｐｄめっきなし │薄いＰｄめっき │ │ │
│ （従来例） │無し │ × │ × │
└──────────┴────────┴────────┴───────┘ Separately, in the lead frame of Reference Example 1, instead of thin silver plating, thin palladium plating (hereinafter also referred to as thin Pd plating) has a thickness of 0.001 μm, 0.01 μm, 0, 1 μm, and 0.5 μm. The adhesion of the backside oxide film of the die pad and the adhesion strength of the sealing resin are as follows: those provided with a copper alloy, Pd plating on a copper alloy with a thickness of 1.0 μm, and those not provided with a conventional thin plating. Although evaluated, as shown in Table 2 below, substantially the same results were obtained when the thin silver plating shown in Table 1 was provided and when the thin Pd plating was provided.
The evaluation method and conditions are the same as those when the thin silver plating shown in Table 1 is provided.
(Table 2)
┌──────────┬────────┬────────┬───────┐
│ │Thin Pd plating thickness │On the backside of die pad│Encapsulation resin adhesion│
│ │ [μm] │ Copper oxide film adhesion │ │
├──────────┼────────┼────────┼───────┤
│ (1) Full surface Pd plating│ 0.001 │ ○ │ ○ │
├──────────┼────────┼────────┼───────┤
│ (2) Full surface Pd plating │ 0.01 │ ○ │ ○ │
├──────────┼────────┼────────┼───────┤
│ (3) Full surface Pd plating │ 0.1 │ ○ │ ○ │
├──────────┼────────┼────────┼───────┤
│ (4) Pd plating on whole surface │ 0.5 │ ○ │ ○ │
├──────────┼────────┼────────┼───────┤
│ (5) Full surface Pd plating │ 1.0 │ ○ │ × │
├──────────┼────────┼────────┼───────┤
│ No Pd plating │ Thin Pd plating │ │ │
│ (Conventional example) │ None │ × │ × │
└──────────┴────────┴────────┴───────┘

上記においては、リードフレームに薄い銀めっき、薄いＰｄめっきを施した場合について説明したが、薄い銀めっき、薄いＰｄめっきに代え、薄い金めっき、薄い白金めっきを施した場合や、これらの銀、Ｐｄ（パラジウム）、金、白金からなる薄いめっきも同様の作用効果が得られると判断される。
これらのリードフレームを用いた半導体装置についても、上記参考実施例と同様、同じ作用効果が得られると判断される。
また、部分銀めっきに代え、部分金めっき、部分パラジウムめっきとした場合にも、上記薄いめっきを設けることが有効であることは言うまでもない。 In the above, the case where thin silver plating and thin Pd plating are applied to the lead frame has been described. However, instead of thin silver plating and thin Pd plating, thin gold plating and thin platinum plating are applied, or these silver, It is judged that the same effect can be obtained by thin plating made of Pd (palladium), gold, and platinum.
It is determined that the same operation and effects can be obtained for semiconductor devices using these lead frames as in the above reference embodiment.
Needless to say, it is effective to provide the thin plating even when partial gold plating or partial palladium plating is used instead of partial silver plating.

参考実施例１のリードフレームの概略図Schematic diagram of the lead frame of Reference Example 1. 参考実施例２のリードフレームの概略図Schematic diagram of the lead frame of Reference Example 2. 参考実施例のリードフレームの部分貴金属めっき方法の実施例１の工程概略図Process schematic of Example 1 of partial noble metal plating method of lead frame of reference example 本発明のリードフレームの部分貴金属めっき方法の工程概略図Schematic diagram of process of partial noble metal plating method for lead frame of the present invention 参考実施例のリードフレームを用いた半導体装置の製作工程を説明するための図The figure for demonstrating the manufacturing process of the semiconductor device using the lead frame of a reference Example. 銅酸化膜の状態を説明するための図The figure for explaining the state of the copper oxide film 参考実施例の半導体装置の断面図Sectional view of semiconductor device of reference embodiment 参考実施例の半導体装置に用いたリードフレームの加熱処理と樹脂密着強度を説明するための図The figure for demonstrating the heat processing of the lead frame used for the semiconductor device of a reference example, and resin adhesion strength 従来のリードフレームの概略図Schematic diagram of a conventional lead frame 従来の半導体装置とリードフレームを説明するための図The figure for demonstrating the conventional semiconductor device and lead frame

符号の説明Explanation of symbols

１１０ リードフレーム
１１１ ダイパッド
１１２ インナーリード
１１３ アウターリード
１１４ ダムバー
１１５ 枠（フレーム）部
１１６ 吊りバー
１１０Ａ 外形加工されたリードフレーム
１２０ リードフレーム素材（銅合金）
１２０ａ 銅合金
１３０ 銅めっき
１３０Ａ 銅酸化膜
１３０Ａａ Ｃｕ2 Ｏ
１３０Ａｂ ＣｕＯ
１４０ 部分銀めっき
１４０Ａ 銀モレ部
１５０ 薄い銀めっき
１５０Ａ 拡散された銀の存在領域
１６０ 半導体素子
１６１ 電極パッド（端子）
１７０ 銀ペースト
１８０ ワイヤ（金線）
１９０ 封止用樹脂
２００ 半導体装置
１０００ 樹脂封止型半導体装置
１０１０ リードフレーム
１０１１ ダイパッド
１０１２ インナリード
１０１３ アウターリード
１０１４ ダムバー
１０１５ フレーム（枠）部
１０２０ 半導体素子
１０２１ 電極パッド（端子）
１０３０ ワイヤ
１０４０ 樹脂

110 Lead frame 111 Die pad 112 Inner lead 113 Outer lead 114 Dam bar 115 Frame (frame) portion 116 Hanging bar 110A Externally processed lead frame 120 Lead frame material (copper alloy)
120a Copper alloy 130 Copper plating 130A Copper oxide film 130Aa Cu 2 O
130Ab CuO
140 Partial silver plating 140A Silver mole part 150 Thin silver plating 150A Presence area 160 of diffused silver Semiconductor element 161 Electrode pad (terminal)
170 Silver paste 180 Wire (gold wire)
190 Sealing resin 200 Semiconductor device 1000 Resin sealed semiconductor device 1010 Lead frame 1011 Die pad 1012 Inner lead 1013 Outer lead 1014 Dam bar 1015 Frame (frame) portion 1020 Semiconductor element 1021 Electrode pad (terminal)
1030 Wire 1040 Resin

Claims (3)

銅合金材からなり、ワイヤボンディング用ないしダイボンディング用の、銀、金、パラジウムの少なくとも１つからなる部分貴金属めっきが施され、且つ、少なくとも封止樹脂と接する側の銅部表面の全部ないし所定の部分に、銀、金、白金、パラジウムの少なくとも１つからなる薄い貴金属めっきが施されている樹脂封止型の半導体装置用リードフレームの部分貴金属めっき法であって、少なくとも、順に、（Ａ）外形加工された銅合金からなるリードフレーム素材の表面に銅めっきを施す工程と、（Ｂ）銅めっきが施されたリードフレームの表面の全部ないし所定の部分に薄い貴金属めっきを施す工程と、（Ｃ）部分貴金属めっきを施す工程とを有することを特徴とするリードフレームの部分貴金属めっき方法。   It is made of a copper alloy material, and is subjected to partial noble metal plating made of at least one of silver, gold, and palladium for wire bonding or die bonding, and at least all or a predetermined surface of the copper portion in contact with the sealing resin Is a partial noble metal plating method for a lead frame for a resin-encapsulated semiconductor device, in which a thin noble metal plating made of at least one of silver, gold, platinum, and palladium is applied to the portion of ) A step of performing copper plating on the surface of the lead frame material made of an externally processed copper alloy; and (B) a step of applying a thin noble metal plating to all or a predetermined portion of the surface of the lead frame subjected to copper plating; (C) A method for performing partial noble metal plating of a lead frame, comprising: a step of performing partial noble metal plating. 請求項１において、薄い貴金属めっきは、電解めっきないし無電解めっきにより施すことを特徴とするリードフレームの部分貴金属めっき方法。 2. The method of claim 1, wherein the thin noble metal plating is performed by electrolytic plating or electroless plating. 請求項１ないし２において、部分貴金属めっきは部分銀めっきであり、且つ、薄い貴金属めっきが薄い銀めっきであることを特徴とするリードフレームの部分貴金属めっき方法。
3. The method of partial noble metal plating for a lead frame according to claim 1, wherein the partial noble metal plating is partial silver plating, and the thin noble metal plating is thin silver plating.
JP2004199765A 1995-09-29 2004-07-06 Partial noble metal plating method of lead frame Pending JP2004282103A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11011476B2 (en) 2018-03-12 2021-05-18 Stmicroelectronics International N.V. Lead frame surface finishing
US11264546B2 (en) 2018-09-27 2022-03-01 Nichia Corporation Metallic structure for optical semiconductor device, method for producing the same, and optical semiconductor device using the same
US11735512B2 (en) 2018-12-31 2023-08-22 Stmicroelectronics International N.V. Leadframe with a metal oxide coating and method of forming the same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11011476B2 (en) 2018-03-12 2021-05-18 Stmicroelectronics International N.V. Lead frame surface finishing
US11756899B2 (en) 2018-03-12 2023-09-12 Stmicroelectronics S.R.L. Lead frame surface finishing
US11264546B2 (en) 2018-09-27 2022-03-01 Nichia Corporation Metallic structure for optical semiconductor device, method for producing the same, and optical semiconductor device using the same
US11735512B2 (en) 2018-12-31 2023-08-22 Stmicroelectronics International N.V. Leadframe with a metal oxide coating and method of forming the same

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