JPS6115140A - Formation of pattern - Google Patents

Formation of pattern

Info

Publication number
JPS6115140A
JPS6115140A JP59135203A JP13520384A JPS6115140A JP S6115140 A JPS6115140 A JP S6115140A JP 59135203 A JP59135203 A JP 59135203A JP 13520384 A JP13520384 A JP 13520384A JP S6115140 A JPS6115140 A JP S6115140A
Authority
JP
Japan
Prior art keywords
pattern
mask
edge
resist
photoresist
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59135203A
Other languages
Japanese (ja)
Other versions
JPH0526182B2 (en
Inventor
Niwaji Majima
庭司 間島
Hiromichi Watanabe
渡辺 広道
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59135203A priority Critical patent/JPS6115140A/en
Publication of JPS6115140A publication Critical patent/JPS6115140A/en
Publication of JPH0526182B2 publication Critical patent/JPH0526182B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/20Exposure; Apparatus therefor

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

PURPOSE:To widen the angle of an edge of an etched thin film with high reproducibility by exposing a photoresist through a mask pattern, shifting the pattern, exposing the resist again through the pattern so as to widen the angle of an edge of the patterned resist, and using the resist as a mask during the etching of a thin film. CONSTITUTION:An SiO2 layer 2 and a conductor pattern 3 are formed, resin 4 is applied, and a photoresist 5 for removing the parts of the SiO2 layer 2 and the resin layer 4 in an information accumulating region 6 by etching is applied. The photoresist 5 is patterned through a mask pattern, the pattern is shifted, and the resist 5 is patterned again through the pattern to obtain an inclined edge 7. The layers 2, 4 are then etched through the patterned photoresist 5 as a mask to obtain an edge 8 having an angle theta corresponding to the angle theta of the edge 7. The preferred angle theta of the dual spacer edge 8 is <=65 deg. from the viewpoint of characteristics, so the extent (d) of shift of the mask pattern is preferably regulated to >=1.0mum. Thus, the angle of an edge of a thin film pattern can be widened with high reproducibility.

Description

【発明の詳細な説明】 発明の技術分野 本発明は磁気バブルメモリ素子等のパターン作成方法に
関するものである。
DETAILED DESCRIPTION OF THE INVENTION TECHNICAL FIELD OF THE INVENTION The present invention relates to a method for forming patterns for magnetic bubble memory elements and the like.

技術の背景 以下、磁気バブルメモリ素子に例をとり説明する。近時
、磁気バブルメモリ素子はその高密度化が進むにつれて
情報蓄積部ではバブル転送用パターンが小型化し、4メ
ガピツトチツプでは1周期が4μm程度になって来てい
る。一方スワップゲート、レプリケートゲート、ジェネ
レータ等の機能部ではコンダクタパターンとの位置合わ
せ精度を考慮して例えば16μm周期のような大きなパ
ターンを用いている。このように1つのチップ内に大き
さの異なる転送パターンを用いると、パターンの大きさ
によシバプル駆動力に相違があるため特性上問題が生ず
る。これを改善するため大きなパターン部には厚いスペ
ーサを用い、小さなパターン部には薄いスペーサを用い
て駆動力の差を調整するようにしたデュアルスペーサ方
式が開発されている。
TECHNICAL BACKGROUND The following describes an example of a magnetic bubble memory element. Recently, as the density of magnetic bubble memory elements has increased, the bubble transfer pattern in the information storage section has become smaller, and one cycle of a 4 megapixel chip has become about 4 .mu.m. On the other hand, in functional units such as swap gates, replicate gates, and generators, large patterns with a period of 16 μm, for example, are used in consideration of alignment accuracy with the conductor pattern. If transfer patterns of different sizes are used in one chip in this way, a problem arises in terms of characteristics because the pull driving force differs depending on the pattern size. To improve this, a dual spacer method has been developed in which a thick spacer is used for a large pattern portion and a thin spacer is used for a small pattern portion to adjust the difference in driving force.

従来技術と問題点 第6図は従来のデュアルスペーサ方式を説明するための
図である。この方式は、バブル用結晶20上K 5in
2層21をスパッタにより形成し、その上にAuの機能
ゲート制御用導体パターン22を作成し、その導体パタ
ーンの段差を平坦化する目的でPOLS樹脂23を塗布
・熱硬化したのち、情報蓄積部の領域aのPOLS樹脂
及びsio。
Prior Art and Problems FIG. 6 is a diagram for explaining the conventional dual spacer system. This method uses bubble crystal 20K 5in.
A second layer 21 is formed by sputtering, an Au conductor pattern 22 for functional gate control is created thereon, and a POLS resin 23 is applied and thermally cured in order to flatten the steps of the conductor pattern. POLS resin in area a and sio.

をエツチングしてバブル用結晶20の表面を露出させ、
次いで全面にsio、層24を形成し、その上にパーマ
ロイ等の軟磁性材料を蒸着した後、そのパーマロイ層を
ホトリソグラフィ法及びイオンエツチング法を用いてバ
ブル転送用パターン25゜26を形成するのである。と
ころが上記製造工程においてsio、層21とPOLS
樹脂層23をエツチングした段差部分27の角度θが9
00近く急峻であると、その後のsio、層24にもそ
の急峻さが残る。そのためパーマロイ層をエツチングす
るときに段差部分にエツチング残シが生ずる。このエツ
チング残シを防止するため、従来は投影型露光装置を用
いてレジストに露光する場合、ウェーハとレンズとの距
離をディフォーカスにしてレジストパターンのエツジを
ダレす方法がとられていた。しかしこの場合は、ダレに
対する再現性の問題が起っていた。第7図はフォーカス
とパターン寸法の関係を示したものであるが、矢印で示
すベストフォーカス以外の点ではフォーカス値に対する
パターン幅の変動が大きいことが分る。これが再現性を
得に<<シている理由である。
to expose the surface of the bubble crystal 20,
Next, a sio layer 24 is formed on the entire surface, and a soft magnetic material such as permalloy is deposited thereon, and then a bubble transfer pattern 25° 26 is formed on the permalloy layer using photolithography and ion etching. be. However, in the above manufacturing process, sio, layer 21 and POLS
The angle θ of the stepped portion 27 where the resin layer 23 is etched is 9.
If it is steep near 00, the steepness remains in the subsequent sio layer 24 as well. Therefore, when etching the permalloy layer, etching residues are left at the stepped portions. In order to prevent this etching residue, conventionally, when exposing a resist using a projection exposure apparatus, a method has been used in which the distance between the wafer and the lens is defocused to dull the edges of the resist pattern. However, in this case, there was a problem with the reproducibility of sag. FIG. 7 shows the relationship between focus and pattern dimensions, and it can be seen that the pattern width varies greatly with respect to the focus value at points other than the best focus indicated by the arrow. This is the reason why it is important to obtain reproducibility.

発明の目的 本発明は上記従来の問題点に鑑み、パターンエツジの角
度を緩くシ、且つその再現性が良好なパターン形成方法
を提供することを目的とするものである。
OBJECTS OF THE INVENTION In view of the above-mentioned conventional problems, it is an object of the present invention to provide a pattern forming method in which the angle of pattern edges is made gentle and the reproducibility thereof is good.

発明の構成 そしてこの目的は本発明によれば、ホ) IJソグラフ
ィ法によ)マスクパターンをウェーハ上の感光物質に転
写したのちエツチングしてパターンを作成するパターン
作成方法において、マスクとウェーハの相対位置を数μ
mずらし2度露光してマスクパターンを感光物質に転写
し、次いで該感光物質をマスクとしてウエーノ・上の薄
膜をエツチングすることを性徴とするパターン作成方法
を提供することによって達成される。
According to the present invention, the structure and object of the invention are as follows: (e) In a pattern creation method in which a mask pattern is transferred to a photosensitive material on a wafer (by IJ lithography method) and then etched to create a pattern, the relative relationship between the mask and the wafer is position a few μ
This is achieved by providing a pattern creation method whose characteristic is to transfer the mask pattern to a photosensitive material by exposing twice with a shift of m, and then to etch the thin film on the wafer using the photosensitive material as a mask.

発明の実施例 以下、本発明実施例を図面によって詳述する。Examples of the invention Embodiments of the present invention will be described in detail below with reference to the drawings.

第1図は本発明によるパターン作成方法の原理を説明す
るだめの図であり、aは通常の露光を行なった場合のレ
ジスト内の位置と露光ギ・を示したもの、bは本発明に
よる露光を行なった場合のレジスト内の位置と、露光量
の関係を示したものである。
FIG. 1 is a diagram for explaining the principle of the pattern creation method according to the present invention, in which a shows the position in the resist and the exposure range when normal exposure is performed, and b shows the exposure according to the present invention. This figure shows the relationship between the position in the resist and the amount of exposure when the process is performed.

a図において、レジスト内位置Oはマスクパターンのエ
ツジに相当する位置であり、露光f;1は0.5 (5
0%)となる。露光量はレンズの性能によりレジスト内
でダした分布を持つ。b図に示す本発明の場合はA、B
2回の露光を行ない、各露光の露光分を従来の棒とし、
またマスクパターンを1μmずらして行なったものであ
る。この場合A十Bで表わされる露光分布をレジスト内
に生じこれがレジストパターンのダレとなる。
In figure a, the position O in the resist is a position corresponding to the edge of the mask pattern, and the exposure f;1 is 0.5 (5
0%). The exposure amount has a distribution within the resist depending on the performance of the lens. In the case of the present invention shown in figure b, A and B
Two exposures are made, with the exposure of each exposure being a conventional bar,
Furthermore, the mask pattern was shifted by 1 μm. In this case, an exposure distribution represented by A+B occurs in the resist, which causes sag in the resist pattern.

第2図は本発明によるパターン作成方法の実施例を説明
するための図であり、aViマスクパターンをX、Y方
向に等しくずらした場合、bはX方向にだけずらした場
合である。
FIG. 2 is a diagram for explaining an embodiment of the pattern creation method according to the present invention, in which a case where the Vi mask pattern is shifted equally in the X and Y directions, and b where the Vi mask pattern is shifted only in the X direction.

同図において、Aは1回目の露光、Bはマスクパターン
をずらして露光した2回目の露光を示したものでハツチ
ングを施した部分がダレを生ずる部分である。従ってa
図においては2点、b図においては2直線にダレの少な
い部分を生じている。
In the figure, A shows the first exposure, and B shows the second exposure with the mask pattern shifted, and the hatched areas are the areas where sagging occurs. Therefore a
In the figure, there are two points, and in figure b, two straight lines have areas with little sagging.

第3図は本発明を磁気バブルメモリのデュアルスペーサ
方式の段差部に応用した例を示した図であシ、aはホト
レジストパターン作成後、bは5in2.POLS層の
エツチング後の状態をそれぞれ示す。
FIG. 3 is a diagram showing an example in which the present invention is applied to a stepped portion of a dual spacer method of a magnetic bubble memory, in which a is after the photoresist pattern is created, and b is a 5in2. Each figure shows the state of the POLS layer after etching.

同図において、1はバブル用結晶、2はSiO2層、3
は導体パターン、4はPOLS樹脂層、5はホトレジス
トをそれぞれ示す。
In the figure, 1 is a bubble crystal, 2 is a SiO2 layer, and 3 is a bubble crystal.
4 indicates a conductor pattern, 4 indicates a POLS resin layer, and 5 indicates a photoresist.

本応用例は第3図aに示す様にS iO,層2、導体パ
ターン3作成、POLS樹脂4塗布後、情報蓄積領域6
(4μm周期パターン部)の5IO2層2とPOLS樹
脂層4をエツチング除去するためホトレジスト5を塗布
し、本発明方法を用いてパターニングし傾斜したエツジ
部7を得る。このパターニングしたホトレジスト5をマ
スクとしてSio!層2及びPOLS樹脂層4をドライ
エツチングすればb図の如くホトレジスト5のエツジ部
の角度に対応した角度θでsio、層2及びPOLS樹
脂層4の段差部8が得られる。この場合ホトレジスト5
のエツジのテーパ角θと2回露光のマスクパターンのず
らし量dとの関係は第4図に示す如くKなる。デュアル
スペーサ方式部8の角度θは65°以下が特性上好まし
いことが分っており、これよりdは1.0μm以上が良
いことが分る。
In this application example, as shown in Fig. 3a, after creating SiO layer 2, conductor pattern 3, and coating POLS resin 4, information storage area 6
A photoresist 5 is applied to remove the 5IO2 layer 2 and the POLS resin layer 4 (4 μm periodic pattern portion) by etching, and is patterned using the method of the present invention to obtain an inclined edge portion 7. Using this patterned photoresist 5 as a mask, Sio! By dry etching the layer 2 and the POLS resin layer 4, a stepped portion 8 of the layer 2 and the POLS resin layer 4 is obtained at an angle θ corresponding to the angle of the edge portion of the photoresist 5, as shown in FIG. In this case, photoresist 5
The relationship between the edge taper angle θ and the shift amount d of the double exposure mask pattern is K as shown in FIG. It has been found that the angle θ of the dual spacer type portion 8 is preferably 65° or less in terms of characteristics, and from this it is understood that d is preferably 1.0 μm or more.

また本発明は導体パターンの作成にも適用可能である。The present invention is also applicable to the creation of conductor patterns.

即ち、第5図に示すようにパーマロイパターン10が横
切る導体パターン11のエッヂに傾斜(ハツチングを付
して示した部分)を付はパーマロイパターン10に生ず
る段差を緩和することも可能である。
That is, as shown in FIG. 5, it is also possible to reduce the level difference that occurs in the permalloy pattern 10 by sloping the edge of the conductor pattern 11 that the permalloy pattern 10 traverses (the hatched area).

発明の効果 以上、詳細に説明したように本発明のパターン形成方法
はホトレジストに対しマスクパターンをずらして2度露
光することにより、レジストのパターンエツジ部の角度
を酸クシ1、そのレジストをマスクとして薄膜をエツチ
ングした場合の薄膜パターンのエツジ部の角度を緩くす
ることを再現性良く実現することができるといった効果
大なるものである。
Effects of the Invention As explained in detail above, the pattern forming method of the present invention exposes the photoresist twice with a mask pattern shifted, thereby changing the angle of the pattern edge portion of the resist to 1 with an acid comb and using the resist as a mask. This has a great effect in that when etching a thin film, the angle of the edge portion of the thin film pattern can be made gentler with good reproducibility.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明によるパターン作成方法の原理を説明す
るための図、第2図は本発明によるパターン作成方法の
実施例を説明するための図、第3図は本発明によるパタ
ーン作成方法の応用例としてデュアルスペーサ方式の磁
気バブルメモリを説明するだめの図、第4図はマスクパ
ターンのずらし量とホトレジストのパターンエツジのテ
ーパ角との関係を示した図、第5図は本発明のパターン
作成方法を導体パターンに応用した例を説明するだめの
図、第6図は従来のデュアルスペーサ方式の磁気バブル
メモリを説明するための図、第7図はフォーカスとパタ
ーン寸法の関係を示した図である。 図面において、1はバブル用結晶、2はsio。 層、3け導体パターン、4はPOLS樹脂層、5はホト
レジスト、6は情報蓄積領域、7,8はエツジ部をそれ
ぞれ示す。
FIG. 1 is a diagram for explaining the principle of the pattern creation method according to the invention, FIG. 2 is a diagram for explaining an embodiment of the pattern creation method according to the invention, and FIG. 3 is a diagram for explaining the embodiment of the pattern creation method according to the invention. A diagram for explaining a dual spacer type magnetic bubble memory as an application example, Figure 4 is a diagram showing the relationship between the amount of mask pattern shift and the taper angle of the pattern edge of the photoresist, and Figure 5 is a diagram showing the pattern of the present invention. Figure 6 is a diagram to explain an example of applying the creation method to a conductor pattern, Figure 6 is a diagram to explain a conventional dual spacer type magnetic bubble memory, and Figure 7 is a diagram showing the relationship between focus and pattern dimensions. It is. In the drawing, 1 is a bubble crystal and 2 is a sio. 4 is a POLS resin layer, 5 is a photoresist, 6 is an information storage area, and 7 and 8 are edge portions.

Claims (1)

【特許請求の範囲】 1、ホトリソグラフィ法によりマスクパターンをウェー
ハ上の感光物質に転写したのちエッチングしてパターン
を作成するパターン作成方法において、マスクとウェー
ハの相対位置をずらして2度露光してマスクパターンを
感光物質に転写し、該感光物質をマスクとしてウェーハ
上の薄膜をエッチングすることを特徴とするパターン作
成方法。 2、上記マスクパターンの露光に投影型ステッパー方式
を用いることを特徴とする特許請求の範囲第1項記載の
パターン作成方法。 3、上記マスクとウェーハとの相対位置のずらし量がX
方向とY方向とで異なることを特徴とする特許請求の範
囲第1項記載のパターン作成方法。 4、上記薄膜のエッチングはイオンエッチングあるいは
プラズマエッチング等のドライエッチング法を用いるこ
とを特徴とする特許請求の範囲第1項記載のパターン作
成方法。
[Claims] 1. In a pattern creation method in which a mask pattern is transferred to a photosensitive material on a wafer by photolithography and then etched to create a pattern, the mask pattern is exposed twice by shifting the relative positions of the mask and the wafer. A pattern creation method comprising transferring a mask pattern to a photosensitive material and etching a thin film on a wafer using the photosensitive material as a mask. 2. The pattern forming method according to claim 1, wherein a projection type stepper method is used for exposing the mask pattern. 3. The amount of shift in relative position between the mask and wafer is X
2. The pattern creation method according to claim 1, wherein the pattern creation method is different in the direction and in the Y direction. 4. The pattern forming method according to claim 1, wherein the thin film is etched using a dry etching method such as ion etching or plasma etching.
JP59135203A 1984-07-02 1984-07-02 Formation of pattern Granted JPS6115140A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59135203A JPS6115140A (en) 1984-07-02 1984-07-02 Formation of pattern

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59135203A JPS6115140A (en) 1984-07-02 1984-07-02 Formation of pattern

Publications (2)

Publication Number Publication Date
JPS6115140A true JPS6115140A (en) 1986-01-23
JPH0526182B2 JPH0526182B2 (en) 1993-04-15

Family

ID=15146260

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59135203A Granted JPS6115140A (en) 1984-07-02 1984-07-02 Formation of pattern

Country Status (1)

Country Link
JP (1) JPS6115140A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04350272A (en) * 1991-01-31 1992-12-04 Kajima Corp Vertical type underground parking yard

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5429976A (en) * 1977-08-10 1979-03-06 Nec Home Electronics Ltd Manufacture of semiconductor device
JPS5968737A (en) * 1982-10-13 1984-04-18 Tokyo Ohka Kogyo Co Ltd Simultaneous formation of positive and negative type patterns

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5429976A (en) * 1977-08-10 1979-03-06 Nec Home Electronics Ltd Manufacture of semiconductor device
JPS5968737A (en) * 1982-10-13 1984-04-18 Tokyo Ohka Kogyo Co Ltd Simultaneous formation of positive and negative type patterns

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04350272A (en) * 1991-01-31 1992-12-04 Kajima Corp Vertical type underground parking yard

Also Published As

Publication number Publication date
JPH0526182B2 (en) 1993-04-15

Similar Documents

Publication Publication Date Title
WO2002095498A2 (en) Lithographic method of manufacturing a device
JPH03228053A (en) Optical exposing reticule
JPH075675A (en) Mask and preparation thereof
KR0166497B1 (en) Phase inversion mask and the method of production therefrom
US20030039893A1 (en) Exposed phase edge mask method for generating periodic structures with subwavelength feature
JPS6236636B2 (en)
JPS6211068B2 (en)
JPS6115140A (en) Formation of pattern
JP2000056469A (en) Formation of resist pattern
JPS6326536B2 (en)
KR100230351B1 (en) Pattern forming method
US6830853B1 (en) Chrome mask dry etching process to reduce loading effect and defects
US5747196A (en) Method of fabricating a phase-shift photomask
JP2610402B2 (en) Method of manufacturing T-shaped gate by double exposure
US5682056A (en) Phase shifting mask and method of manufacturing same
JPS59155921A (en) Formation of resist pattern
KR0138066B1 (en) The manufacture of phase shift mask
JP3222531B2 (en) Method for manufacturing photomask having phase shift layer
JP3215394B2 (en) Method for manufacturing electrode wiring conduction hole and method for manufacturing semiconductor device
JP3241793B2 (en) Phase shift photomask
JPH06132216A (en) Pattern forming method
JPH05142751A (en) Photomask and projection exposure method
JPS6233580B2 (en)
JPH0567566A (en) Multilayer resist and manufacture of resist pattern using it
JP2773718B2 (en) Photomask and pattern forming method

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees