JPS61147337A - Microprogram control system - Google Patents

Abstract

PURPOSE:To attain high speed trap processing by providing a trap address register and saving a microprogram address for the processing executed next at generation of response waiting. CONSTITUTION:When a response wait is generated, a microprogram issues a link return order to save a microprogram address for the processing executed next set to a CSAR13 to a CS address area of the entry of corresponding channel of a trap address register (TAR) 16 via a gate G4. When a response comes from an external device, a channel trap is generated and its channel number is set to a CHNR17. The TAR16 is searched according to the number, and when a bad bit of the entry coincident to the channel number is set, a CS address of the CS address area of the entry is read and set to the CSAR13 through a gate G6.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention provides a microprogram control method when a trap occurs, and more specifically, a microprogram control method when a trap occurs, and more specifically, when a response wait from an external device occurs during microprogram processing. , relates to a microprogram control method in which control of a microprogram is transferred to another channel, and when a response is received from an external device and a trap is generated, the original processing routine is immediately returned to and executed.

[Conventional technology]

When a microprogram is processing a channel system, for example, if the response from an external device is slow, the microprogram will be temporarily interrupted, but the waiting time from the time the response wait occurs until the response from the external device is received can be used. In this way, control of the microprogram is transferred to other channels so that multiple channels can operate simultaneously.

In that case, it is necessary to be able to immediately return to the original processing routine when a response is received from the external device.

When a trap occurs, it is difficult to provide a large number of trap address pis, so a routine is provided to determine what processing to do after playing a card, and processing is assigned to each channel. However, when a large number of channels are connected and the number of channels that operate simultaneously increases, the number of traps increases and the reoverhead becomes large, resulting in a long determination routine time. As a result, the time required to return to the original processing routine after receiving a response from the external device is delayed, and even if the routine returns, there is less time to actually perform the processing, so there is a risk that an overrun may occur.

Therefore, on the one hand, in order to prevent such an overrun from occurring, when a trap is generated due to waiting for a response from an external device, processing is not moved to another channel.
There is a method in which the microprogram itself performs response waiting processing. This reduces overhead and eliminates the risk of overrun, but on the other hand, the number of channels that can be operated simultaneously decreases.

[Problem that the invention seeks to solve]

As mentioned above, the conventional microprogram control method
Methods that shift processing to other channels when a trap occurs have the problem of overruns occurring when there are a large number of channels; methods that do not shift processing to other channels do not cause overruns, but However, there was a problem in that the number of channels that could operate simultaneously was reduced.

[Means for solving problems]

The present invention solves the above-mentioned problems in the conventional microprogram control method, and provides a microprogram control method that does not reduce the number of channels that can operate simultaneously when a trap occurs and can perform high-speed trap processing without overrun. As a means to achieve this, if a channel is waiting for a response from an external device while executing microprogram processing, control of the microprogram is transferred to another channel, and when a response is received from the external device, the channel waits for a response from an external device. In a microprogram control method that resumes execution of the original channel processing, a trap address register is used to store the microprogram address for each channel, and when a response wait occurs, the next processing of the processing currently being executed is used. means to save the microprogram address of the channel in the trap address register, and when a response is received from an external device, the microprogram address of the channel that received the response is retrieved from the trap address register and the original channel processing is performed. A means for making it a microprogram address is provided.

[Effect]

If a response wait from an external device occurs while the channel is executing a microprogram process, the microprogram address of the next process currently being executed is saved in the trap address register. At the same time, control of the microprogram is transferred to another channel and the processing of that channel is executed.

When a response is received from an external device, the trap address register is used to store the microflocram of the channel from which the response was received.
Fetch the address and resume execution of the original channel process.

〔Example〕

Embodiments of the present invention will be described in detail with reference to the drawings.

The drawings illustrate one embodiment of the present invention using a block diagram.

In the figure, 11 is control storage (C3)
Control information for controlling each channel is stored therein. 12
is a cs data register (C3DR) into which control information read from C3lI is sent. 13 is the CS address register (C3AR), which is the microprogram address that accesses C3lI, that is, the channel address register.
The address and the address of the next process to be executed in that channel are set. 14 is a processing request routine・C
The S address register (PRCSAR) stores the microprogram address for C3lI, which determines processing when a trap occurs.

15 is a link register and save register (LR-
3R), the control information being executed when a trap occurs is stored and restored when a return order arrives.

16 is a trap address register (TAR) with an entry (E
o"Er1), and stores the microprogram address for the next process of the process being executed when a response wait occurs. Each entry is provided with a CS address area and a valid bit. The valid bit is set ON when the microprogram address for processing the law is stored in .

Reference numeral 17 denotes a channel number register (CHNR) in which the channel number in which a trap occurs is stored. 61~
GG is a gate.

Next, the operation of the drawings will be explained.

In the state of normal channel processing before a trap occurs, control information for a predetermined channel is read from the C811 according to the microprogram address of the C3AR13 and set in the C3DR12. The control information set in the C3DR 12 is transferred to a predetermined processing unit (not shown). The channel address in the microprogram address read from C5AR13 is returned to C3AR13 by gate G1 and becomes the channel address for the next process to be executed. On the other hand, the address of the next process to be executed in that channel is set in C5ARI3 from C5DR12 via gate G2. Using the microprogram address thus generated, control information for the next process to be executed is read from C3lI.

Thereafter, the above-described operations are repeated to execute a desired series of processing on that channel. If subroutine processing is interrupted during execution of processing for this channel, C3AR
The microprogram address of 13 and the control information being executed are saved in the LR-SR15, and when the subroutine processing is completed, the microprogram address is returned to the C5AR13 via the G3 and the original channel processing resumes. will be resumed. These normal channel processing operations are similar to those in the conventional microprogram control system.

By the way, while the channel processing is executed at high speed, the processing of the external bag W (not shown) is much slower than the channel processing, so it takes a long time from issuing a command to the external device until receiving a response. During this time, the microprogram execution is interrupted and a response wait occurs.

When a response wait occurs, the microprogram issues a link return order and sends the microprogram address of the next process to be executed, which is sent to C5AR13, to the CS address of the entry of the corresponding channel in TAR16 via gate G. Save to area. At this time, the valid bit of that entry is set to ON. Furthermore,
C3AR engineer 3 has various control information set by link return order from LR-3R15 through gate G3.

When this processing is completed, processing is transferred to another channel. Control information is read from C3lI according to the microprogram address of C3AR13, and processing for that channel is executed.

When a response is received from an external device, a channel trap is generated.
The channel number is set in CHNRl 7.

The TAR16 is searched according to this channel number, and when the pad bit of an entry that matches this channel number is ON, the CS address in the CS address area of that entry is read out and passed through the gate Ge to the C5AR1.
Set to 3. The CS address at this time is the microprogram address of the process to be executed next by the original channel, so the control information for the process to be executed next by the original channel is read from C3lI according to this microprogram address. , processing of the original channel is resumed.

If the valid bit of the entry corresponding to the channel number set in CHNR17 in TAR16 is
In the case of F, since the channel trap is not for the original channel, processing of the channel that generated the trap is executed using the address of the processing request determination routine, PRC3AR14, and Gs, as in the conventional system. The CS address being processed before the trap is LR-3R1.
It is stored in 5.

In this way, even when waiting for a response from an external device occurs during channel processing, microprogram control can be transferred to another channel, and when a response comes from the external device, the control of the original channel can be transferred immediately. The processing routine can be restarted.

〔Effect of the invention〕

As explained above, according to the present invention, a trap address register is provided to save the microprogram address of the next process to be executed when a response wait occurs, so when a response is received from an external device, It is possible to immediately return to the original process and perform high-speed trap processing without overruns. Furthermore, when a response wait occurs, microprogram control can be immediately transferred to another channel, so a plurality of channels can be operated at the same time.

[Brief explanation of drawings]

The drawings are explanatory diagrams of one embodiment of the present invention. In the figure, 11 is control storage (CS), 12
is the CS data register (C5DR), 13 is the CS address register (CSAR), 14 is the processing request routine CS address register (PRC3AR), 1
5 is the link register and save register (LR-3R
), 16 is the trap address register (TAR)
, 17 is a channel number register (CHAR), G
1 to G6 indicate gates, respectively.

Claims (1)

[Claims] If a channel is waiting for a response from an external device while executing microprogram processing, control of the microprogram is transferred to another channel, and when a response is received from the external device, execution of the original channel processing is resumed. In the microprogram control method, there is a trap address register that stores the microprogram address for each channel, and a trap address register that stores the microprogram address of the next process after the process currently being executed when a response wait occurs. When a response is received from an external device, a microprogram that retrieves the microprogram address of the channel from which the response came from the trap address register and performs the original channel processing.
A microprogram control system characterized by having a means for making an address.