JPS61147303A - Access method of special unit - Google Patents

Abstract

PURPOSE:To decrease the transfer time by connecting directly a microprocessor of a programmable controlled and a memory of a special unit with an address bus and a data bus so as to access plural data once. CONSTITUTION:The address bus data buses of a number corresponding to a bit number processed by the microprocessor 2 once are connected directly between the microprocessor 2 of the programmable controller 1 and the memory 6 of the special unit 4, and an instruction accessing exclusively the special unit 4 is added to sequence instructions. Thus, plural data are accessed once and the data transfer time is decreased.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an access method for exchanging data between a programmable controller and a special unit each having a microprocessor T-.

[Conventional technology]

Figure 3 is a block diagram showing a method of accessing special units of a conventional programmable controller.
Figure Vcg 1 frame programmable controller y) a -9%
2 is the controller 1's microprocessor, 3 is the programmable: fn) 1: l-110/
MoIJ, 4 is a special unit, 5 is its special unit 40
Microgro Nanatsusa, 6 2 special effects 4 memory, 1
9 is a temporary storage memory; 20 is an address bus for specifying the address of the temporary storage memory 19; 21 is a single line for transferring data between the microprocessor 2 and the temporary storage memory 19 in series with pits; This is the data line.

FIG. 4 is a circuit diagram of a sequence program for reading the contents of the memory 6 of the special unit 4. 22 is the ninth address set condition contact for sectoring the address to be read from the memory 6 of the special unit 4; 23 is the address set command for sectoring that address; 9atff read request contact; 24 is the read registration command; 25H is the read permission contact.

26 is a command to read data from the special unit.

2T is a read completion contact, and 28 is a read request reset command.

FIG. 5 is a circuit diagram of the mth sequence program for writing data into the memory 6 of the special unit 4. 29, data set condition contact, 30rX, data sector command, 9
brX'i write request contact, write request command to 31,
Write completion contact at 32.

33 This is a frame finishing completion reset command.

I will explain the operation shortly.

(jL) Read operation When the microprocessor 2 closes the address set conditional contact A22, the address set instruction 23 is executed, causing the microprocessor 2 to output an address to the address bus 20 and output data to the data line 21, These are written into the temporary storage memory 19. After completing this writing to the microprocessor f2, the read request contact 9at is closed and the read request command 24 is executed, thereby issuing a read request to the microprocessor 5. by this.

The microprocessor 5 reads data from the memory 6 according to the address written in the temporary memory 191C;
This is written into the temporary storage memory 19, and read and output to the microprocessor 2. The read permission contact 2 is connected to the microprocessor 2 that has received the read permission.
5t-Close, execute read command. This command outputs an address to the address path 20 and temporarily stores it in memory 1.
Data from 9 is read one pit at a time through the data line 21.

The data is stored in a data register provided in the programmer gourmet sled 3. When the data is stored in this data register, the read completion liquid A27t-closes and a read request reset command 28 outputs the release of the read request to the microprocessor 5. Microprocessor 5 in response to this? Outputs read permission cancellation for 2.

The read permission is canceled by the microprocessor 2 and the data read operation from the special unit 4 is completed.

(bJ '! Write operation Address set conditional connection A22t - When closed, the address set instruction 23 is executed, and the data on the data line 21 is written in the temporary storage memory 19 in 1-bit units according to the address output to the address bus 20. When the data sector conditional contact 629 is closed, the write data set command 30 is executed, and the data to be written is written into the temporary storage memory 19 in the same way as in the case of address set.When the write request contact 9 is closed, Write request command 31
is executed, thereby issuing a write request to microprocessor 2 and microprocessor 5. In response to this, the microprocessor 5 causes the temporary storage memory 19 to
The data in the temporary storage memory 19 is written to the memory 6 according to the address.

Upon completion of this write, when a write completion signal is output from the microprocessor 24C, the microprocessor 24C outputs a write completion signal.
% write completion contact 32 is closed and a write request reset command 33t is executed, thereby outputting a write request cancellation command to the microprocessor 5. Microprocessor 5 outputs a signal for canceling the write operation to microprocessor 2 in response to this cancellation command. Therefore, the microprocessor 2 receives this signal, cancels the v write operation, and completes the data write operation to the memory 6.

[Problems that the invention helps solve]

Since the conventional special unit access method is structured with one or more lines, there is only one data line, and when sending and receiving necessary data with the special unit, the data is temporarily stored one pit at a time in the memory. There is a problem in that control signals such as request signals and completion signals must be passed between the unit and the unit. Ta.

In addition, in the conventional access method, the sequence instruction is a dedicated instruction for accessing data to a special unit, and therefore an instruction for controlling the special unit is issued before and after actually accessing the data. Furthermore, since the amount that can be stored in the temporary memory is one data, when accessing multiple data, a prescribed sequence program that accesses tZI data must be executed for the required number of data, making the sequence program complicated and There were 5 problems with 1% that the number would be too large.

This invention has been made to solve the above-mentioned problem A, so that it is possible to shorten the processing time required to access data at any location in the memory of a special unit, and to It is an object of the present invention to provide a method for accessing a special unit that can access all data, simplify the procedure required to access the data, and thereby reduce the number of steps in a sequence program.

[Means for solving problems]

To a special unit access method according to the present invention.

An address bus and a number of data buses corresponding to the number of bits that the microprocessor can process at one time are directly connected between the microprocessor of the programmable controller and the memory of the special unit, and the special unit is dedicated to sequence instructions. Add all commands to access 1
It's something.

[Effect]

Data access in this invention is achieved by direct connection between the program controller's microprocessor and the memory of the special unit by the address bus and the hitator bus, so that the programmable controller's microprocessor accesses the memory of the special unit by sequence instructions. Direct access.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. 1st
In the figure, programmable controller 1. ￥Ikroproset? 2. Memory 3. Special unit 4. The microprocessor 5 and the memory 6 are identical to those in FIG. , 8 is an address bus for transferring addresses between the microprocessor 2 and the temporary storage memory 6. FIG. 2 is a circuit diagram of a sequence program for reading and writing from the memory 6. 10 is a data read command from the memory 6 of the special unit 4;

11 is the number of the special unit 4, 12 is the address of the special unit 4, 13 is the read data storage register, 14 is the number of read data, 15 is the write request contact, 16 is the data write command to the special unit 4, 17U write data storage This is the number of data written in register 18.

I will explain the operation shortly.

(a) Read operation When the microprocessor 2 executes the sequence program and closes the read request contact 9f, it executes the data read command 10 of the memory 6, and first the microprocessor 5 makes the memory 6 accessible as desired. The microprocessor 5 is then stopped. Special unit 4
Read data from address 12 specified by 0 number 11.

This data is stored in the data storage register 13.

When the number of read data 14 is 2 or more, the order is different.

The data is read by adding 1 to the address 12 and sequentially stored in the data storage register 13. This is repeated for the number of read data 14 times. After only the read data 14 has been read, the stoppage of the microprocessor 5 is released and the read operation is completed.

(v) Write operation When the write request contact 15 closes, the data write command 16 to the memory 6 is executed. In response to the command, the microprocessor 2 stops the microprocessor 5 from accessing the memory 6fc of the special unit 4. The write data storage register 1 is specified by the number 11 and address 12 of the special unit 4 of the sequence instruction.
Input data into T. When the number of write data 18 is 2 or more, the address 12 is sequentially incremented by 1 and the data commitment is repeated by the number indicated by the number of write data 18. Thereafter, the microprocessor 2 releases the stoppage of the microprocessor 5 and completes the convolution process.

〔Effect of the invention〕

From the above, according to the present invention, since the memory of the special unit is configured to be directly accessed from the grogramiple controller, multiple data can be accessed at once, and therefore the data transfer time is shortened. Since a dedicated sequence command that accesses the memory of the unit is added, the sequence program can be shortened.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a programmable controller and special unit using a special unit access method according to an embodiment of the present invention, and FIG. 2 is a circuit diagram showing processing for accessing data. 3 is a block diagram of a programmable controller and a special unit using the conventional special unit access method, FIG. 4 is a circuit diagram of a sequence globular for reading data from the special unit shown in FIG. 3, and FIG. This figure is a circuit diagram of a sequence program for writing data from the special unit shown in FIG. 3. 1 is a program controller, 2+5tz-v microprocessor, 3 and 6 are memory, 4 is a special unit, raf
- bus, 8 is an address bus. In Figure 31, the same reference numerals indicate the same or equivalent parts. Patent Applicant Mitsubishi Electric Corporation Figure 1 Figure 2 Throw Figure 3 Figure 4 @ Figure 5 Procedural Amendment Clearance (Voluntary) Month, Day, Showa

Claims (1)

[Claims] When the microprocessor in the programmable controller and the memory in the special unit are connected by address and multiple data buses, and data is exchanged between the programmable controller and the special unit, the microprocessor in the special unit A special unit that prohibits access to the memory, specifies the number and address of the special unit, and the number of data to be transferred, and transfers data via the memory and the data bus in accordance with the specifications. How to access.