JPS61145650A - Test system of information processing unit - Google Patents

Abstract

PURPOSE:To prevent malfunction of any processing unit from causing a data by executing a test execution task at each prescribed time and stopping the operating system OS when an error of the processing unit is detected. CONSTITUTION:Test execution tasks 11, 12 for a number of sets corresponding to the number of processing units to test processing units 14, 15 and an OS13 controlling test execution tasks 11, 12 are stored in a main storage device 10. The OS13 controls the test execution tasks 11, 12 so as to be executed by the processing unit 14 or 15 at each prescribed time, the test execution tasks 11, 12 test sequentially the processing unit 14 or 15, and when an error is detected, the execution stop request is applied to the OS13. The OS13 stops the execution of the OS13 itself and even if an error not checked by the software exists, it is prevented that the error becomes a data.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a testing method for an information processing device, and particularly to a health check method for testing under the control of an operating system' (hereinafter referred to as "O5").

[Prior Art] Conventionally, a failure in an information processing device occurs as a result of detection by a check circuit within the device, and when a failure that cannot be checked by the check circuit occurs. This was left to the detection of logical contradictions in software such as S.

[Problem to be solved by the invention] For this reason, failures that are expected to be detected in the form of logical contradictions in software cannot be detected by software because software is not created for the purpose of detecting hardware failures. There were cases where it was not done. In this case, the failure resulted in garbled data, and since the failure was detected a long time after the failure occurred, there was a fatal problem in that data recovery was difficult.

SUMMARY OF THE INVENTION An object of the present invention is to provide a testing method for an information processing device that can prevent data from being garbled in the event of a failure that cannot be detected even in software.

Means for Solving Problem c] In order to solve this problem, the present invention mainly provides a test execution task for the number of processing devices for testing the processing device and an operating system that controls this test execution task. Store it in your storage device.

The test execution task is executed on one processing device at fixed intervals.The operating system controls the test execution task, and each test execution task sequentially tests the corresponding processing device. When an error is detected, a request to stop execution is sent to the operating system, and the operating system immediately stops its own execution.

[Example] Embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a configuration diagram of an embodiment of an information processing apparatus to which the information processing apparatus testing method according to the present invention is applied.

On the main storage device 1G, there are 0813 and processing units (hereinafter referred to as CPUs) 14 and 15 connected to the main storage device IO.
Test execution tasks 11 and 12 for testing each of the following are stored.

Figure 2 shows 0513 that controls test execution task 11.12.
FIG. 3 is a schematic flow chart of test execution task 11.
12 is a schematic flowchart of an lO base addition instruction in No. 12;

Next, the operation of this embodiment will be explained with reference to the drawings. 0513 turns off the test execution task end flag (not shown) through process 21 and starts the test execution task 11. When control is transferred to process 31, test object C
Transfer the PU number and test target instruction to the message sender. In process 32, the lO base addition instruction to be tested is executed. In process 33, the execution result of the decimal addition instruction and the expected value are compared in 0 judgment 34, and if the results match, the process moves to process 38 and the next test is executed.

If the results match in the last test, a test execution task end flag (not shown) is turned on and the processing of the test execution task 11 is ended.

After this, control at 0813 moves from judgment 22 to processing 23 in FIG. Processes 23 and 24 test the CPU 15 in the same manner as processes 21 and 22.

When the execution of the test execution task 12 is finished, the OS 13 sets a one-hour timer in process 25.

After one hour has elapsed, the process moves from judgment 2B to process 21, and the test is executed again.

If there is no match in the judgment 34 of FIG.

Control of the program moves to process 35, where the execution result in process 32 and the expected value used in process 33 are transferred to the message output canister. Thereafter, in step 36, the error message is edited and output to a message output device (not shown).

When control of the program is transferred to process 37, a stop request is issued to 0513, and 0513 immediately performs system stop processing (not shown).

This prevents garbled data due to malfunction of the CPUs 14 and 15.

In this example, there were two processing devices to be tested.
It goes without saying that the present invention is applicable to any information processing apparatus having one or more processing apparatuses.

[Effects of the Invention] As explained above, the present invention stores the test execution tasks for each processing device and the operating system that controls them in the main memory, executes the test execution tasks at regular intervals, and executes the processing. By stopping the operating system when a device error is detected, it is possible to prevent data from being garbled even if any of the processing devices malfunctions.

[Brief explanation of drawings]

FIG. 1 is a configuration diagram of an embodiment of an information processing device to which the information processing device testing method according to the present invention is applied, FIG. 2 is a flowchart of the OS 13 that controls the test execution task ti, 12, and FIG. 3 is a general flow diagram of the decimal add instruction test within test execution task 11.12. lO...Main storage device 11, 12...Test execution task 13...Operating system 14, 15...Processing device Fig. 1 Fig. 3

Claims (1)

[Scope of Claims] In an information processing device including one or more processing devices connected to a main storage device, controlling a test execution task for the number of processing devices for testing the processing device and the test execution task. An operating system is stored in the main storage device, and the operating system controls the test execution task so that the test execution task is executed by one of the processing units at regular intervals, and each test is executed. The tasks sequentially test the corresponding processing devices, and when the test execution task detects an error in the processing device, it issues a request to the operating system to stop execution, and the operating system immediately resumes its own execution. A test method for information processing equipment characterized by stopping.