JPS6162943A - Method for inspecting information processor - Google Patents

Method for inspecting information processor

Info

Publication number
JPS6162943A
JPS6162943A JP59184812A JP18481284A JPS6162943A JP S6162943 A JPS6162943 A JP S6162943A JP 59184812 A JP59184812 A JP 59184812A JP 18481284 A JP18481284 A JP 18481284A JP S6162943 A JPS6162943 A JP S6162943A
Authority
JP
Japan
Prior art keywords
execution
patrol
tasks
operating system
processing device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59184812A
Other languages
Japanese (ja)
Inventor
Yoko Tamura
田村　洋子
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP59184812A priority Critical patent/JPS6162943A/en
Publication of JPS6162943A publication Critical patent/JPS6162943A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0721—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
    • G06F11/0724—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU] in a multiprocessor or a multi-core unit
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE:To prevent the phenomenon of data error by actuating a patrol execusion task of the number of processors at every constant interval of time and stopping the execution task at error detection. CONSTITUTION:Patrol execution tasks 32, 33 for testing processors 41, 42 connected with an main storage device 30 and an operating system 31 controlling said tasks 32, 33 are stocked in a device 30. A system 31 actuates the tasks 32, 33 transfer a test object instruction and the like to a message area to execute and repeats the same processing after constant time when the execution result is coincident with the expected value. When it is dissident with the expectation, an error message is prepared and outputted o an output device to stop the execution of the system 31.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は情報処理装置の検査方式に関し、特にオペレー
ティングシステム制御のもとで検査するヘルスチェック
方式に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for testing an information processing device, and particularly to a health check method for testing under the control of an operating system.

〔従来技術〕[Prior art]

従来、この種の情報処理装置の故障は、該装置内のチェ
ック回路による検出と、チェック回路によってチェック
不可能な故障が発生するとオペレーティングシステムな
どのソフトウェアの論理矛盾という形での検出に委ねら
れていた。このため、後者のソフトウェアの論理矛盾と
いう形の検出に期待している故障は、ソフトウェアがハ
ードウェアの故障を検出する目的で作成されていないた
めに、ソフトウェアでも検出されない場合があった。Conventionally, failures in this type of information processing equipment have been detected by check circuits within the equipment, and when failures that cannot be checked by the check circuits occur, they are detected in the form of logical contradictions in software such as the operating system. Ta. For this reason, the latter faults that are expected to be detected in the form of logical contradictions in software may not be detected even in software because software is not created for the purpose of detecting hardware faults.

この場合はデータ化けとなり、故障の検出が故障発生後
長時間経過して行なわれていたので、データ復旧が困難
になるという致命的な問題があった。In this case, the data would be garbled, and since the failure was detected a long time after the failure occurred, there was a fatal problem in that data recovery would be difficult.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、ソフトウェアでも検出されないような
故障があった場合にデータ化けとなる現象を防止する、
情報処理装置の検査方式を提供することにある。The purpose of the present invention is to prevent the phenomenon of data corruption in the event of a failure that cannot be detected even by software.
An object of the present invention is to provide an inspection method for an information processing device.

〔発明の構成〕[Structure of the invention]

本発明の情報処理装置の検査方式は、主記憶装置に接続
された処理装置を試験するため該処理装置数だけのパト
ロール実行タスクと該パトロール実行タスクを制御する
オペレーティングシステムとを咳主記憶装置に格納し、
オペレーティングシステムは一定時間毎；二前記パトロ
ール実行タスクの全部を起動し、起動された前記パトロ
ール実行タスクはそれぞれ前記処理装置の検査を実行し
、前記パトロール実行タスクが前記処理装置のエラーな
検出した時にオペレーティングシステムへ実行停止要求
を行ない、これによりオペレーティングシステムは直ち
にオペレーティングシステム自身の実行を停止すること
を特徴とする。In the information processing device testing method of the present invention, in order to test the processing devices connected to the main storage device, as many patrol execution tasks as the number of processing devices and an operating system that controls the patrol execution tasks are installed in the main storage device. store,
The operating system activates all of the patrol execution tasks at regular intervals; each of the activated patrol execution tasks executes an inspection of the processing device; and when the patrol execution task detects an error in the processing device; The method is characterized in that an execution stop request is made to the operating system, and the operating system immediately stops its own execution.

〔実施例〕〔Example〕

本発明の実施例な図面を参照しながら説明する。 DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described with reference to the drawings.

第１図は本発明の情報処理装置の検査方式を適用した情
報処理装置のブロック図である。主記憶装置６０上には
、オペレーティングシステム（以下、Ｏ８という）６１
と、主記憶装置６０に接続された処理装置（以下、ＣＰ
Ｕという）　４１　、４２を試験するためのパトロール
実行タスク３２．３３が格納されている。FIG. 1 is a block diagram of an information processing apparatus to which the information processing apparatus inspection method of the present invention is applied. On the main storage device 60, an operating system (hereinafter referred to as O8) 61
and a processing device (hereinafter referred to as CP) connected to the main storage device 60.
Patrol execution tasks 32 and 33 for testing 41 and 42 (referred to as U) are stored.

次ｒ−，、本実施例の情報処理装置におけるパトロール
実行の動作を説明する。Next, the operation of patrol execution in the information processing apparatus of this embodiment will be described.

パトロール実行タスク６２．６６の論理は同一であるの
で、以後パトロール実行タスク６２について説明する。Since the patrol execution tasks 62 and 66 have the same logic, the patrol execution task 62 will be described below.

第２図はＣＰＵ４１用検査プログラムであるパトロール
実行タスク６２の動作を示すフローチャートである。処
理１１によりＣＰＵ４１用検査プログラムであるパトロ
ール実行タスク６２を起動する。次に、処理１２に制御
が移りメツセージエリアに試験対象のＣＰＵ番号と試験
対象命令の情報を移送する。処理１６では試験対象であ
る命令を実行する。処理１４では前記実行結果と期待値
を比較する。判断１５により結果が一致していれば判断
２０へ移る。判断２ｏでは最後の試験でなければ次の試
験を処理１２から実行を繰返す。最後の試験であれば判
断２ｏからパトロール実行タスク３２の制御は処理２１
に移り、１時間のタイマをセットする。１時間経過後、
判断２２から制御は処理１１へ戻り、再度検査が実行さ
れること（：なる。判断１５において結果が一致しなか
った場合セはプログラムの制御は処、理１６へと移り、
処理１６での実行結果と処理１４で用いた期待値をメツ
セージ出カニリアへ移送する。FIG. 2 is a flowchart showing the operation of the patrol execution task 62, which is the inspection program for the CPU 41. Through process 11, a patrol execution task 62, which is an inspection program for the CPU 41, is activated. Next, control shifts to process 12, and information about the CPU number to be tested and the instruction to be tested is transferred to the message area. In process 16, the instruction to be tested is executed. In step 14, the execution result is compared with the expected value. If the results match in judgment 15, the process moves to judgment 20. In judgment 2o, if it is not the last test, the execution of the next test is repeated from step 12. If it is the last test, control of the patrol execution task 32 is performed from judgment 2o to process 21.
Go to and set a timer for 1 hour. After 1 hour,
From judgment 22, control returns to process 11, and the test is executed again.If the results do not match in judgment 15, control of the program moves to process 16.
The execution result in process 16 and the expected value used in process 14 are transferred to the message sender.

その後、処理１７にてエラーメツセージを編集し、不図
示のメツセージ出力装置へ出力する。その後、制御が処
理１８へ移りｏｓ３１へ停止要求を出し０８３１は直ち
に不図示のシステム停止処理を行う。Thereafter, in process 17, the error message is edited and output to a message output device (not shown). Thereafter, the control moves to process 18 and a stop request is issued to the OS 31, and step 0831 immediately performs a system stop process (not shown).

これにより、０ＰＵ４１，４２の誤動作によるデータ化
けの発生が防止され、かつ障害発生時の情報を引き継い
で０８６１を運転できる。This prevents the occurrence of data corruption due to malfunction of the 0PUs 41 and 42, and allows the 0861 to be operated while taking over the information at the time of failure.

以上の説明はＣＰＵ４１用検査プログラムである実行タ
スク５２についてであったが、同時にＣＰＵ４２用検査
プログラムであるパトロール実行タスク６３も前述の処
理を行なう。The above explanation has been about the execution task 52, which is the inspection program for the CPU 41, but at the same time, the patrol execution task 63, which is the inspection program for the CPU 42, also performs the above-mentioned processing.

ト四軒検査対象の処理装置は１台以上ならば何台の処理
装置を有する情報処理装置へも本発明は適用可能である
ことは容易に類推できる。It can be easily inferred that the present invention is applicable to information processing apparatuses having any number of processing apparatuses as long as the number of processing apparatuses to be inspected is one or more.

〔発明の効果〕〔Effect of the invention〕

本発明は、以上説明したように、処理装置の正常性を検
査するプログラムを処理装置の数だけ一定時間４０に実
行するようにしたので、何れの処理装置の誤動作により
データ化けが発生することを防止するという効果がある
。As explained above, in the present invention, the program for checking the normality of the processing devices is executed at a fixed time period 40 equal to the number of processing devices, so that it is possible to prevent data corruption from occurring due to malfunction of any of the processing devices. It has the effect of preventing

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本発明の情報処理装置の検査方式を適用した情
報処理装置の一実施例を示すシステム構成図、第２図は
第１図の情報処理装置におけるパトロール実行タスク３
２．３３の動作を示す概略流れ図である。 ３０・・・主記憶装置、 ３１・・・オペレーティングシステム、３２、＋５・・
・パトロール実行タスク、４１．４２・・・処理装置。 特許出願人　　日本電気株式会社　　−２代理人　弁理
士内反　晋１″″”１ 第１図 第２図FIG. 1 is a system configuration diagram showing an embodiment of an information processing device to which the information processing device inspection method of the present invention is applied, and FIG. 2 is a patrol execution task 3 in the information processing device of FIG.
2.33 is a schematic flowchart showing the operation of FIG. 30... Main storage device, 31... Operating system, 32, +5...
-Patrol execution task, 41.42...processing device. Patent Applicant: NEC Corporation -2 Agent: Patent Attorney Susumu Naika 1"""1 Figure 1 Figure 2

Claims (1)

【特許請求の範囲】[Claims] 主記憶装置に接続された処理装置を試験するため該処理
装置数だけのパトロール実行タスクと該パトロール実行
タスクを制御するオペレーティングシステムとを該主記
憶装置に格納し、オペレーティングシステムは一定時間
毎に前記パトロール実行タスクの全部を起動し、起動さ
れた前記パトロール実行タスクはそれぞれ前記処理装置
の検査を実行し、前記パトロール実行タスクが前記処理
装置のエラーを検出した時にオペレーティングシステム
へ実行停止要求を行ない、これによりオペレーティング
システムは直ちにオペレーティングシステム自身の実行
を停止することを特徴とする情報処理装置の検査方式。In order to test the processing units connected to the main storage, as many patrol execution tasks as the number of processing units and an operating system that controls the patrol execution tasks are stored in the main storage. activating all of the patrol execution tasks, each activated patrol execution task executes an inspection of the processing device, and when the patrol execution task detects an error in the processing device, requests the operating system to stop execution; An information processing device inspection method characterized in that the operating system immediately stops executing itself.
JP59184812A 1984-09-04 1984-09-04 Method for inspecting information processor Pending JPS6162943A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59184812A JPS6162943A (en) 1984-09-04 1984-09-04 Method for inspecting information processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59184812A JPS6162943A (en) 1984-09-04 1984-09-04 Method for inspecting information processor

Publications (1)

Publication Number Publication Date
JPS6162943A true JPS6162943A (en) 1986-03-31

Family

ID=16159716

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59184812A Pending JPS6162943A (en) 1984-09-04 1984-09-04 Method for inspecting information processor

Country Status (1)

Country Link
JP (1) JPS6162943A (en)

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