JPS61137333A - トランジスタ - Google Patents

トランジスタ

Info

Publication number
JPS61137333A
JPS61137333A JP59259538A JP25953884A JPS61137333A JP S61137333 A JPS61137333 A JP S61137333A JP 59259538 A JP59259538 A JP 59259538A JP 25953884 A JP25953884 A JP 25953884A JP S61137333 A JPS61137333 A JP S61137333A
Authority
JP
Japan
Prior art keywords
transistor
overcurrent
circuit
wire
external lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59259538A
Other languages
English (en)
Inventor
Kenichi Tateno
立野 健一
Masami Yokozawa
横沢 真覩
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP59259538A priority Critical patent/JPS61137333A/ja
Publication of JPS61137333A publication Critical patent/JPS61137333A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601Structure
    • H01L2224/0603Bonding areas having different sizes, e.g. different heights or widths
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124Aluminium (Al) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/4901Structure
    • H01L2224/4903Connectors having different sizes, e.g. different diameters
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/4905Shape
    • H01L2224/49051Connectors having different shapes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、電子機器の誤動作等により過大電流の流れる
状態が成立したとき、エミッタ用の金属細線に溶断現象
が発生し、電路の開放を実行するヒユーズの等何物とし
て働くことができるトランジスタに関する。
従来の技術 各種電子機器では1、故障あるいは誤動作により生じる
過電流から電子機器を保護するため、過電流時に電路を
開放する配慮が払われている。たとえば、過電流検知回
路を内蔵させ、この検知結果に基いてリレー等の電路開
放手段を作動させて電路を開放するなどの対策が講じら
れている。
発明が解決しようとする問題点 上記のような保護対策が講じられた電子機器では、過電
流時に電子機器を保護する所期の目的は達成されるもの
の、過電流検知回路ならびに電路開放手段により電子機
器内の空間が占拠されるばかりでなく、これらの付加に
より製作コストが高騰することを避けることはできなか
った。これらの問題は、電子機器の小形化および低廉化
をはかろうとするとき、大きな障障となって表面化する
点 問題を解決するための手段 本発明のトランジスタは、トランジスタ素子のエミッタ
電極と外部リードとの間を接続する金属細線の抵抗値を
、ベース電極と外部リードとの間を接続する金属細線の
抵抗値よりも大きく設定し、過電流時に流れる電流に基
く発熱でこれを溶断可能としたものである。
作用 この構造のトランジスタを電子機器の電源供給部に近い
回路部分の構成要兼として用いるならば。
過電流時にトランジスタそのものが断線により動作を停
止するところとなり、電子機器そのものの動作も停止し
てこのトランジスタ以外の構成要素が破壊から保護され
る。
実施例 以下に図面を参照して本発明について詳しく説明する。
第1図は、本発明の一実施例にかかる電力用トランジス
タの成形樹脂による封止前の状態を示す平面図である。
図示するようにコレクタ外部り一ド1の一方の端部に形
成され、放熱板を兼ねる基板支持部2に電力用トランジ
スタ素子3が接着され、さらに、電力用トランジスタ素
子のベース電極4とベース外部り〜ド5との間が第1の
金属細線(AIり8で接続され、また、エミッタ電極7
とエミッタ外部リード8との間が第1の金属細線よりも
線径が小さい第2の金属細線(ムIり9で接続されると
ともに、電力用トランジスタ素子3の表面全域が表面保
護用の樹脂10で覆われた構成となっている。
すなわち、全体の組立構造そのものに関しては通常の電
力用トランジスタのそれと何等変りがなく、金属細線の
線径がベース側とエミッタ側とで相違している。
第2図は、以上のような構造の本発明の電力用トランジ
スタにおいて、ベース側の接続に関与する第1の金属細
線<U>の線径を2順、線の長さを711111に固定
し、一方、エミッタ側の接続に関与する′@2の金属細
線(ムlりの線径と線の長さを変化させて溶断電流の変
化を検討した実験の結果を示す図である。
この図から明らかなように、線の長さが長くなるに従っ
て溶断電流は小さくなる傾向を示し、また、線径が小さ
くなるに従って溶断電流はやはり小さくなる傾向を示す
。このことは、当然のことではあるが、線の長さの増大
あるいは線径の減少により金属細線の抵抗値が増加した
ことを意味する。
したがって、電子機器の保護が必要となる過電流値を考
慮し、この過電流が流れたとき、エミッタ側の金属細線
が溶断しうるトランジスタを回路要素の1つとして電子
機器内へ組み込んでおくならば、過電流に対する保護機
能を付与することが可能になる。
なお、以上の説明では、金属細線としてアルミニウム(
ムl)線を例示したが、金(ムU)線あるいは銀(人g
)線などの他の金属細線であってもよい。
発明の効果 本発明のトランジスタは、電子回路内の一要素として機
能するとともに、過電流時には既知のヒユーズの等傷物
として機能し、電路を開放して他の回路素子を過電流か
ら保護する効果が奏される。
したがって、本発明のトランジスタを各種電子機器の一
回路要素として用いるならば、過電流保護のための過電
流検知回路ならびに電路開放手段を付与することが不要
となり、電子機器の小型化ならびに低廉化をはかる効果
が奏される。
なお、本発明のトランジスタは、過電流保護動作の実行
により破壊に至るが、近年、トランジスタの価格は著る
しく安価になっているため、トランジスタの交換による
価格の上昇は然して問題とはならない。
【図面の簡単な説明】
第1図は、本発明のトランジスタの構造を示す平面図、
第2図は細線の線径および長さの変化と溶断電流の関係
を示す図である。 1・・・・・コレクタ外部リード、2・・・・・・基板
支持部、3・・・・・・電力用トランジスタ素子、4・
・・・・ベース電極、6−・・・・・ベース外部リード
、6.9・・・・・・金属細線、7・・・・・エミッタ
電極、8・・・・・・エミッタ外部リード。

Claims (1)

    【特許請求の範囲】
  1.  トランジスタ素子のエミッタ電極と外部リードとの間
    のを接続する金属細線の抵抗値を、ベース電極と外部リ
    ードとの間を接続する金属細線の抵抗値よりも大きく設
    定し、過電流時に前記エミッタ側の金属細線を溶断可能
    としたことを特徴とするトランジスタ。
JP59259538A 1984-12-07 1984-12-07 トランジスタ Pending JPS61137333A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59259538A JPS61137333A (ja) 1984-12-07 1984-12-07 トランジスタ

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59259538A JPS61137333A (ja) 1984-12-07 1984-12-07 トランジスタ

Publications (1)

Publication Number Publication Date
JPS61137333A true JPS61137333A (ja) 1986-06-25

Family

ID=17335498

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59259538A Pending JPS61137333A (ja) 1984-12-07 1984-12-07 トランジスタ

Country Status (1)

Country Link
JP (1) JPS61137333A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63160258A (ja) * 1986-12-24 1988-07-04 Toshiba Corp 半導体装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63160258A (ja) * 1986-12-24 1988-07-04 Toshiba Corp 半導体装置

Similar Documents

Publication Publication Date Title
US5781394A (en) Surge suppressing device
JPH08242046A (ja) 温度ヒューズ付き半導体装置の構造
US20240266306A1 (en) Semiconductor package with blast shielding
US5327318A (en) Telecommunication equipment protector
JPS61137333A (ja) トランジスタ
JP3621949B2 (ja) 電圧保護配列を組み込んだトランジスタ装置
JP4593518B2 (ja) ヒューズ付半導体装置
JP3019679B2 (ja) 半導体装置の内部配線構造
JP3848350B2 (ja) 半導体装置
JP2004241579A (ja) 半導体装置
KR0169287B1 (ko) 반도체장치
JPS5919361A (ja) 半導体装置
WO2020071203A1 (ja) 保護素子
JP2869896B2 (ja) 過電圧保護部品
US20240274568A1 (en) Package for use with integarted circuit
JP2001325929A (ja) 電池用プロテクタ−
JP3991581B2 (ja) Ssr
JP4219502B2 (ja) 抵抗体付きヒュ−ズ
JPH05259211A (ja) 半導体装置
JPS5911695A (ja) 混成集積回路装置
JPH0229653Y2 (ja)
JPH0327321Y2 (ja)
CN118486684A (zh) 与集成电路一起使用的封装
JP2000138107A (ja) 半導体サージ吸収素子
JPS6329564A (ja) 半導体装置およびリ−ドフレ−ム