JPS61121458A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS61121458A JPS61121458A JP59244013A JP24401384A JPS61121458A JP S61121458 A JPS61121458 A JP S61121458A JP 59244013 A JP59244013 A JP 59244013A JP 24401384 A JP24401384 A JP 24401384A JP S61121458 A JPS61121458 A JP S61121458A
- Authority
- JP
- Japan
- Prior art keywords
- ceramic
- bonding agent
- semiconductor device
- ceramic cap
- bonded
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体装置に関するもので、特に、セラミック
パッケージを用いた半導体装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly to a semiconductor device using a ceramic package.
従来の半導体装置用セラミックステムを封止する方法と
して次の方法が行なわれていた。第１の方法を第４図に
基づいて説明する。導体パターン１が形成されたセラミ
ック基板２に外部取り出しリード３がロウ付されたセラ
ミックステムの導体パターン上に半導体素子４を固着さ
せ、さらに外部取り出し用導体パターンに金Ｊ／ｆ４細
線５をワイヤボンドした組立中間体を作成する。−・方
、セラミックキャップ６にエポキシ樹脂からなる接着剤
７を取り付けた接着剤付セラミックキャップを作製する
。組立中間体に接着剤付セラミックキャップをのせ、加
熱して接着剤を溶融させ、さらに熱欧化させて封止を完
了する。The following method has been used as a conventional method for sealing a ceramic stem for a semiconductor device. The first method will be explained based on FIG. A semiconductor element 4 is fixed onto the conductor pattern of a ceramic stem on which an external lead 3 is soldered to a ceramic substrate 2 on which a conductor pattern 1 is formed, and a gold J/F4 fine wire 5 is wire-bonded to the external lead conductor pattern. Create an assembly intermediate. - On the other hand, a ceramic cap with an adhesive is produced by attaching an adhesive 7 made of epoxy resin to the ceramic cap 6. A ceramic cap with adhesive is placed on the assembly intermediate, heated to melt the adhesive, and then heated to complete the sealing.
′第２の方法を第５図に基づき説明する。第１の方法と
同様−９導体、パターン１が形成され１セラミツクによ
る壁部材８が設けられたセラミック基板２に外部取り出
しリード３がロウ付されたセラミックステムに半導体素
子４を固着し、ワイヤボンドした組立中間体に対し、低
融点ガラス９を取り付けたセラミックキャップ６を載置
する。加熱し、低融点ガラスを溶融して、さらに冷却し
て封止を完了する。'The second method will be explained based on FIG. Similar to the first method, a semiconductor element 4 is fixed to a ceramic stem on which an external lead 3 is brazed to a ceramic substrate 2 on which a -9 conductor and a pattern 1 are formed and a wall member 8 made of ceramic. A ceramic cap 6 to which a low melting point glass 9 is attached is placed on the assembled intermediate body. Heat to melt the low melting point glass and further cool to complete sealing.
従来の方法により、封止した半導体装置には欠のような
問題点がある。第１の方法では封止用接着剤として匣用
するエポキシ樹脂は耐熱性が乏しいため、２００℃以上
高温では熱分解し、次第に気密性が劣化する。又、耐湿
性試験などで熱水中に放置されると、エポキシ樹脂を水
分が透過したり、エポキシ樹脂中のクロルイオンが溶出
して半導体素子を劣化させる。又、第２の方法では封止
材料として使用する低融点ガラスの主成分である始ガラ
スが熱水ｉこ対して弱く高温高湿雰囲気下で鉛が析出し
、気密性が劣化するとともに半導体素子に付着して短絡
不良を引き起こす。Semiconductor devices encapsulated using conventional methods have problems such as defects. In the first method, the epoxy resin used as the sealing adhesive for the case has poor heat resistance, so it thermally decomposes at temperatures above 200° C., and the airtightness gradually deteriorates. Furthermore, if the semiconductor element is left in hot water during a moisture resistance test, moisture permeates through the epoxy resin and chlorine ions in the epoxy resin are eluted, degrading the semiconductor element. In addition, in the second method, the initial glass, which is the main component of the low-melting glass used as the sealing material, is weak against hot water and lead precipitates in a high-temperature, high-humidity atmosphere, deteriorating the airtightness and damaging the semiconductor element. adheres to the surface and causes a short circuit.
本発明の目的は以上に述べた従来技術の間鵬点を解決し
気密性、耐水、耐熱性の良好な封止を行ない、尚茗頼度
高品質の半導体装置を提供しようとすることにある。The purpose of the present invention is to solve the above-mentioned deficiencies in the prior art, perform sealing with good airtightness, water resistance, and heat resistance, and provide a highly reliable semiconductor device. .
本発明は耐熱性か良好でかつ、低不純・物で吸湿透湿性
が低いＡ脂であるポリイミド樹脂・と主成分とする接着
剤を作成し、このポリイミド樹脂を主成分とする接着剤
にてセラミック基板とセラミックキャップとで半導体素
子を封止した半導体装置を得るものである。The present invention creates an adhesive whose main component is polyimide resin, which is a type A resin that has good heat resistance, low impurities, and low moisture absorption and moisture permeability, and uses the adhesive mainly composed of this polyimide resin. A semiconductor device is obtained in which a semiconductor element is sealed with a ceramic substrate and a ceramic cap.
次に図面を参照して本発明をより詳細に説明する。 Next, the present invention will be explained in more detail with reference to the drawings.
第１図は本発明によるポリイミド樹脂を主成分とする接
着剤をセラミックキャップに取り付けたものの断面図で
ある。第２図はＷｌｌ（２）のセラミ・ツクキャップを
セラミックステムに接着し、封止を完了した半導体装置
の断面図である。FIG. 1 is a sectional view of a ceramic cap in which an adhesive containing polyimide resin as a main component according to the present invention is attached. FIG. 2 is a sectional view of a semiconductor device in which a ceramic cap of Wll(2) is adhered to a ceramic stem to complete sealing.
本発明による接着剤は、下式ｌこ代衣されるポリイ
ミ ドに一月旨
のプリポリマー（未開環イミドを有したもの）とＮＭＰ
、ＤＭＦなどの極注溶創とｆ６注調整用、微粉末シリ
カと筬着注助剤により博成されている。The adhesive according to the present invention can be applied to a polyurethane coated with the following formula:
In the middle, a prepolymer (with an unopened imide) and NMP
It is made with fine powder silica and a reed injection aid for ultra-injected welding and f6 injection adjustment such as DMF.
この接層剤１０をセラミックキャップ６に塗布し、ｍ六
〇を乾燥させたものが第１図のセラミックキャップであ
る。The ceramic cap shown in FIG. 1 is obtained by applying this adhesive 10 to the ceramic cap 6 and drying it.
導体パターン１を有するセラミック拳板２に外部取り出
しリード３をロウ付のたセラミックステムに半導体素子
４を固増し、外部取り出しリードとワイヤポンドした組
立中間体の上に第１図の接着剤付セラミックキャップを
載置し、加熱し、ポリイミド樹脂１０を溶融させ熱硬化
させたものが第２図である。加熱はセラミックキャップ
上に荷重お加えながら１５０〜３５０℃の温度で１０分
以上で行なう。ポリイミド樹脂の熱分解開始温度は４０
０℃であり、エポキシ４ｉｉ膚より数段優れている。A ceramic fist plate 2 having a conductor pattern 1 is soldered with an external lead 3, a semiconductor element 4 is solidly added to the ceramic stem, and the adhesive-coated ceramic shown in FIG. FIG. 2 shows a state in which the cap is placed and heated to melt and thermoset the polyimide resin 10. Heating is performed at a temperature of 150 to 350° C. for 10 minutes or more while applying a load on the ceramic cap. The starting temperature of thermal decomposition of polyimide resin is 40
0°C, which is several orders of magnitude better than epoxy 4ii skin.
このようＶこして、耐熱性・耐水性が良好な低不純物封
止材料で封止した硝ノ信封止型半導体装置を作成する事
ができた。In this manner, a glass sealed semiconductor device sealed with a low impurity sealing material having good heat resistance and water resistance could be produced.
渠３図は従来の封止材であるエポキシ接着剤と低融点ガ
ラスと本発明の実施例に用いた、ポリイミド樹脂自身を
それぞれ１２５℃ ２．３ａｔｍ の雰囲気下に放置
した場合の重量変化を表わしたものである。第３図１こ
みるようにエポキシ樹脂はｌ１ＩＬ湿が進み、膨潤して
１００時間で２″Ｍ索％か瑠刀口した。さらに放置する
と加水分解時に液状化する事が確認された。父、低融点
ガラスは重量が減少し、ガラス成分が溶出している◆が
確認された。本発明の実施例のポリイミド歳着剤はわず
かに重量か増加するものの、長時間経過しても、はとん
ど変化ない。耐熱水性が優れている事が実証さイｔた。Figure 3 shows the weight changes when the conventional sealing materials epoxy adhesive, low-melting glass, and the polyimide resin itself used in the embodiment of the present invention are left in an atmosphere of 125°C and 2.3 atm. It is something that Figure 3: The epoxy resin gradually became wetter and swelled to 2"M rope after 100 hours. It was confirmed that if it was left to stand further, it would liquefy during hydrolysis. Father, low It was confirmed that the weight of the melting point glass decreased and the glass component was eluted.Although the weight of the polyimide aging agent of the example of the present invention increased slightly, it remained strong even after a long period of time. There is no change.It has been proven that it has excellent hot water resistance.
本発明の実施例の半導体装置の耐湿性も従来品に比らべ
、数段向上している事も確認ざイｔでいる。It has also been confirmed that the moisture resistance of the semiconductor device according to the embodiment of the present invention is improved by several steps compared to conventional products.
以上のように、本発明は半導体装置のＩｆｔ湿注・と中
心とする倍精度・品質向上に大いに讐与するものである
。As described above, the present invention greatly contributes to the improvement of double precision and quality centered on Ift wet injection of semiconductor devices.
第１（２）は本発明の一実施例によるセラミックキャッ
プの断面図、第２因は本発明の一実施例による半導体装
置の断面図、第３図は本発明の効果を示すための重量変
化率と熱水処理時間との関係を示すグラフである。
第４図および第５図はそれぞれ従来の半導体装置の断面
図である。
１・・・・・・導体パターン、２・・・・・・セラミッ
ク基板、３・・・・・・外部取り出しリード、４・・・
・・・半導体素子、５・・・・・・金屑細線、６・・・
・・・セラミックキャップ、７・・・・・・接着剤、８
・・・・・・壁部材、９・・・・・・低融点ガラス、１
０・・−・・・接着剤。
＼、一つ
箒 １ 図
第３國The first factor (2) is a cross-sectional view of a ceramic cap according to an embodiment of the present invention, the second factor is a cross-sectional view of a semiconductor device according to an embodiment of the present invention, and FIG. 3 is a weight change showing the effect of the present invention. It is a graph showing the relationship between rate and hot water treatment time. FIGS. 4 and 5 are cross-sectional views of conventional semiconductor devices, respectively. 1... Conductor pattern, 2... Ceramic board, 3... External lead, 4...
... Semiconductor element, 5 ... Gold scrap thin wire, 6 ...
... Ceramic cap, 7 ... Adhesive, 8
...Wall member, 9...Low melting point glass, 1
0...--Adhesive. ＼、One Broom 1 Figure 3 Country
Claims (1)
ド樹脂を主成分とする接着剤としてセラミックキャップ
で封止した事を特徴とする半導体装置。A semiconductor device characterized in that a semiconductor element mounted on a ceramic is sealed with a ceramic cap using an adhesive mainly composed of polyimide resin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59244013A JPS61121458A (en) | 1984-11-19 | 1984-11-19 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59244013A JPS61121458A (en) | 1984-11-19 | 1984-11-19 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61121458A true JPS61121458A (en) | 1986-06-09 |
Family
ID=17112409
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59244013A Pending JPS61121458A (en) | 1984-11-19 | 1984-11-19 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61121458A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011114838A (en) * | 2009-11-30 | 2011-06-09 | Kyocera Kinseki Corp | Piezoelectric vibrator and piezoelectric oscillator |
-
1984
- 1984-11-19 JP JP59244013A patent/JPS61121458A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011114838A (en) * | 2009-11-30 | 2011-06-09 | Kyocera Kinseki Corp | Piezoelectric vibrator and piezoelectric oscillator |
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