JPH0212934A - Hybrid integrated circuit device - Google Patents

Hybrid integrated circuit device

Info

Publication number
JPH0212934A
JPH0212934A JP63164325A JP16432588A JPH0212934A JP H0212934 A JPH0212934 A JP H0212934A JP 63164325 A JP63164325 A JP 63164325A JP 16432588 A JP16432588 A JP 16432588A JP H0212934 A JPH0212934 A JP H0212934A
Authority
JP
Japan
Prior art keywords
thick film
substrate
integrated circuit
circuit device
hybrid integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63164325A
Other languages
Japanese (ja)
Inventor
Masahide Murakami
村上　正秀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP63164325A priority Critical patent/JPH0212934A/en
Publication of JPH0212934A publication Critical patent/JPH0212934A/en
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
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    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
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    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/4823—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a pin of the item
    • H—ELECTRICITY
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
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    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
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    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
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    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
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    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
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    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
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    • H01L2924/191—Disposition
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    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
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    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/328—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by welding
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
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    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007—Surface contacts, e.g. bumps

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To obtain a hybrid integrated circuit device in which components can be placed by using solder on a thick film substrate by placing beforehand an aluminum disc on the conductor land of the substrate to be connected to the terminal of a metal stem, and connecting the terminal of the stem to the disc with Au wirings. CONSTITUTION:An IC pellet 2 and an aluminum disk 3 are placed on a conductor land with an adhesive on a thick film substrate 1, the pellet 2 is wire bonded to a pad on the substrate 1 by Au wirings 4 and covered with resin 5. Then, a chip capacitor 6 is placed on a solder, the substrate 1 placed with components adheres to a metal step 7, the terminal 8 of the stem 7 and the disk 3 placed on the land of the substrate 1 are wire bonded by heating the substrate 1 by Au wirings 9 and thermally pressbonding to be connected. Thereafter, it is covered with a metal cap, and sealed by a laser, thereby obtaining a hybrid integrated circuit device.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、混成集積回路装置に関し、特にＩＣペレット
、チップコンデンサ等の部品を搭載した厚膜基板を金属
ステムに貼り付けてＡｕワイヤで金属ステムと厚膜基板
との接続を行って形成される混成集積回路装置に関する
。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a hybrid integrated circuit device, and in particular, the present invention relates to a hybrid integrated circuit device, and in particular, a thick film substrate on which components such as IC pellets and chip capacitors are mounted is attached to a metal stem, and the metal is bonded with Au wire. The present invention relates to a hybrid integrated circuit device formed by connecting a stem and a thick film substrate.

〔従来の技術〕[Conventional technology]

従来、ＩＣベレット、チップコンデンサ等の部品を搭載
した厚膜基板を金属ステムに貼り付け、Ａｕワイヤにて
金属ステムの端子と厚膜基板のＡｇ−Ｐｄ合金の導体ラ
ンドとの接続゛を行い厚膜基板にキャップをかぶせてキ
ャップと金属ステムをレーザーシール又はハンダシール
にて封止を行って混成集積回路装置を形成している。Conventionally, a thick film board on which components such as IC pellets and chip capacitors are mounted is pasted on a metal stem, and the terminals of the metal stem are connected to the Ag-Pd alloy conductor lands of the thick film board using Au wires. A hybrid integrated circuit device is formed by covering the film substrate with a cap and sealing the cap and metal stem with a laser seal or solder seal.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の混成集積回路装置の構造では、Ａｕワイ
ヤで金属ステムの端子と厚膜基板のＡｇ−Ｐｄ合金の導
体ランドとの接続を行う場合、ボンディング性を維持す
るのに厚膜基板を３００”Ｃ前後に加熱し、高温で熱圧
着によりワイヤボンディングを行う必要がある為、厚膜
基板と金属ステムとの接着強度が劣化するという欠点が
ある。In the structure of the conventional hybrid integrated circuit device described above, when connecting the terminal of the metal stem with the conductor land of the Ag-Pd alloy on the thick film substrate using Au wire, the thickness of the thick film substrate must be 300 mm to maintain bonding properties. Since it is necessary to heat the wire to around C and perform wire bonding by thermocompression bonding at a high temperature, there is a drawback that the adhesive strength between the thick film substrate and the metal stem deteriorates.

又、厚膜基板上にはんだを使用してチップコンデンサ等
の部品を搭載することは、はんだがとける為使用できな
いという欠点があった。Furthermore, mounting components such as chip capacitors on a thick film substrate using solder has the disadvantage that it cannot be used because the solder melts.

本発明の目的は、厚膜基板と金属ステムの接着強度が高
く、厚膜基板上にはんだを使用して部品を搭載できる混
成集積回路装置を提供することにある。An object of the present invention is to provide a hybrid integrated circuit device that has high adhesion strength between a thick film substrate and a metal stem and allows components to be mounted on the thick film substrate using solder.

〔課題を解決するための手段〕[Means to solve the problem]

本発明は、厚膜基板を金属ステムに貼り付けて、Ａｕワ
イヤで前記厚膜基板と前記金属ステムとの接続を行って
形成される混成集積回路装置において、前記金属ステム
の端子と接続を行う前記厚膜基板の導体ランド上に、あ
らかじめ、アルミディスクを搭載しておき前記金属ステ
ムの端子と前記アルミディスクをＡｕワイヤで接続して
形成されている。The present invention provides a hybrid integrated circuit device formed by attaching a thick film substrate to a metal stem and connecting the thick film substrate and the metal stem with Au wires, in which the connection is made to the terminal of the metal stem. An aluminum disk is mounted in advance on the conductor land of the thick film substrate, and the terminal of the metal stem and the aluminum disk are connected with an Au wire.

〔実施例〕〔Example〕

次に、本発明の実施例について図面を参照して説明する
。Next, embodiments of the present invention will be described with reference to the drawings.

第１図は本発明の一実施例の製造工程を説明する為の斜
視図である。FIG. 1 is a perspective view for explaining the manufacturing process of an embodiment of the present invention.

先ず、第１図のように厚膜基板１上にＩＣベレット２及
び０．５１１１ｍ角のアルミディスク３を導体ランド上
に接着剤にて搭載し、ＩＣベレット２はＡｕワイヤ４で
膜厚基板１上のパッドにワイヤボンディングを行い樹脂
５で覆う。First, as shown in FIG. 1, an IC pellet 2 and a 0.5111 m square aluminum disk 3 are mounted on a conductor land with adhesive on a thick film substrate 1, and the IC pellet 2 is attached to a thick film substrate 1 using an Au wire 4. Wire bonding is performed on the upper pad and covered with resin 5.

次に、チップコンデンサ６をはんだにて搭載する。Next, the chip capacitor 6 is mounted with solder.

次に、部品の搭載された厚膜基板１を金属ステム７に貼
り付け、金属ステム７の端子８と厚膜基板１の導体ラン
ド上に搭載された前記アルミディスク３とをＡｕワイヤ
９で厚膜基板１を１５０℃前後に加熱し、熱圧着により
ワイヤボンディングを行い接続する。Next, the thick film board 1 on which the components are mounted is attached to the metal stem 7, and the terminal 8 of the metal stem 7 and the aluminum disk 3 mounted on the conductor land of the thick film board 1 are connected with a thick Au wire 9. The membrane substrate 1 is heated to around 150° C., and wire bonding is performed by thermocompression bonding for connection.

その後、金属キャップを被せて、レーザーシールを行い
混成集積回路装置が得られる。Thereafter, a metal cap is placed on it and laser sealing is performed to obtain a hybrid integrated circuit device.

〔発明の詳細な 説明したように本発明は、厚膜基板の導体ランド上にア
ルミディスクを搭載して、金属ステムとの接続を行うこ
とにより、１５０℃前後の低温でワイヤボンディングす
ることが可能になり、厚膜基板と金属ステムとの接着強
度が劣化しないという効果がある。又、はんだがとけな
い低温でワイヤボンディングができる為、厚膜基板上に
はんだを使用して部品を搭載できるという効果がある。[As explained in detail, the present invention enables wire bonding at a low temperature of around 150°C by mounting an aluminum disk on the conductor land of a thick film substrate and connecting it to a metal stem. This has the effect that the adhesive strength between the thick film substrate and the metal stem does not deteriorate. Furthermore, since wire bonding can be performed at low temperatures where solder does not melt, it is possible to mount components on thick film substrates using solder.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本発明の一実施例の製造工程を説明するための
斜視図である。 １・・・厚膜基板、２・・・ＩＣベレット、３・・・ア
ルミディスク、４・・・Ａｕワイヤ、５・・・樹脂、６
・・・チップコンデンサ、７・・・金属ステム、８・・
・端子、９・・・Ａｕワイヤ。FIG. 1 is a perspective view for explaining the manufacturing process of an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Thick film board, 2... IC pellet, 3... Aluminum disk, 4... Au wire, 5... Resin, 6
...Chip capacitor, 7...Metal stem, 8...
・Terminal, 9...Au wire.

Claims (1)

【特許請求の範囲】[Claims] 　厚膜基板を金属ステムに貼り付けて、Ａｕワイヤで前
記厚膜基板と前記金属ステムとの接続を行って形成され
る混成集積回路装置において、前記金属ステムの端子と
接続を行う前記厚膜基板の導体ランド上に、あらかじめ
、アルミディスクを搭載しておき前記金属ステムの端子
と前記アルミディスクをＡｕワイヤで接続して形成する
ことを特徴とする混成集積回路装置。In a hybrid integrated circuit device formed by attaching a thick film substrate to a metal stem and connecting the thick film substrate and the metal stem with Au wires, the thick film substrate is connected to a terminal of the metal stem. 1. A hybrid integrated circuit device characterized in that an aluminum disk is mounted in advance on a conductor land of the metal stem, and the terminal of the metal stem and the aluminum disk are connected with an Au wire.
JP63164325A 1988-06-30 1988-06-30 Hybrid integrated circuit device Pending JPH0212934A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63164325A JPH0212934A (en) 1988-06-30 1988-06-30 Hybrid integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63164325A JPH0212934A (en) 1988-06-30 1988-06-30 Hybrid integrated circuit device

Publications (1)

Publication Number Publication Date
JPH0212934A true JPH0212934A (en) 1990-01-17

Family

ID=15791018

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63164325A Pending JPH0212934A (en) 1988-06-30 1988-06-30 Hybrid integrated circuit device

Country Status (1)

Country Link
JP (1) JPH0212934A (en)

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