JPS5624956A - Resin-sealed semiconductor device - Google Patents

Resin-sealed semiconductor device

Info

Publication number
JPS5624956A
JPS5624956A JP10144679A JP10144679A JPS5624956A JP S5624956 A JPS5624956 A JP S5624956A JP 10144679 A JP10144679 A JP 10144679A JP 10144679 A JP10144679 A JP 10144679A JP S5624956 A JPS5624956 A JP S5624956A
Authority
JP
Japan
Prior art keywords
resin
semiconductor device
high reliability
prevent
particle layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10144679A
Other languages
Japanese (ja)
Inventor
Kimiyoshi Kimura
Tsuneaki Isozaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP10144679A priority Critical patent/JPS5624956A/en
Publication of JPS5624956A publication Critical patent/JPS5624956A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
    • H01L23/3171—Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909—Post-treatment of the connector or wire bonding area
    • H01L2224/8592—Applying permanent coating, e.g. protective coating

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE:To seal the semiconductor device with resin in high reliability by interposing an insulating particle layer between a semiconductor element and a resin sealing agent to absorb strain owing to thermal expansion. CONSTITUTION:Wires 6 are connected onto bonding pads 4, and particular or fibrous insulating layer 8 is then formed on the surface of a semiconductor element in a thickness of approx. 50-500mu. It is then heat treated, is thus fixed, and is subsequently sealed on the entire surface including a metallic substrate 1 with resin 7. In this configuration insulating particle layer 8 absorbs thermal strain to prevent the deterioration of the characteristics of the element and to also prevent the isolation of the bonded wires, thereby obtaining the semiconductor device in high reliability.
JP10144679A 1979-08-08 1979-08-08 Resin-sealed semiconductor device Pending JPS5624956A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10144679A JPS5624956A (en) 1979-08-08 1979-08-08 Resin-sealed semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10144679A JPS5624956A (en) 1979-08-08 1979-08-08 Resin-sealed semiconductor device

Publications (1)

Publication Number Publication Date
JPS5624956A true JPS5624956A (en) 1981-03-10

Family

ID=14300909

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10144679A Pending JPS5624956A (en) 1979-08-08 1979-08-08 Resin-sealed semiconductor device

Country Status (1)

Country Link
JP (1) JPS5624956A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5045918A (en) * 1986-12-19 1991-09-03 North American Philips Corp. Semiconductor device with reduced packaging stress
US5171716A (en) * 1986-12-19 1992-12-15 North American Philips Corp. Method of manufacturing semiconductor device with reduced packaging stress
WO2017050702A1 (en) * 2015-09-23 2017-03-30 Siemens Aktiengesellschaft Method for electrically insulating an electrical conductor, in particular a component module, conductor module, and component module

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4979686A (en) * 1972-12-07 1974-08-01

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4979686A (en) * 1972-12-07 1974-08-01

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5045918A (en) * 1986-12-19 1991-09-03 North American Philips Corp. Semiconductor device with reduced packaging stress
US5171716A (en) * 1986-12-19 1992-12-15 North American Philips Corp. Method of manufacturing semiconductor device with reduced packaging stress
WO2017050702A1 (en) * 2015-09-23 2017-03-30 Siemens Aktiengesellschaft Method for electrically insulating an electrical conductor, in particular a component module, conductor module, and component module

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