JPS61116869A - Manufacture of image sensor - Google Patents
Manufacture of image sensorInfo
- Publication number
- JPS61116869A JPS61116869A JP59239667A JP23966784A JPS61116869A JP S61116869 A JPS61116869 A JP S61116869A JP 59239667 A JP59239667 A JP 59239667A JP 23966784 A JP23966784 A JP 23966784A JP S61116869 A JPS61116869 A JP S61116869A
- Authority
- JP
- Japan
- Prior art keywords
- film
- upper electrode
- electrode
- image sensor
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 16
- 239000000758 substrate Substances 0.000 claims abstract description 8
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 6
- 238000000034 method Methods 0.000 claims description 16
- 238000000059 patterning Methods 0.000 claims description 7
- 229910052782 aluminium Inorganic materials 0.000 claims description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 5
- 229910003437 indium oxide Inorganic materials 0.000 claims description 3
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 claims description 3
- 229910052751 metal Inorganic materials 0.000 claims description 3
- 239000002184 metal Substances 0.000 claims description 3
- 239000000463 material Substances 0.000 claims description 2
- 230000004888 barrier function Effects 0.000 claims 1
- 238000010030 laminating Methods 0.000 claims 1
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 claims 1
- 229910001887 tin oxide Inorganic materials 0.000 claims 1
- 229920002120 photoresistant polymer Polymers 0.000 abstract description 19
- 238000005530 etching Methods 0.000 abstract description 8
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 4
- 239000011521 glass Substances 0.000 abstract description 4
- 229910052681 coesite Inorganic materials 0.000 abstract description 2
- 229910052906 cristobalite Inorganic materials 0.000 abstract description 2
- 239000000377 silicon dioxide Substances 0.000 abstract description 2
- 235000012239 silicon dioxide Nutrition 0.000 abstract description 2
- 229910052682 stishovite Inorganic materials 0.000 abstract description 2
- 229910052905 tridymite Inorganic materials 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 7
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 230000007547 defect Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000009751 slip forming Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14665—Imagers using a photoconductor layer
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はイメージセンサの製造方法に係り、特に、ダイ
オード部の損傷を少なくし、且つ、ダイオードの有効面
積を大きくできる上部電極の接続方法に関するものであ
る。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing an image sensor, and in particular to a method for connecting an upper electrode that can reduce damage to a diode part and increase the effective area of the diode. It is something.
イメージセンサは基板上に形成された2000個以上の
フォトダイオードからなっており、その製造方法は下部
電極が設けられた基板上に、アモルファスシリコン(以
下a−3iと略す)層をプラズマCVD法で形成し、そ
の上に上部電極を設けている。上部電極は基板上の下部
電極と絶縁するために絶縁膜のコンタクトホールを介し
て接続配線されているが、コンタクトホールの製作工程
でフオドレジスト膜の欠陥のためにa−3i膜にピンホ
ールができたり、a−3i膜が損傷される等の問題があ
り、改善が要望されている。The image sensor consists of more than 2000 photodiodes formed on a substrate, and its manufacturing method is to deposit an amorphous silicon (hereinafter abbreviated as a-3i) layer on a substrate provided with a lower electrode using the plasma CVD method. and an upper electrode is provided thereon. The upper electrode is connected through a contact hole in the insulating film to insulate it from the lower electrode on the substrate, but pinholes were formed in the a-3i film due to defects in the photoresist film during the contact hole manufacturing process. There are problems such as damage to the a-3i film, and improvements are desired.
第3図は従来のイメージセンサのフォトダイオード部分
の製造工程を説明するための図である。FIG. 3 is a diagram for explaining the manufacturing process of a photodiode portion of a conventional image sensor.
第3図(alは下部電極および半導体膜の形成工程を示
し、ガラス基板1上に酸化インジウムの下部電極2が設
けられ、その上にa−3i膜3がプラズマCVD法で形
成され、さらにフォトレジストが塗布され、ダイオード
となる部分がパターニングされてフォトレジスト膜4が
残される。FIG. 3 (al indicates the formation process of the lower electrode and semiconductor film, in which a lower electrode 2 of indium oxide is provided on a glass substrate 1, an a-3i film 3 is formed on it by plasma CVD method, and a photo A resist is applied, and the portion that will become the diode is patterned, leaving the photoresist film 4.
第3図(tllは半導体膜のエツチング工程を示し、a
−3i膜3がプラズマエツチングされた後、フォトレジ
スト膜4が剥離されている。FIG. 3 (tll indicates the etching process of the semiconductor film, a
After the -3i film 3 is plasma etched, the photoresist film 4 is peeled off.
第3図(C1は絶縁層の形成工程を示し、SiO2の絶
縁層5が形成され、その上にフォトレジストが塗布され
、パターニングによりダイオード部にり コ
ンタクトホール7を有するフォトレジスト膜6♂
が設けられる。FIG. 3 (C1 shows the step of forming an insulating layer; an insulating layer 5 of SiO2 is formed, a photoresist is applied thereon, and a photoresist film 6♂ having a contact hole 7 is formed in the diode part by patterning. It will be done.
第3図(d)は絶縁層のエツチング工程を示し、コンタ
クトホール7部の絶縁層5がガスプラズマエツチングさ
れた後、フォトレジスト膜4が除去される。FIG. 3(d) shows the step of etching the insulating layer, in which the insulating layer 5 at the contact hole 7 is etched with gas plasma, and then the photoresist film 4 is removed.
第3図(Q)は上部電極および電極引出し線の形成工程
を示し、アルミニウムの上部電極8がコンタクトホール
7部のa−3i膜3上に蒸着され、同時にパターニング
されて電極引き出し線9が設けられる。FIG. 3(Q) shows the process of forming the upper electrode and the electrode lead line, in which an aluminum upper electrode 8 is deposited on the a-3i film 3 in the contact hole 7, and is patterned at the same time to form the electrode lead line 9. It will be done.
上記従来のイメージセンサの製造方法にあっては、a−
3i膜のパターニング工程でフォトレジストの欠陥によ
ってダイオード部分のa−3i膜がエツチングされて上
部電極と下部電極が短絡する。また、絶縁層のパターニ
ング工程でダイオード部分のa−3i膜表面がエツチン
グによってダメージを受け、上部電極と良好なコンタク
トが形成できない。さらに、上部電極の面積が絶縁層の
コンタクトホールの大きさで制限されるという問題があ
った。In the conventional image sensor manufacturing method described above, a-
During the patterning process of the 3i film, the a-3i film in the diode portion is etched due to defects in the photoresist, resulting in a short circuit between the upper and lower electrodes. Further, in the patterning process of the insulating layer, the surface of the a-3i film in the diode portion is damaged by etching, making it impossible to form a good contact with the upper electrode. Furthermore, there is a problem in that the area of the upper electrode is limited by the size of the contact hole in the insulating layer.
本発明は、上記問題点を解消したイメージセンサの製造
方法を提供するもので、その手段は、a−3i膜上に上
部電極を形成した後に、コンタクトホールを有する絶縁
層を形成し、該コンタクトホールを介して前記上部電極
と電極引き出し線を接続することを特徴とするイメージ
センサの製造方法によって解決される。The present invention provides a method for manufacturing an image sensor that solves the above-mentioned problems, and the method includes forming an upper electrode on the a-3i film, and then forming an insulating layer having a contact hole. The problem is solved by an image sensor manufacturing method characterized in that the upper electrode and the electrode lead wire are connected through a hole.
上記イメージセンサの製造方法においては、a−3i膜
上に引き続いて上部電極が形成された後パターニングさ
れるので、上部電極に保護されてa−sBIが損傷を受
けず、また、上部電極はa−5部M、と同じ大きさにで
きる
〔実施例〕
以下、図面を参照して本発明の実施例を詳細に説明する
。In the image sensor manufacturing method described above, since the upper electrode is successively formed on the a-3i film and then patterned, the a-sBI is protected by the upper electrode and is not damaged, and the upper electrode is -5 parts M can be made to the same size [Embodiment] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
第1図は本発明の一実施例であるイメージセンサのフォ
トダイオード部分の製造工程を説明するための図である
。FIG. 1 is a diagram for explaining the manufacturing process of a photodiode portion of an image sensor according to an embodiment of the present invention.
第1図(a)は下部電極、半導体膜および上部電極の形
成工程を示し、ガラス基板1上に酸化インジウムの下部
電極2が設けられて、その上にa−3i膜3がプラズマ
CVD法で形成され、続いて、アルミニウムの上部電極
8が蒸着され、さらに、フォトレジストが塗布されダイ
オードとなる部分がパターニングされてフォトレジスト
膜4が残される。FIG. 1(a) shows the formation process of a lower electrode, a semiconductor film, and an upper electrode, in which a lower electrode 2 of indium oxide is provided on a glass substrate 1, and an a-3i film 3 is formed on it by plasma CVD. Then, an upper electrode 8 of aluminum is deposited, and then photoresist is applied and the portion that will become the diode is patterned to leave the photoresist film 4.
第1図(b)は上部電極および半導体膜のエツチング工
程を示し、アルミニウムの上部電極8がケミカルエツチ
ングされ、続いて、a−3i膜3がプラズマエツチング
された後、フォトレジスト膜4が剥離されている。FIG. 1(b) shows the etching process of the upper electrode and semiconductor film, in which the aluminum upper electrode 8 is chemically etched, the a-3i film 3 is then plasma etched, and the photoresist film 4 is peeled off. ing.
第1図(C)は絶縁層の形成工程を示し、上部電極8上
にS i Ozの絶縁層5が形成され、その上にフォト
レジストが塗布され、パターニングによりダイオード部
にコンタクトホール7を有するフォトレジスト膜6が設
けられる。FIG. 1(C) shows the process of forming an insulating layer, in which an insulating layer 5 of SiOz is formed on the upper electrode 8, a photoresist is applied thereon, and a contact hole 7 is formed in the diode part by patterning. A photoresist film 6 is provided.
第1図(d)は絶縁層のエツチング工程を示し、コンタ
クトホール7部の絶縁層5がガスプラスマエンチングで
除去された後、フォトレジスト膜4が剥離される。FIG. 1(d) shows the step of etching the insulating layer, in which the insulating layer 5 in the contact hole 7 portion is removed by gas plasma etching, and then the photoresist film 4 is peeled off.
第1図(elは電極引出し線の形成工程を示し、アルミ
ニウムがコンタクトホール7部の上部電極8上に蒸着さ
れ、パターニングされて電極引き出し線9が設けられて
いる。FIG. 1 (el indicates the step of forming an electrode lead line; aluminum is deposited on the upper electrode 8 in the contact hole 7 portion, and is patterned to provide the electrode lead line 9.
なお、上部電極にフォトレジストを塗布してパターニン
グを行い、上部電極をケミカルエツチング後、再度フォ
トレジストを塗布して同じパターニングを行い、a−3
il13をプラズマエツチングするとフォトレジストの
欠陥によるa−3i膜3のピンホールは大幅に減少でき
る。In addition, after applying photoresist to the upper electrode and performing patterning, and after chemically etching the upper electrode, applying photoresist again and performing the same patterning, a-3
By plasma etching il13, pinholes in the a-3i film 3 due to defects in the photoresist can be significantly reduced.
第2図は本発明の他の実施例であるa−3i膜と上部電
極間にオーミックコンタクトを改善したフォトダイオー
ド部分を説明するための図で、製造工程はa−5i膜3
上にn″a−5i膜10が連続してプラズマCVDで形
成され、その上に金属7 の上部電極が設けら
れてることを除けば第1図の実施例と同様であるので詳
細は説明を省略する。FIG. 2 is a diagram for explaining a photodiode portion in which ohmic contact is improved between the a-3i film and the upper electrode, which is another embodiment of the present invention.
The embodiment is the same as the embodiment shown in FIG. 1, except that an n''a-5i film 10 is continuously formed on top by plasma CVD and an upper electrode of metal 7 is provided on top of it, so a detailed explanation will not be provided. Omitted.
この場合、n″a−3i膜10が設けられているために
、上部電極はオーミックコンタクトを形成できる材料に
限定されない。In this case, since the n''a-3i film 10 is provided, the upper electrode is not limited to a material that can form an ohmic contact.
以上説明したように本発明によれば、a−3i膜が上部
電極で保護された状態で上部電極およびa−3t膜のエ
ツチングがなされるのでa−3i膜が損傷を受けず、ま
た、上部電極を大きくできるといった効果がある。As explained above, according to the present invention, the upper electrode and the a-3t film are etched while the a-3i film is protected by the upper electrode, so the a-3i film is not damaged and the upper This has the effect of making the electrode larger.
第1図は本発明の一実施例であるイメージセンサのフォ
トダイオード部分の製造工程を説明するための図、
第2図は本発明の他の実施例であるa−3i膜と上部電
極間にオーミックコンタクトを改善したフォトダイオー
ド部分を説明するための図、第3図は従来のイメージセ
ンサのフォトダイオード部分の製造工程を説明するため
の図である。
図において、
lはガラス基板、 2は下部電極、3はa−3i
膜、
4.6はフォトレジスト膜、
5は絶縁層、 7はコンタクトホール、8は
上部電極、 9は電極引き出し線、10はn’
a−St膜、
をそれぞれ示す。
第1F!lJ
<a)td>
1)2図
第3
Cb)
cd>
(e)Fig. 1 is a diagram for explaining the manufacturing process of the photodiode part of an image sensor which is an embodiment of the present invention, and Fig. 2 is a diagram showing the gap between the a-3i film and the upper electrode which is another embodiment of the invention. FIG. 3 is a diagram for explaining a photodiode portion with improved ohmic contact, and FIG. 3 is a diagram for explaining the manufacturing process of a photodiode portion of a conventional image sensor. In the figure, l is the glass substrate, 2 is the lower electrode, and 3 is a-3i.
4.6 is a photoresist film, 5 is an insulating layer, 7 is a contact hole, 8 is an upper electrode, 9 is an electrode lead line, 10 is n'
a-St film, respectively. 1st F! lJ <a) td> 1) Figure 2 3 Cb) cd> (e)
Claims (4)
面上にアモルファスシリコン膜と上部電極を順次積層し
た後、複数のフォトダイオードをパターニングする工程
と、該上部電極上にコンタクトホールを有する絶縁層を
形成する工程および該コンタクトホールを介して前記上
部電極と電極引き出し線を接続する工程より成ることを
特徴とするイメージセンサの製造方法。(1) A step of forming a lower electrode on the substrate, a step of sequentially laminating an amorphous silicon film and an upper electrode on the surface of the lower electrode, and then patterning a plurality of photodiodes, and forming a contact hole on the upper electrode. 1. A method for manufacturing an image sensor, comprising the steps of: forming an insulating layer having an insulating layer; and connecting the upper electrode and an electrode lead line through the contact hole.
ック接触を形成するアルミニウム等の金属からなること
を特徴とする特許請求の範囲第(1)項記載のイメージ
センサの製造方法。(2) The method for manufacturing an image sensor according to claim (1), wherein the upper electrode is made of a metal such as aluminum forming an ohmic contact in the image sensor.
トキバリアを形成する酸化インジウム、酸化錫、等の透
光性材料からなることを特徴とする特許請求の範囲第(
1)項記載のイメージセンサの製造方法。(3) In the image sensor, the upper electrode is made of a light-transmitting material such as indium oxide or tin oxide that forms a Schottky barrier.
1) The method for manufacturing the image sensor described in section 1).
ック接触を形成する高不純物濃度アモルファスシリコン
膜と金属の積層構造からなることを特徴とする特許請求
の範囲第(1)項記載のイメージセンサの製造方法。(4) The method for manufacturing an image sensor according to claim (1), wherein the upper electrode has a laminated structure of a highly impurity-concentrated amorphous silicon film and metal forming ohmic contact. .
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59239667A JPS61116869A (en) | 1984-11-13 | 1984-11-13 | Manufacture of image sensor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59239667A JPS61116869A (en) | 1984-11-13 | 1984-11-13 | Manufacture of image sensor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61116869A true JPS61116869A (en) | 1986-06-04 |
Family
ID=17048111
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59239667A Pending JPS61116869A (en) | 1984-11-13 | 1984-11-13 | Manufacture of image sensor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61116869A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5846798A (en) * | 1993-09-01 | 1998-12-08 | Henkel Kommanditgesellschaft Auf Aktien | Multi-enzyme granules |
-
1984
- 1984-11-13 JP JP59239667A patent/JPS61116869A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5846798A (en) * | 1993-09-01 | 1998-12-08 | Henkel Kommanditgesellschaft Auf Aktien | Multi-enzyme granules |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS61116869A (en) | Manufacture of image sensor | |
JPH0485829A (en) | Semiconductor device and manufacture thereof | |
JPS62155537A (en) | Manufacture of semiconductor device | |
JPS62118539A (en) | Formation of multilayer interconnection | |
JP2937675B2 (en) | Method for manufacturing semiconductor device | |
JPH0587973B2 (en) | ||
JPS59194432A (en) | Manufacture of semiconductor device | |
JPH07135201A (en) | Pattern forming method for multilayer film | |
JPS63119569A (en) | Color image sensor | |
JPS60192348A (en) | Method for forming multilayer wiring of semiconductor integrated circuit | |
JPH04122051A (en) | Manufacture of semiconductor device | |
JPS592351A (en) | Manufacture of semiconductor device | |
JPS6151968A (en) | Manufacture of semiconductor device | |
JPS6151967A (en) | Manufacture of semiconductor device | |
JPS61229377A (en) | Manufacture of josephson integrated circuit | |
JPH06236863A (en) | Manufacture of semiconductor device | |
JPH06349790A (en) | Pattern-forming method for laminated film | |
JPS61100981A (en) | Manufacture of semiconductor device | |
JPH06244439A (en) | Amorphous semiconductor diode and manufacture thereof | |
JPH03248533A (en) | Semiconductor integrated circuit device | |
JPS59215748A (en) | Manufacture of semiconductor device | |
JPH0291968A (en) | Manufacture of memory device | |
JPS6242435A (en) | Formation of electrode | |
JPS6115377A (en) | Amorphous silicon diode and manufacture thereof | |
JPS6132555A (en) | Formation of multilayer interconnection structure |