JPS61116846A - Method for die bonding - Google Patents

Method for die bonding

Info

Publication number
JPS61116846A
JPS61116846A JP23927084A JP23927084A JPS61116846A JP S61116846 A JPS61116846 A JP S61116846A JP 23927084 A JP23927084 A JP 23927084A JP 23927084 A JP23927084 A JP 23927084A JP S61116846 A JPS61116846 A JP S61116846A
Authority
JP
Japan
Prior art keywords
adhesive sheet
adhesive
sheet
semiconductor chip
pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23927084A
Other languages
Japanese (ja)
Inventor
Makoto Shimanuki
嶋貫　誠
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP23927084A priority Critical patent/JPS61116846A/en
Publication of JPS61116846A publication Critical patent/JPS61116846A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68318—Auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support
    • H01L2221/68322—Auxiliary support including means facilitating the selective separation of some of a plurality of devices from the auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68354—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to support diced chips prior to mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor

Abstract

PURPOSE:To contrive reduction of the time for die bonding by placing a semiconductor chip which is stuck to a flexible adhesive sheet in the above of a die pad to which an adhesive having a further strong viscosity is applied and pressing the adhesive sheet. CONSTITUTION:A wafer is stuck to a flexible circular adhesive sheet 3a and is divided into chips 4 which are fixed to a jig 5. An adhesive 7 having a stronger viscosity than said adhesive sheet 3a is applied to a pad 8 attached to a frame 9 and the chips 4 face the adhesive 7. A bar 12 moving vertically presses the sheet 3a oppositely to the flexible force of the sheet so as to bring the chip 4 in contact with the pad 8 tightly. After that, when the bar 12 rises, the chip 4 is left on the pad 8 with being stuck and the sheet 3a returns to the original state before the pressing. Then the frame 9 is moved horizontally and die bonding is effected similarly. As detachment of a chip from the sheet 3a and bond to the pad 8 are carried out at the same time, a processing time is reduced and as the bar 12 does not need an adsorbing means, the device itself is simplified.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 このｂｔｉは半導体チップをダイパットに付着するダイ
ボンド方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] This bti relates to a die bonding method for attaching a semiconductor chip to a die pad.

〔従来の技術〕[Conventional technology]

従来のダイボンド方法を第５図ないし第１０図を用いて
説明する。まず、第５図に示すよう擾ζ単体のトランジ
スタ等の半導体素子がマトリクス状に複数形成された半
導体ウェハ（１）にスクライブと呼ばれる方法にて切断
溝（２）を形成し、次に第６図に示す様に第５図のもの
を素子形成面を上にして円形の粘着シート（３）に付着
し、更に切断溝（２）　ｊこ沿って切断して複数の半導
体チップ（４）に分割し粘着シート（３）を固定治具（
５）に固定する。そしてこの第６図のものを第８図に示
すようζζ固定治具移動装置（６）上にのせ、更に緬７
図に示すような半田等の接着剤（７）が付着されたダイ
パット（８ンが複数装着されたフレーム（９）を第６図
のものと平行に並べてフレーム移動装置αｑに設置する
。その後、固定治具移動装置（５）及びフレーム移動装
置ＱＱを水平移動させて所定の位置に定め、更に半導体
チップ吸看装誼（ロ）を移動させてグイボンドする１個
の半導体テップ（４）上に定め第９図に示すように垂直
方向に移動させて半導体チップ＜４）を吸着した後、第
１０図に示￥町うに再び垂直方同醗こ移動して半導体チ
゛ンブ（４）を粘着シート（３７から剥離し、その後、
半導体チップ（４）を吸着したままに半導体チップ吸着
装置（６）を水平移動させてダイボンドするダイノ（ッ
ト（８）上に定め、更に垂直方向に移動させて半纏体チ
ップ（４）をｆｍＸｔ剤（７）か付着したダイパット（
８）に付着した後吸看を止め再び垂直方向更には水平方
向に移動しで、次にダイボンドする１個の半導体チップ
（４）上に定める。この様な動作を繰り返して行うこと
により粘着シート（３）上にある複数の半導体チップ（
４）に連続釣書こダイパット（８月ζダイボンドされ、
このダイボンドされたものは以後、ワイヤボンディング
工程、封止工程を経て、製品となるものである。A conventional die bonding method will be explained using FIGS. 5 to 10. First, as shown in FIG. 5, cutting grooves (2) are formed in a semiconductor wafer (1) on which a plurality of semiconductor elements such as single transistors are formed in a matrix by a method called scribing. As shown in the figure, the one shown in Figure 5 is attached to a circular adhesive sheet (3) with the element forming side facing up, and then cut along the cutting grooves (2) to form a plurality of semiconductor chips (4). Divide the adhesive sheet (3) into the fixing jig (
5). Then, place the thing in Fig. 6 on the ζζ fixing jig moving device (6) as shown in Fig. 8, and then
A frame (9) with a plurality of die pads (8 pins) attached with an adhesive (7) such as solder as shown in the figure is arranged in parallel with the one in Figure 6 and installed on the frame moving device αq.After that, The fixing jig moving device (5) and the frame moving device QQ are moved horizontally to set them in predetermined positions, and the semiconductor chip absorbing device (b) is further moved to place it on one semiconductor chip (4) to be bonded. After the semiconductor chip (4) is moved vertically as shown in FIG. 9 to adsorb the semiconductor chip (4), it is moved vertically again as shown in FIG. Peel off from 37, and then
While adsorbing the semiconductor chip (4), move the semiconductor chip adsorption device (6) horizontally to set it on the die-bonding die (8), and then move it vertically to place the semi-integrated chip (4) on fmXt. The die pad (
8), the suction is stopped and the mixture is again moved vertically and then horizontally to place it on one semiconductor chip (4) to be die-bonded next. By repeating these operations, multiple semiconductor chips (
4) Continuous fishing book die pad (August ζ die bonded,
This die-bonded product then undergoes a wire bonding process and a sealing process to become a product.

：　　　〔発明が解決しようとする問題点〕ハ 上記の様な従来のグイボンド方法では、粘着シート（３
）から半導体チップ（４）を剥離し、これをダイパット
（３）上−こ移動して付着するという方法をとりている
ため、粘為シート（３）から半導体チップ（４）をか複
雑であるという問題点を１するものでのった。: [Problems to be solved by the invention] C. In the conventional Guibond method as described above, the adhesive sheet (3
), the semiconductor chip (4) is peeled off from the adhesive sheet (3), and the semiconductor chip (4) is moved and attached onto the die pad (3), so it is complicated to separate the semiconductor chip (4) from the adhesive sheet (3). This article addresses the following problems.

この発明は、かかる間組点を解決するため（こなされた
もので、上記粘着シート（３）から半導体チ′ノブ（４
）を剥離し、ダイパット（８）に付着するまでの時間を
少なくシ、もってグイボンド工程に要する全体の時間を
短縮することを目的とする。The present invention has been made in order to solve the problem of assembly point between the above-mentioned adhesive sheet (3) and semiconductor chi'knob (4).
) is to be peeled off and attached to the die pad (8), thereby shortening the overall time required for the bonding process.

〔問題点を解決するための手段〕[Means for solving problems]

この発明に係るダイボンド方法は、弾力性を有する粘着
シートに付着した複数の半導体チップを上記粘着シート
より強い粘着力をもつ接着剤が付着されたダイパット上
方に設置し、この粘着シートをその弾性力と抗して加圧
棒により押圧することによって半導体チップをグイ１＜
ットに付着するようにしたものでめる。In the die bonding method according to the present invention, a plurality of semiconductor chips attached to an adhesive sheet having elasticity are placed above a die pad to which an adhesive having a stronger adhesive force than the adhesive sheet is attached, and the adhesive sheet is bonded to the adhesive sheet using its elastic force. By pressing the semiconductor chip with a pressure rod against
Use something that will stick to the cut.

〔作用〕[Effect]

この発明においては粘着シートに付着された半導体チッ
プをダイパット上方に設置して半導体チップとダイパッ
トとの距離を極力小さくしておくから上記粘着シートか
ら半導体チップを剥離し、ダイパットに付着するまでの
時間が少なくなり、また、粘着シートから半導体チップ
を剥離する方法を粘着シートの弾性力と粘着シートの粘
着力まり大きい接着剤の粘着力とを利用して行うもので
めるから、粘着シートから半導体チップを剥離する工程
と半導体チップをダイパットに付着する工程とを同時に
行うことができるものでみる。In this invention, the semiconductor chip attached to the adhesive sheet is placed above the die pad to minimize the distance between the semiconductor chip and the die pad, so it takes a long time to peel the semiconductor chip from the adhesive sheet and attach it to the die pad. In addition, the semiconductor chip can be separated from the adhesive sheet by using the elastic force of the adhesive sheet and the adhesive force of the adhesive, which is greater than the adhesive force of the adhesive sheet. Let's look at something that can perform the process of peeling off the chip and the process of attaching the semiconductor chip to the die pad at the same time.

（実施例〕 第１図ないし第４図は本発明の一実施例であるダイボン
ド方法を示す工程図であり、この実施伝に於てはまず弾
力性を封し、−面に接着面を有するプラスチックからな
る円形の粘着シート（３ａ）上に素子形成向が粘着シー
ト（３ａ）との付着面となるように第６図に示すような
半導体ウェハ（υを付着しこれを切断して半導体チップ
（４）に分割し、更ｉこ粘着シート（８ａ）を第１図の
様に固定治具（ｊＪに固定する。次に１」１図のものを
半導体チップ（４）がフレーム（９月こ対面するように
セットし、更に粘着シー）（ｌａ）に複数付着された半
導体チップ（４）の中の１個とフレーム（９）に複数装
着されたダイパット（８〕の中の粘着シートｃ８ａ）の
接着面における粘着力より強い粘着力を有する接着剤（
７）が付着された１個とが対向するように粘着シート（
８ａ）を位置決めする。その後、第２図に示すように垂
直方向にのみ動く加圧棒四により粘着シート（８ａ）の
上記ダイノテット（８）を対向させた半導体チップ（４
）の付着面を粘着シート（８ａ）の弾性力に抗して押圧
しダイｚｆット（８）に半導体チップ（４）を密着させ
る。そして、第３図に示すまうに加圧棒に）を上方Ｃζ
移動させて粘着シート（８ａ）の押圧を止めるが、この
勾粘着シート（８ａ）が元に戻ろうとする力、すなわち
、弾性力と、粘着シート（８ａ）の粘着力より大きいｍ
Ｗ力とにより、ダイパット（３）に密着した半導体チッ
プ＜４）はダイパット（３）Ｉζ付着したまま残り、粘
着シート（８ａ）のみが押圧する前の状態に戻る。この
様にして第１０目のダイボンドを行った後、次に第４図
に示すように固定治具（５）及びフレーム（９）を水平
方向に移動して上記粘着シート（８ａ）Ｉζ付着された
残りの半導体チップ（４ンの中の１個とフレームに複数
装着されたダイパット（８）の中の半導体チップ（４）
が付着されていない１個とを対応させて定め、その後は
上記した第２図及び第８図に示すような工程を経て第２
回目のグイボンドを行うものである。(Example) Figures 1 to 4 are process diagrams showing a die bonding method that is an example of the present invention. A semiconductor wafer (υ) as shown in FIG. 6 is attached to a circular adhesive sheet (3a) made of plastic so that the element formation direction is the surface to which the adhesive sheet (3a) is attached, and the wafer is cut to form a semiconductor chip. (4), and fix the adhesive sheet (8a) to the fixing jig (JJ) as shown in Figure 1. Next, attach the semiconductor chip (4) to the frame (September). These are set so as to face each other, and one of the plurality of semiconductor chips (4) attached to the adhesive sheet (la) and the adhesive sheet c8a in the plurality of die pads (8) attached to the frame (9) ) has a stronger adhesive force than the adhesive force on the adhesive surface of ( ).
7) Place the adhesive sheet (
8a). Thereafter, as shown in FIG. 2, a pressure rod 4 that moves only in the vertical direction is used to hold the semiconductor chip (4) facing the dinotet (8) of the adhesive sheet (8a).
) is pressed against the elastic force of the adhesive sheet (8a) to bring the semiconductor chip (4) into close contact with the die zft (8). Then, as shown in Fig. 3, press the pressure rod) upward Cζ.
The pressure on the adhesive sheet (8a) is stopped by moving the adhesive sheet (8a), but the force that causes the gradient adhesive sheet (8a) to return to its original state, that is, the elastic force and the adhesive force m greater than the adhesive force of the adhesive sheet (8a)
Due to the W force, the semiconductor chip <4) that is in close contact with the die pad (3) remains attached to the die pad (3) Iζ, and only the adhesive sheet (8a) returns to the state before being pressed. After performing the tenth die bond in this manner, the fixing jig (5) and frame (9) are moved horizontally as shown in Fig. 4, and the adhesive sheet (8a) Iζ is attached. The remaining semiconductor chips (one of the four chips and the semiconductor chip (4) in the die pad (8) that is attached to the frame)
After that, the second one is determined through the steps shown in Figures 2 and 8 described above.
This is the second Guibond.

上記の様なグイボンド方法に於ては、半導体チップ（４
）を弾力性を有する粘着シートｃ８ａ）に付着する際、
半導体ウェハ（１）を粘着シート（８ａ）に付着し、こ
れを切断して半導体チップ（４月こ分割し、これを利用
して半導体チップ（４）をダイパット（８）に付着する
ようにしているため、半導体チップ（４）を別の粘着シ
ートに付着し変えるなどの工程を必要とせず従ってダイ
ボンド方法に於る最も時間の短縮された方法となるもの
である。In the above-mentioned Guibond method, semiconductor chips (4
) to the elastic adhesive sheet c8a),
A semiconductor wafer (1) is attached to an adhesive sheet (8a), and this is cut into semiconductor chips (4 pieces), which are used to attach semiconductor chips (4) to die pads (8). Therefore, there is no need for steps such as attaching the semiconductor chip (4) to another adhesive sheet and changing the adhesive sheet, thus making it the method with the shortest time among die bonding methods.

〔発明の効果〕〔Effect of the invention〕

この発明は以上説明した様に、弾力性を有するン　　粘
着シートに付着した複数の半導体テップを上記粘着シー
トより強い粘着力をもつ接着剤が付着されたダイパット
上方に設置し、この粘着シートを押圧することによって
半導体チップをダイパットに付着するよう１こしたので
上記粘着シートから半導体チップを剥離し、ダイパット
に付着するまでの時間が少なくなり、また、粘着シート
から半導体チップを剥離する工程と半導体チップをダイ
パットに付着する工程とを同時に行うことができるもの
であり、もってグイボンド工程に要する時間を非常に短
縮することができるという効果が有り、更には加圧棒に
対し半導体テップを吸着させる手段を設ける必要がない
ので装置自体の簡単化會ζも大きく貢献できるという効
果がある。As explained above, this invention involves placing a plurality of semiconductor tips attached to an elastic adhesive sheet above a die pad to which an adhesive with stronger adhesive force than the adhesive sheet is attached, and pressing this adhesive sheet. By doing this, the semiconductor chip was rubbed so that it would adhere to the die pad, so the time required for peeling the semiconductor chip from the adhesive sheet and adhering to the die pad was shortened, and the process of peeling the semiconductor chip from the adhesive sheet and the semiconductor chip The process of attaching the semiconductor tip to the die pad can be carried out at the same time, which has the effect of greatly shortening the time required for the bonding process.Furthermore, it provides a means for adhering the semiconductor tip to the pressure rod. Since there is no need to provide this, there is an effect that the simplification of the device itself can also be greatly contributed.

【図面の簡単な説明】[Brief explanation of drawings]

第１図ないし第４図はこの発明の一実施例を示す工程図
、第５図ないし第１０図は従来のダイボンド方法を示す
工程図である。 図において、（８ａ）は弾力性を有する粘着シート、（
４）は半導体チップ、（７）は粘着シート　（３ａ）よ
り強い粘着力を有する接着剤、に）は加圧棒である。 なお、各図中同一符号は同一または相当部分を示す。FIGS. 1 to 4 are process diagrams showing an embodiment of the present invention, and FIGS. 5 to 10 are process diagrams showing a conventional die bonding method. In the figure, (8a) is an elastic pressure-sensitive adhesive sheet, (
4) is a semiconductor chip, (7) is an adhesive sheet, (3a) is an adhesive with stronger adhesive force, and 2) is a pressure rod. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (2)

【特許請求の範囲】[Claims] （１）半導体チップを弾力性を有する粘着シートに付着
する工程、上記粘着シートより強い粘着力をもつ接着剤
が付着されたダイパットと加圧棒との間に、上記半導体
チップが上記ダイパットの接着剤と対向し、かつ加圧棒
直下に位置させて上記半導体チップが付着された粘着シ
ートを配設する工程、上記加圧棒を下方向に移動させて
上記粘着シートの弾性力に抗して半導体チップをダイパ
ットに付着された接着剤に付着する工程、上記加圧棒を
上方向に移動させ粘着シートの押圧を中止する工程を備
えたダイボンド方法。(1) A step of attaching the semiconductor chip to an elastic adhesive sheet, in which the semiconductor chip is bonded to the die pad between the die pad and the pressure rod, to which an adhesive with stronger adhesive force than the adhesive sheet is attached. arranging an adhesive sheet to which the semiconductor chip is attached, facing the agent and directly below the pressure rod; moving the pressure rod downward to resist the elastic force of the adhesive sheet; A die bonding method comprising the steps of attaching a semiconductor chip to an adhesive attached to a die pad, and moving the pressure rod upward to stop pressing the adhesive sheet. （２）半導体チップは、半導体ウェハを粘着シートに付
着後、この半導体ウェハを切断することにより、粘着シ
ートに付着されたことを特徴とする特許請求の範囲第１
項記載のダイボンド方法。(2) The semiconductor chip is attached to the adhesive sheet by attaching the semiconductor wafer to the adhesive sheet and then cutting the semiconductor wafer.
Die bonding method described in section.
JP23927084A 1984-11-13 1984-11-13 Method for die bonding Pending JPS61116846A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23927084A JPS61116846A (en) 1984-11-13 1984-11-13 Method for die bonding

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23927084A JPS61116846A (en) 1984-11-13 1984-11-13 Method for die bonding

Publications (1)

Publication Number Publication Date
JPS61116846A true JPS61116846A (en) 1986-06-04

Family

ID=17042261

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23927084A Pending JPS61116846A (en) 1984-11-13 1984-11-13 Method for die bonding

Country Status (1)

Country Link
JP (1) JPS61116846A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1662567A2 (en) * 2004-11-30 2006-05-31 STMicroelectronics Asia Pacific Pte Ltd. Simplified multichip packaging and package design
JP2022024030A (en) * 2015-03-20 2022-02-08 ロヒンニ リミテッド ライアビリティ カンパニー Method for transferring semiconductor device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1662567A2 (en) * 2004-11-30 2006-05-31 STMicroelectronics Asia Pacific Pte Ltd. Simplified multichip packaging and package design
EP1662567A3 (en) * 2004-11-30 2009-09-16 STMicroelectronics Asia Pacific Pte Ltd. Simplified multichip packaging and package design
US7816182B2 (en) 2004-11-30 2010-10-19 Stmicroelectronics Asia Pacific Pte. Ltd. Simplified multichip packaging and package design
JP2022024030A (en) * 2015-03-20 2022-02-08 ロヒンニ リミテッド ライアビリティ カンパニー Method for transferring semiconductor device

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