JPS61115158A - I/o interface control system - Google Patents

Abstract

PURPOSE:To control an I/O interface at a high speed with the less number of times of response than a conventional system by transferring a frame where an encoded I/O interface signal is carried between a channel device and an I/O device through a loop transmission line. CONSTITUTION:The channel device 2 transmits the frame to which the code (10)16 of a SEL1 is set in an interface control field in order to activate a disk device 6. This frame is first received by a disk controller 3 through a route 8a, however, it is transmitted to a route 8b as it is, because a transmission destination address set to the frame is different from the address of its own device. Receiving the frame, a disk controller 4 checks the state of the disk device 6 specified by the device address of the frame and returns a response frame to the channel device 2 through the route 8c of a loop transmission line 8. Information exchanged by the activation sequence is equivalent to a conventional technique, but the necessary number of response times of the interface goes to one-fifth. Moreover the signal transfer time on the interface can be reduced to one-fifth, thereby speeding up interface processing.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Utilization of the Invention] The present invention relates to input/output interface control between a channel device and an input/output control device.

[Background of the invention]

Conventionally, interface control between a channel device and an input/output control device is performed using IBM 5ystell/
360 and System / 3 7
0 I 10 Interface Ch
control unit
○riHinal E equipment Ma
As described in Nufact, Urer's Information, this is a method of transmitting information while interlocking between the channel device and the input/output control device regarding the rising and falling edges of each control line. This is commonly done by

This method will be explained with reference to FIG. From the channel device,
Put the address on BUS OUT on the input/output interface, and send the control signal ADDRESS OUT, HO
Raise LD OUT and 5 ELECTOUT sequentially (A, B, and T in Figure 8), and the input/output control device whose address on BUS OUT matches its own address becomes 0P.
Raise ERATIONAL IN and respond to the channel device (as shown in Figure 8).The channel device raises 0PE.
After confirming that RATIQ and NAL IN have gone up, lower ADDRESS OUT (O in Figure 8).

When the input/output controller confirms that ADDRESS OUT has fallen, it raises ADDRESS IN and
Put the address of the input/output control device on Bus IN (
Figure 8 Force, K). Channel device is ADDRESS
After confirming that IN has gone up, put the command code for the input/output device on BUS OUT, and output COMMAND.
Raise the OUT (see Figure 8). When the input/output control device confirms that COMMAND OUT has risen, it takes in the command code of BUS OUT and outputs ADD.
Lower RESS IN (Figure 8). The channel device confirms that ADDRESS IN has gone down,
Lower the COMMAND OUT (see Figure 8).

Through this series of sequences, the channel device completes the selection of the input/output control device, designation of the input/output device address, and transmission of the command. Next, the input/output control device activates the input/output device, checks the status, and returns the BUS IN.
After confirming that the COMMAND OUT signal has dropped, the 5TATUS IN signal is raised (S and S in Figure 8). Channel device is 5TATUS
Confirm that IN has increased and 5ERVICE
Raise OUT and read data on BUS IN (
The 6-person output control device in Figure 8 is 5ERVICE O.
Confirm that UT has risen and lower 5TATUS IN (S in Figure 8). Channel device is 5TATUS
Confirm that IN has decreased and press 5ERVICE O
Lower UT (evening in Figure 8).

The command to the input/output device is completed with the above sequence.
Next, the data transfer sequence begins.

As can be seen from the above explanation, in the conventional system, the number of responses between the channel device and the input/output control device is large.
Therefore, as the distance between the channel device and the input/output control device increases, the proportion of the signal propagation time in the interface processing time increases. Therefore, when the interface is made to have a long distance, there is a problem that when trying to control an input/output device that involves mechanical operations such as rotation or movement, such as a magnetic disk drive, it becomes impossible to follow the input/output device for one hour. Furthermore, the large number of interface signal lines is also an obstacle to increasing the distance of the interface.

The conventional input/output interface control method as described above is based on the premise of control using wired logic, but in recent years, microprocessor control has become common for input/output devices as well. However, the conventional method of raising and lowering the control line cannot take advantage of the performance of the microprocessor, and is no longer suitable for high-speed processing of interfaces.

Furthermore, in order to increase the degree of freedom in the layout of computer systems, there is a demand for longer distance interfaces between channel devices and input/output control devices.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide an input/output interface control method that can shorten the input/output interface processing time between a channel device and an input/output control device and can extend the distance of the interface.

[Summary of the invention]

The input/output interface control method of the present invention is as follows.

By connecting the channel device and the input/output control device with a loop transmission path, and mutually transferring frames carrying encoded input/output interface signals between the channel device and the input/output control device via the loop transmission path. , which is characterized by executing input/output interface control at high speed with fewer responses than conventional ones. Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

[Embodiments of the invention]

FIG. 1 is a schematic configuration diagram of a loop network system according to an embodiment of the present invention. In this figure, ■ is a data processing device, and 2 is its channel device. 3 and 4 are disk control bags @ (input/output control devices), and 5 to 7 are disk devices (input/output devices). The channel device 2 and the disk control devices 3 and 4 are connected in a loop by a loop transmission line 8.

When the data processing device 1 accesses, for example, the disk device 6, the channel device 2 activates the disk control device 4 from the path 8a of the loop transmission path 8 via the disk control device 3 and the path 8b. The disk control device 4 drives the disk device 6 based on commands from the channel device 2. The response from the disk controller 4 is transferred to the channel device 2 through the path 8c of the loop transmission line 8. Input/output interface signals between the channel device 2 and the disk controller 3-4 are encoded into a frame having the structure shown in FIG. 2, and transferred.

In FIG. 2, a start delimiter and an end delimiter are special information for distinguishing between a frame and a gap outside the frame. When the channel device 2 transmits, the destination address indicates the address on the loop network of the disk controller 3 or 4.
When transmitting, it indicates the address of the channel device 2 on the loop network. The source address indicates the channel device address on the loop network when the channel device 2 is transmitting, and indicates the address of the disk control device when the disk control device 3 or 4 is transmitting. As shown in FIG. 3, the frame types that can be specified in the frame control field include an information frame, a node reset frame, and a node-in-use frame. The correspondence between the code of the frame control field and the frame type is shown in FIG. The interface control field indicates instructions and responses from the channel device 2 or the disk controller 3-4 to a functional unit or a complex unit of functions. FIG. 4 shows the codes and functional contents of the interface control field when the channel device 2 transmits. FIG. 5 shows the code and function of the interface control field when the disk controller 3 or 4 sends the data. The control data field has different meanings depending on the contents of the interface control field (see FIGS. 4 and 5). The transfer data field exists only when the interface control field is WDATA or RDATA.

Next, based on a command from the data processing device 1, the channel device W2 sends a channel command code (05) to the disk device 6.
A case will be described in which write data is transferred using . The input/output interface control sequence in this case is shown in FIG.

First, in order to start up the disk device 6, the channel device 2 transmits a frame with a 5ELI code (10) set in the interface control field. Also,
The destination address of this frame is the disk controller 4,
The source address is channel device 2, the frame control field is a code (00) indicating an information frame, 11. The device address is set to the address of the disk device 6, and the control data is set to the write command code (05).

This frame is first received by the disk controller 3 via the path 8a. However, since the destination address set in the frame is different from its own address, the disk control device 3 sends the received frame as it is to the route 8.
Send to b. The disk control device 4 receiving this frame takes in the frame, decodes it, and checks the status of the disk device 6 specified by the device address of the frame, since the destination address matches the address of its own device.

The response frame is returned to the channel device 2 via the path 8c of the loop transmission line 8. This response frame is.

The address of the channel device 2 is the destination address, the address of the disk controller 4 is the source address, and the information frame code (00) is the frame control field.
), I], R3PI as interface control code
The code (80), . . . each includes a status indication of the disk unit W6 as a control data field.

The information exchanged in this activation sequence is equivalent to the prior art described in the "Background of the Invention" section, but the number of interface responses required for this is reduced to one-fifth.

This also reduces the signal propagation time on the interface to one-fifth, achieving faster interface processing.

Next, the data transfer sequence will be explained.

The data transfer sequence begins with the disk controller 4 transmitting a write data request frame to the channel device 2. This write data request frame has an interface control code of REQWD, that is, (
At AO), 11, the control data field indicates the number of bytes requested. The other fields are the response frame (
R5PI). In response, channel device 2 sends interface control code (40)+s (
WDATA) frame. The data field of this frame contains data to be written to the disk device 6, the control data is meaningless, and the other fields are the same as the start frame (SEL1) described above.

Finally, the termination sequence will be explained. When the transfer of the write data is completed, the disk controller 4 writes the data to the disk device 6, checks the status after writing, and sends the interface control code (81), ... (R
3P2) frame to the channel device 2. The control data field is D5 (indicates the end status of the SFF device).

Other fields are the same as the interface control code (80) and Ll frame (R3PI) described above.

In response to this frame, the channel device 2 sends a frame with interface control codes (20), . . . (ENDI). The control data of this frame is meaningless, and the other fields are the same as the interface control code (10), frame (SELL). However, if the data processing device 1 issues another command next time, the channel device 2 will receive the interface control code (21), instead of this interface control code (20), R (ENDI) frame. (
SEL2) frame is transmitted.

In addition, the R3PI frame and REQWD frame are
It is also possible to combine and transmit. Then, the interface between the channel device and the disk control device becomes a complete interlock type (shakehand type).

FIG. 7 is a schematic block diagram showing an example of the configuration of a portion of the disk controller 3.4 related to input/output interface control. In this figure, 10 is a serial/parallel conversion circuit that converts bit serial data of a received frame into byte serial data. Of the received frame data converted into byte serial data by this serial/parallel conversion circuit IO, the destination address is stored in register 11, the source address is stored in register 12, the frame control field is stored in register 13, and the interface control field is stored in register 14. The device address is stored in the register 15, the control data is stored in the register 16, and the transfer data is stored in the transfer data memory 17.
are stored in sequence. Register 11, 12.1
The contents of registers 18, 19.20 and comparison circuits 21, 22. .

23, respectively. If the frame received from the channel device 2 is addressed to the device itself, a match signal is output from all of the comparison circuits 21+22.23, and -
A coincidence signal is output from the number circuit 26. The control circuit 27 receives the coincidence signal.

Instructs the control processor 28 to create a frame to be transmitted to the channel device 2 in the transmission frame buffer 31, and also instructs the selector 33 to create a frame to be transmitted to the transmission frame buffer 31.
Let them choose the first side. Thus, the transmit frame buffer 3
The frame data within 1 is sent to the loop transmission line 8 in bit serial fashion.

If the received frame is addressed to another device, the - number circuit 26 does not output a matching signal, so the selector 33 sends the received frame to the receiving buffer 32.
The side remains selected, and the received frame is sent to the loop transmission line 8 as it is via the receive buffer 32 and selector 33.

The frame control code stored in register 13 is decoded by decoder 24, and the interface control code stored in register 14 is decoded by decoder 25. These II! The # reading result becomes valid when a match signal is output from the minus number circuit 26, that is, when a frame addressed to the device itself is received.

〔Effect of the invention〕

As described above, according to the present invention, the number of responses of the interface between the channel device and the input/output control device can be reduced. For example, in the case of a startup sequence, the number of responses is reduced to one-fifth compared to the conventional method described above. Therefore, the interface response time between the 5-channel device and the input/output control device can be reduced, and even when the input/output device that involves mechanical movement is targeted, the interface can be extended over a long distance. In addition, since interface signals are structured into frames and transmitted and received, the number of interface signal lines can be greatly reduced, not only when frames are handled in bit serial format, but also when handled in byte parallel format.
Physical connection between the channel device and the input section control device becomes easy.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram of a loop network system according to an embodiment of the present invention, FIG. 2 is an explanatory diagram of a frame format, and FIG.
The figure is an explanatory diagram of frame types, Figure 4 is an explanatory diagram of the functional contents of the interface control field when a channel device transmits, and Figure 5 is an explanatory diagram of the functional contents of the interface control field when a disk controller transmits. 6 is a diagram showing an interface control sequence when writing data is transferred from a channel device to a disk device, FIG. 7 is a schematic block diagram showing an example of the main configuration of a disk control device, and FIG. 8 is a diagram showing a channel control sequence. 1 is a timing diagram illustrating a conventional input/output interface control sequence between a device and an input/output controller; FIG. l...data processing device, 2...channel device,
3.4...Disk control device, 5.6.7...
disk device. Figure 3 Figure 4

Claims (1)

[Claims] (1) A channel device and an input/output control device are connected via a loop transmission path, and a frame carrying a coded input/output interface signal is transferred between the channel device and the input/output control device via the loop transmission path. An input/output interface control method characterized by mutual transfer.