KR940001108B1 - Interface system for optical disc driver - Google Patents

Abstract

The interface of an optical disc driver comprises a pick-up for reading data from an optical disc, an amplifier for amplifying the data, a servo driver for controlling the spindle motor and the position of pick-up according to the amplified data, signal processing means for processing the amplified data, a ROM decoder for decoding the processed signal to store and reading the data to output, a CPU for controlling the system according to the output signal, and an interface for receiving from and transferring to the host the output data. Thus this invention enables host computer to do more job and to transfer data at high speed.

Description

Interface system of optical disc drive

1 is an operation signal flow diagram for an interface of a conventional optical disk drive.

2 is a configuration diagram of an interface system of the optical disk drive of the present invention.

3 is a signal connection diagram of the target and host computer of FIG.

4 is a detailed circuit diagram of the interface unit of FIG.

FIG. 5 is a table showing the bus stage of FIG. 2. FIG.

6 is the command data block format of FIG.

7 is the format of the state data of FIG.

8 is an input / output seam diagram when performing the selection step of FIG.

9 is an input / output breakdown diagram when the command step of FIG. 2 is executed.

FIG. 10 is an input / output seam diagram when performing the reselection step of FIG.

11 is an input / output breakdown diagram when performing the data step of FIG.

12 is an input / output seam diagram when performing the state step of FIG.

13 is a signal flow diagram for the operation description.

* Explanation of symbols for main parts of the drawings

1: optical disc 2: pickup

3: high frequency amplifier 4: optical disc digital signal processor

5: central processing unit 6: optical disc ROM decoder

7: buffer RAM 8: interface

9: Servo Drive 10: Host Computer

11: target 12: spindle motor

The present invention relates to an interface between a personal computer (hereinafter referred to as a PC) and a peripheral device. In particular, a plurality of peripheral devices can be connected to a single connection bus of a PC so that they can be used simultaneously. The present invention relates to an interface system of an optical disk drive that allows a PC to transmit data at high speed with an optimal interfacing movement in consideration of an access time for which a PC continuously waits for data for generating a required signal.

In general, there are two types of interface between optical disk ROM drive and PC. First of all, it is a standard method called small computer system interface. It is widely used for its compatibility and various functions. It does not take into account the disadvantages of over spec and high price due to dead functions. Secondly, it selects a host computer and configures the interface method according to the internal structure and function of the PC. This has the advantage of being able to design optimally considering the function and performance of the PC and the low price, while having the disadvantage of incompatibility. have. That is, as shown in FIG. 1, there is only one-sided selection of the host computer in the bus-free state, and the inefficiency of the host computer continuously waiting for data during the command execution time of the optical disk ROM drive to be the target. There were a lot. In particular, the optical disk ROM has a relatively slower access time than other recording media (i.e., a hard disk drive, etc.) (where the hard disk drive is several tens of msec, and the optical disk ROM drive is 500-900 msec). During this time, the host computer could not do anything else and had to wait for data.

SUMMARY OF THE INVENTION In view of the above problems, the present invention is provided with a dip switch in a peripheral device connected to a host computer, and then a plurality of peripheral devices are simultaneously connected to each other by giving a respective identification signal and using a disconnector / reselection ( The optical disk drive interface system was created to allow the host computer to perform more tasks and transfer data at high speed by granting the connection bus the minimum amount of time required for interfacing to peripheral devices through the Disconnect / Reselection operation. Referring to the present invention in detail based on the accompanying drawings as follows.

2 is an interface system configuration diagram of an optical disk drive according to the present invention. As shown in the drawing, the pickup 2 of the target 11 that reads the frequency ratio and reads frequency-modulated encoded information from the optical disk 1 is shown in FIG. And a high frequency amplifier (3) for amplifying the data signal of the optical disc (1) detected by the pickup (2) to a predetermined level, and a spindle motor according to the data signal output from the high frequency amplifier (3). Servo drive unit 9 for controlling the number of revolutions of 12 and the position of pickup 2, and optical disc digital signal for processing the data signal of optical disc 1 output from the high frequency amplification unit 3 as a digital data signal. An optical disc ROM decoder unit 6 which decodes the digital data signal of the optical disc digital signal processor 4, stores the data sequentially in the buffer RAM 7, and reads and outputs the stored data; remind A central processing unit (5) for controlling the overall system operation according to the data signal output from the optical disc ROM decoder unit (6), and output data signals of the central processing unit (5) and the optical disc ROM decoder unit (6). It is comprised as the interface 8 which transmits and receives to 10. FIG.

FIG. 3 is an explanatory diagram showing the interface state between the optical disk ROM drive (hereinafter referred to as the target 11) and the host computer 10 of FIG. 2, and FIG. 4 is a detailed circuit diagram of the interface unit 8 of FIG. As shown therein, a dip switch 8a switched by a user's selection to output an 8-bit identification data signal ID, and an identification data signal output from the dip switch 8a at the time of resection. A buffer unit 8b for buffering and transmitting the data to the data bus HD _Φ -HD ₇ of the host computer 10, and 8 bits output from the data bus HD _Φ -HD ₇ of the host computer 10 at the time of selection. A comparison unit 8d for comparing the identification data signal and the identification data signal output from the dip switch 8a and outputting a control signal according to the identification data signal, a reselection start signal RESEL output from the central processing unit 5; Call signal ( ) And the selection signal SEL output from the host computer 10 to identify the identification data signal and the call signal ( ) And a call signal generator 8e consisting of an end gate AND ₁ (AND ₂ ) and a flip-flop FF ₁ , and a call signal output from the call signal generator 8e. ), The identification data signal of the comparison section 8d and the selection signal of the host computer 10 ( ) And end combination to the central processing unit 5 for the interrupt request signal ( ), The output Iowa gate (OR ₁₎ (OR _2), and the AND gate (AND _3), the re-selected detector (8f) Oh, command data outputted from said central processing unit (5) (Command Data) ( C that / D), input / output request signal (I / O), and interrupt signal of optical disc ROM decoder 6 ( ), The interrupt request signal to the CPU 5 Iowa gate (OR ₃₎ (OR _4), and the AND gate (AND _4), the interrupt generation part (8g) and the input output request signals (I / O) that is output from the central processing unit 5 to which outputs of the And buffers the identification data signal output from the data bus (HD _Φ -HD ₇ ) of the optical disc ROM decoder unit 6 according to the level and transmits the identification data signal on the data bus (HD _Φ -HD ₇ ) of the host computer 10. In addition, the buffer unit 8i for transmitting the identification data signal of the host computer 10 on the data bus HD _Φ- HD ₇ of the optical disc ROM decoder unit 6, and the data request of the central processing unit 5; signal Enable signal of the optical disc ROM decoder 6 Data request signal And the recognition signal of the host computer 10 To the optical disc ROM decoder 6 with a host read signal Outputs a request signal A control signal generator 8h including a flip-flop FF ₂ , FF ₃ , an AND gate AND ₅ , AND ₆ , and an inverter gate I ₁ , and the control signal generator 8h. Request signal output from , The call signal of the call signal generator 8e Command data (C / D) of the central processing unit (5), input / output request signal (I / O), and acknowledgment signal of the host computer (10). Is configured as a buffer unit 8c for buffering and outputting the same to the host computer 10. Is the read signal, Is the recording signal Is the chip select signal, Is the host recording signal. Referring to the operation, effects of the present invention configured as described above in detail.

First, as shown in FIG. 2, the pickup 2 irradiates an optical beam to the optical disk 1 rotating at a constant linear velocity by driving the spindle motor 12 to detect a data signal, and the detected data signal is a high frequency. After being amplified to a predetermined level through the amplifier 3 and input to the servo driver 9 and the optical disc digital signal processor 4, the servo driver 9 picks up in accordance with the data signal through the high frequency amplifier 3; ) And the number of rotations of the spindle motor 12 are controlled, and the optical disc digital signal processing unit 4 reads the data signal of the high frequency amplification unit 3 by the control signal output from the central processing unit 5. This is inputted into the optical disc ROM decoder 6 after processing it into digital data necessary for transmission. Therefore, the optical disc ROM decoder 6 stores the digital data signal output from the optical disc digital signal processor 4 by the control signal of the central processing unit 5 through the data bus and is stored in the buffer RAM 7. By decoding the serial data signal, the host computer 10 transmits command data (C / D), input / output request signal (I / O), and request signal to the host computer 10 through the interface unit 8 to be described later. And the identification data signal on the data bus HD _φ- HD ₇ , while the host computer 10 selects the selection signal via the interface unit 8. Acknowledgment And the identification data signal on the data bus HD _φ- HD ₇ is transmitted to the target 11, that is, the central processing unit 5 and the optical disc ROM decoder 6 of the optical disc ROM drive.

That is, in order for the host computer 10 to read the data of the optical disc 1 from the target 11 which is an optical disc ROM drive, it is necessary to first select up to eight connectable targets 11. ) The selected target 11 receives a command by requesting a command data block (CDB) issued by the host computer 10 as shown in FIG. 6 and having a bus usage right of the interface unit 8, which is called a command phase. do. In addition, if the target 11 seems to take a lot of data preparation time after receiving the command, it sends a disconnect status as shown in FIG. 7 (where the disconnect permission flag is set to the command issued by the host computer 10). Only possible if set to "I" as shown in the diagram), the bus is freed.

Usually, the optical disk ROM drive transfers the pickup (2) for access or search and inputs data, corrects errors, and detects the data until the data on the optical disk (1) is transferred to the host computer (10). It takes several hundred msec to several sec time. During this execution time, the host computer 10 can do other things when disconnected. If the disconnection is not made, that is, as shown in FIG. 8, the selected target 11 Must wait for the data transfer. Then, the target 11 transmits a signal of completion of transmission to the host computer 10 when the data transmission preparation is completed, which is called a reselection phase. The target 11 transmits data when the reselection is completed and connected to the host computer 10 again. This is called a data phase.

After data transfer with the host computer 10 is completed, the target 11 sends a status phase which is a result of command execution and enters a bus free state. If the target 11 fails to prepare data due to a certain factor in the disconnected state, the target 11 may go to the state step immediately after reselection. At this time, of course, as shown in FIG. 7, status data indicating that the data is not transmitted is transmitted.

This will be described in detail with reference to FIGS. 3 to 13 as follows.

First, as shown in FIG. 13, the selection step for the host computer 10 to select the target 11 is a step available only in the bus-free state as shown in FIG. 8, and the host computer 10 uses this selection step. The target 11 is selected. That is, the host computer 10 transmits the identification data signal of the target 11 to be selected in the bus free state as shown in Fig. 8A on the data bus HD _Φ HD ₇ and the selection signal ( ) Is outputted as a low (L) signal as shown in (d) of FIG. 8, the 8-bit identification data signal sent from the host computer 10 is input to the input terminal Q of the comparator 8d. Further, as shown in FIG. 8C, the identification data signal of the target 11 output from the dip switch 8a is input to the input terminal P of the comparison section 8d. Therefore, the comparison unit 8d compares the identification data signal of the host computer 10 with the identification data signal of the target 11 outputted from the dip switch 8a, and if the values match, (d) of FIG. Likewise, the output terminal (P = Q) arc low (L) signal is input, so the other input terminal of the OR gate (OR ₁ ) (OR ₂ ) is a low signal L (output L) output from the central processing unit (5). ) And the high (H) and low (L) signals outputted from the flip-flop (FF ₁ ) and the AND gate (AND ₂ ) of the call signal generator 8e are input, so that the output of the OR gate (OR ₁ ) is high. A signal is output, and a low signal is output at the output of the OR gate OR ₂ and is ANDed through the AND gate AND ₃ , and then an interrupt request signal is sent to the CPU 5 as shown in FIG. Will output active low.

Therefore, the central processing unit 5 of the target 11 is an active low interrupt request signal. Is generated, the host computer 10 recognizes that it has selected itself, and the call signal is low as shown in (b) of FIG. Is output through the AND gate AND ₂ of the call signal generator 8e to enable the buffer units 8b and 8c, and is buffered through the buffer unit 8c to respond to the host computer 10. Done. The host computer 10 then the target 11 is a call signal Output low, the identification data signal and selection signal And pick again Is output high (H), the output of the AND gate (AND ₃ ) of the reselection detection section (8f) becomes a high state, the interrupt request signal to the central processing unit (5) Will output high.

At this time, the command data (C / D), the input / output request signal (I / O), and the request signal of the central processing unit 5 of the target 11 in the selection step. And the recognition signal of the host computer 10 Is output high (H), and the reset signal RESEL of the host computer 10 is output low.

When the selection step is completed as described above, the target 11 performs a command step. The command step transmits a set of commands to the selected target 11 by the host computer 10. Is called a command description block (CDB) and is usually composed of several bytes. The transmission path of the command data block (CDB) is the host computer 10 → the buffer section 8i → the optical disk ROM decoder section 6. → sent to the central processing unit (5). That is, after the selection step is finished, the central processing unit 5 of the target 11 highs the command data (C / D) and the input / output request signal (I / O) as shown in (b) and (c) of FIG. And low to start the command step. First, the central processing unit 5 of the target 11 performs a data request signal (D) as shown in FIG. (Low), the host computer 10 requests the command data block CDB as shown in FIG. That is, the data request signal output from the central processing unit 5 ( A low signal is buffered through the AND gate AND ₅ of the control signal generation unit 8h and the buffer unit 8c, and then the request signal as a low signal as shown in FIG. ( ) Will be printed. Therefore, the host computer 10 sends a request signal at the command step. When () becomes low, as shown in Fig. 9 (e), one byte of the command data block CDB is transmitted on the data bus HD _φ- HD ₇ and the recognition signal ACK is sent low. Recognition signal sent from the host computer 10 Is buffered through the buffer unit 8c and input to one input terminal of the OR gate OR ₄ configured in the interrupt generator 8g, and the inverter gate I ₁ and the flip-flop configured in the control signal generation unit 8h. The command data C / D which is input to the clock terminal CK of FF ₂ and output from the central processing unit 5 and the input / output request signal I / O which is the low signal are It is input to both input terminals of the OR gate OR ₃ of the interrupt generator 8g, and is buffered through the buffer unit 8c and input to the host computer 10. Therefore, the OR gate OR ₃ of the interrupt generator 8g outputs a low signal to the other input terminal of the OR gate OR ₄ by ORing the instruction data C / D and the I / O request signal I / O. The oA gate OR ₄ is applied to the one input terminal thereof. The interrupt request signal IRQ ₂ , which is low as shown in FIG. 9A, is inputted to the CPU 5 through the AND gate AND ₄ . Accordingly, the central processing unit 5 of the target 11 generates a host write signal as shown in FIG. 9A when the interrupt request signal IRQ ₂ which is low from the interrupt generator 8g is generated. To the optical disc ROM decoder unit 6 in a row, and the instruction data block CDB on the data bus HD _Φ- HD ₇ is first-in first-out (FIFO) in the optical disc ROM decoder unit 6 as shown in FIG. Read signal after inputting The command data block CDB is read using.

Claims (1)

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