JPS61112428U - - Google Patents
Info
- Publication number
- JPS61112428U JPS61112428U JP20203084U JP20203084U JPS61112428U JP S61112428 U JPS61112428 U JP S61112428U JP 20203084 U JP20203084 U JP 20203084U JP 20203084 U JP20203084 U JP 20203084U JP S61112428 U JPS61112428 U JP S61112428U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- register
- line
- output
- selection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
Description
第1図は本考案の一実施例を示す具体的構成図
、第2図は従来回路図例を示す図、第3図は本考
案の構成概念を示す図である。
1…保持回路、11…トリガ発生回路、SW1
〜SW3…撰択スイツチ、C1〜C3…制御対象
、R1〜R3…抵抗、D1〜D3…発光ダイオー
ド、Rg1…Rg3…レジスタ、G1〜G3…ゲ
ート、G4…オアゲート、G5…G7…ナンドゲ
ート。
FIG. 1 is a concrete block diagram showing an embodiment of the present invention, FIG. 2 is a diagram showing an example of a conventional circuit diagram, and FIG. 3 is a diagram showing the structural concept of the present invention. 1...Holding circuit, 11...Trigger generation circuit, SW 1
~ SW3 ...Selection switch, C1 - C3 ...Controlled object, R1 - R3 ...Resistor, D1 - D3 ...Light-emitting diode, Rg1...Rg3...Resistor, G1 - G3 ...Gate, G4 …Or Gate, G 5 …G 7 …Nand Gate.
Claims (1)
、これら選択スイツチの各々から取出される信号
ラインの信号を受けるレジスタと、各信号ライン
の信号の変化を検出して該レジスタに信号をラツ
チするためのトリガ信号を与えるトリガ信号発生
回路と、各レジスタの出力と前記トリガ信号を受
けるその出力が各々の信号ラインに接続されたオ
ープンコレクタ形のゲート回路とにより構成され
、前記信号ラインの状態を出力信号ラインとして
も用いることができるようにしたことを特徴とす
る選択信号保持回路。 A plurality of selection switches that generate selection signals, a register that receives the signal on the signal line taken out from each of these selection switches, and a register that detects a change in the signal on each signal line and latches the signal in the register. It consists of a trigger signal generation circuit that gives a trigger signal, and an open collector gate circuit whose output from each register and the output that receives the trigger signal are connected to each signal line, and outputs the state of the signal line as an output signal. A selection signal holding circuit characterized in that it can also be used as a line.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP20203084U JPS61112428U (en) | 1984-12-25 | 1984-12-25 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP20203084U JPS61112428U (en) | 1984-12-25 | 1984-12-25 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61112428U true JPS61112428U (en) | 1986-07-16 |
Family
ID=30764370
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP20203084U Pending JPS61112428U (en) | 1984-12-25 | 1984-12-25 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61112428U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010511245A (en) * | 2006-12-01 | 2010-04-08 | エーティーラブ・インコーポレーテッド | Touch sensing device |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58178428A (en) * | 1982-04-14 | 1983-10-19 | Hitachi Ltd | Data processor |
-
1984
- 1984-12-25 JP JP20203084U patent/JPS61112428U/ja active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58178428A (en) * | 1982-04-14 | 1983-10-19 | Hitachi Ltd | Data processor |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010511245A (en) * | 2006-12-01 | 2010-04-08 | エーティーラブ・インコーポレーテッド | Touch sensing device |