JPS61107385A - Display screen control system - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a display screen control method that performs screen switching and overlapping display in a monochrome display mode using a plain memory that supports color.

[Technical background of the invention and its problems]

Recently, there has been remarkable progress in the field of information processing, especially in man-machine interfaces for office computers, 4-socket computers, work stages, and the like. CRT is the core of this
Displays are required to have more advanced functions. Examples include multi-window display and superimposed display functions.

Incidentally, due to the widespread use of color display monitors, many of these systems have bitmap memories for three screens corresponding to the three primary colors of RED, GREEN, and BLUE. However, in reality, in carrying out office automation tasks, monochrome devices are often sufficient, and rather than color display, screen switching and overlapping display functions are required to easily realize the multi-window and image processing mentioned above. It is often done.

[Purpose of the invention]

The present invention has been made based on the above circumstances, and by adding a small amount of hardware, in monochrome element mode, three memory planes corresponding to one color are used.
It is an object of the present invention to provide a display screen control method that can easily realize screen switching and overlapping display.

[Summary of the invention]

Although the present invention is somewhat different from the multi-window described above, it realizes screen division processing in units of lines (hereinafter referred to as horizontal division for convenience) and superimposition thereof.

For this reason, data is set for each line in a color display device that has three plane memories corresponding to RED, GREEN and BLUE, and line table information, brain selection information, and superposition information are stored. Based on the stored control memory and the information stored in the control memory in the monochrome display mode, display data is obtained from any plane memory for each line, and furthermore, the logical sum operation ( A gate circuit was added to select the superimposition and supply it to the display monitor.

- This allows screen switching and overlapping display for each line. According to the present invention, by using a plain memory that supports one color, it is possible to improve /4'7 ohms with the addition of a small amount of hardware.

[Embodiments of the invention]

Hereinafter, embodiments of the present invention will be described in detail using the drawings. FIG. 1 is a block diagram showing an embodiment of the present invention,
Only the display system constituting the display control device is extracted and shown. That is, from the program to the individual memory REAηfi
7jiQO performing ITE operation:,P,lu**
"610°', H4y, .

Since this is sufficient, it is intentionally not shown here.

In the figure, 11 is a display controller (CRTC). The display controller 11 assigns character addresses (line addresses/line addresses/
Column address), last address, etc. are output. 12
．． 13.14 are each GREEN-BLU″E-RED
It is a bitmap memory (plain memory) corresponding to , in which display data corresponding to each color is stored.
It has the amount of @ for the screen. 15, 16, and 17 are shift registers (P/S). Shift register 15°16.17
are respectively obtained from the character section widths outputted from the bit map memories 12, 13, and 14 in the 4' parallel, and are converted to serial numbers and output.

18 is a control memory added according to the present invention. Data is set for each line in the control memory 18, and its internal structure is shown in FIG. That is, the control memory 18 stores line table information (LT), 4 bits, and (PsL3 to
PsLo) Consists of Noblane selection information. The screen overlay information is now set by the combination of the 2nd and 3rd bits of the plane selection information. It has become. The definition is 9 as shown.

The explanation returns to Figure 1. 19 is a register.

The register 19 stores plane selection information (PSL) corresponding to the line address output from the display controller 11.
from the control memory 18 to the bitmap memories 12, 13 .
The display data is read out at the same timing as the display data read out from 14, and its contents are held. 20.25 is a multiplexer (MUX). The multiplexer 20 receives 2-bit information (PSLO, PSL1) from the register 19.
As a result, one of the outputs of the shift registers 15, 16 and 17 and the output of the multiplexer 15 is selectively output. The multiplexer 25 connects the registers 19 to 2
Pit information (PSL 2.

PSL 3 ) by obtaining shift register 15
．． 16. Select and output one of the superposed outputs of arbitrary combinations of 17. The output of this multiplexer 25 is supplied to one input terminal of the multiplexer 20. 21,
22, 23, 24 are OR gates, and shift registers 15, 16, . Shift register 15.17° Shift register 16, 1f, Shift register 15.16.1
7 outputs are superimposed and the input terminal (O
~3).

26, 27, and 28 are flip-flops that synchronize R-G-B signals, and their outputs are connected to drivers 32 and 3.
3.34, it is supplied as a display signal to a display monitor (not shown). Incidentally, 31 is a flip-frog for instructing the display mode, and is provided to always keep the BR line that is supplied to the display monitor OFF in the monochrome display mode, and when this flip-frog 31 is reset, andr1 -to2
At 9/30, the 8° 1 life is turned off. FIG. 3 is an operational conceptual diagram conceptually showing the operation of the embodiment of the present invention on the display screen. (,) shows the screen image in each R-G-B plane memory, and (b) shows the actual display screen image.

Hereinafter, the operation of the embodiment of the present invention will be explained in detail.

In normal color display mode, the program displays plane selection information PSL 1 for the entire screen area.

Set PSL O @00” and flip 70 knob 31
Set it. As a result, the output of the shift register 5 is selected by the multiplexer 20. i.e. the output provided to the display monitor.

Data from the GREEN bitmap memory 2 is output to the G line. Data from bitmap memories 13 and 14 are output to the BR lines, respectively.

Now, consider a case where another screen is displayed as a window in a certain area of the screen in monochrome display mode. (
(Fig. 3) The program first resets the flip-flop 31, creates a base screen in the bitmap memory 2 of GREEN, 1, and sets the plane selection information PSL 1 and PSL O to "00".
#Keep it closed. In this state, GREE is transmitted through the G line.
The contents of the N-plane 12 are displayed on the display monitor. Since the flip-flop 31 is reset, 5B-
Since the R line is always OFF, BLUE,
Since RED is not displayed, consider screen overlay. The program is GREEN printer L/-712 and RED printer v-
Create display data on 714 and press GR in a certain area of the screen.
Suppose that we want to display the contents of lane 14 in a superimposed manner. (Fig. 3 ■) In this case, plane selection information P for the area where you want to overlap
Set SL 1 and PSL O to 11#, and
Plane selection information PSL 3, PSL 2 @01
'. When the line address indicates an overlapping area, the program then writes the BLUE bitma:,
':;Write another screen data to f memory 13 and RED
Further screen data is written into the bitmap memory 14 of the screen. By rewriting the contents of the control memory 18, any one of the three screens mentioned above can be displayed. That is, plane selection information PSL 1-PSL O=″oo
”, the contents of GREEN's pit map memory 12 are plane selection information PSL1/PSLO=@01-f BLU
E Nohit? The content of the bitmap memory 14 in which the content of the lag memory 13 is RED is displayed when the plane selection information PSL1/PSLOO="10".

ζHere, horizontal division processing will be described. Here, the second
Let us assume a case where a part of the BLUE bitmap memory 13 is displayed in a screen area based on the data of the GREEN bitmap memory 12 as shown in the figure. At this time, the control memory 18 (■) Specify the line address corresponding to the part to be displayed in the bitmap memory 13 of BLUE in the line table information of the line address corresponding to
1- Write PSL O= “01”.

Due to this, when the line address output by the display controller 11 indicates the above area, the BLUE
Data on a designated line in the bitmap memory 13 is selected and output on the G line. That is, by rewriting the line table information in the control memory 18, the contents of any area of any plane can be displayed on the pace screen.

The multiplexer 25 outputs the output of the OR gate 22 (the logical sum of the display data of the GREEN plane 12 and the RED grain 14) according to the plane selection information PSL 3 and PSL 2, and the plane selection information PSL 1 ,
PSL O causes multiplexer 20 to select the output of multiplexer 25 and display the contents of GREEN plane 12 and RED f lane 14 in a superimposed manner on the display monitor.

〔Effect of the invention〕

As described above, according to the present invention, screen switching for each line and overlapping display can be performed. By using a plain memory that supports color in this way, it is possible to improve performance in monochrome display by simply adding a small amount of hardware.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a three-dimensional diagram showing the internal configuration of a control memory added according to the present invention, and FIGS. 3(a) and (b) are diagrams showing an embodiment of the present invention. FIG. 3 is an operational conceptual diagram conceptually showing an example operation on a display screen. 12.13.14...Bitmap memory (plain memory), 18...Control memo I), 19...Register, 20.25...Multiplexer (MUX), 21
．． 22, 23.24...Or Gate, 26°27.2
8.31...Flip frog. Applicant's representative Patent attorney Takehiko Suzue Figure 1 Figure 2 Figure 3 (a) Procedural amendment (method) % formula % 1. Display of the case Patent application No. 1982-229215 2. Screen for displaying the name of the invention Control method 3, relationship with the case of the person making the amendment Patent applicant (307) Toshiba Corporation 4, agent February 26, 1985 7 - 2. 7. In the second line of page 12 of the statement of contents of the amendment [Figure 3 (a)]. (b)" should be corrected to read "Figure 3." -6′l

Claims (1)

[Claims] At least three plane memories are provided corresponding to the three primary colors and each has a capacity for one display screen, data is set for each line of the display screen, and line table information and plane selection and overlapping are provided. A control memory in which alignment instruction information is stored, and when in monochrome display mode, display data is obtained from an arbitrary plane for each line based on the line table information, plane selection, and overlay instruction information stored in the control memory, or from multiple planes. A display screen control method characterized by comprising a gate circuit that selects a logical operation output of display data obtained from a plane and outputs it to a display monitor, and performs screen switching and superimposed display on a line-by-line basis.