JPS6094527A - Rectangular pulse generator - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a noyals generator that generates a rectangular wave pulse whose noyals edge phase is controllable.

[Problems with conventional technology]

It is well known to convert analog signals into digital form by digitizing the analog signals in two successive conversion stages using dual-flash (series-parallel) analog-to-digital converters. In this analog-to-digital conversion method, a desired digital signal is obtained by combining the conversion of the digital output of the first conversion stage into an analog format. To compensate for the propagation delay of the first conversion stage and the digital-to-analog converter, the input analog signal is fed to the subtracter via a delay line. The digital outputs of the two conversion stages are
Since it is necessary to represent the level of the input analog signal (upper bits) and the level of the corresponding difference signal at the same time (lower bits), the analog signals are supplied to the converter via a sample and hold circuit. However, conventional sample and hold circuits have the disadvantage that they degrade analog signals intolerably in some applications. If the second conversion stage is clocked with a delay to the clock operation of the first conversion stage,
There is no need to use a Sansol hold circuit. in this case,
The delay of this clock signal must be equal to the delay due to the delay line, but the delay line can be adjusted or the phase of the clock edges can be adjusted to equalize these delays. However, 9' variable delay lines are generally much more expensive than fixed delay lines, and it is difficult to accurately scale variable delay lines.

High speed (above 10 MHz) circuits such as conventional high speed clock generators do not have accurate and stable voltage characteristics like borrowed frequency (below 10 kHz JJ) circuits. One problem resulting from this limitation in conventional high speed circuits is that they cannot accurately control and adjust the phase of the pulse edge of the clock signal generated by the high speed clock generator.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a rectangular wave generator that can accurately control and adjust the phase of pulse green.

[Means and Operations for Solving the Problems] The square wave pulse generator of the present invention comprises a series of voltage pulses having a leading edge and a trailing edge, at least one of which is generally sloped. It includes a circuit that generates a signal and a comparator. This comparator is supplied with this series of voltages i9 to its first input terminal, and its second input terminal is supplied with a DC voltage level corresponding to the DC voltage of the output pulse of the comparator and the variable DC voltage. Depending on whether the voltage level of the voltage pulse rises to this DC voltage level or not, a signal having one or two voltage levels is generated at the output. Therefore, this comparator generates at its output a repetitive rectangular wave signal whose transition, ie, the phase of at least one of the leading and trailing edges, depends on the DC voltage level.

〔Example〕

Hereinafter, the present invention will be specifically explained based on illustrated embodiments.

FIG. 1 is a circuit diagram showing a preferred embodiment of the present invention, and FIG. 2 is a waveform diagram for explaining its operation. The oscillator (10) generates a repetitive output signal (waveform (a) in Figure 2) whose frequency is stable because the frequency is determined by the interval between the zero points of the output waveform and the route intersections, but whose voltage waveform is unstable. .This oscillator Q
The output signal from O is connected to the non-inverting input terminal (+) of comparator α
The inverting input terminal of the comparator (6) is grounded. Therefore, the comparator cI produces a square wave output such that the /'P pulse falls midway between the )4 pulse rising edge and the multiple edge edge. In this specification, the term "square wave" means
When this waveform is displayed on a conventional oscilloscope, the voltage levels are represented by horizontal lines, since they represent a repeating wave that has two voltage levels and the transition between the two voltage levels is almost instantaneous. , transitions are represented by vertical lines. On the other hand, the term "square wave j" means a square wave with an impact coefficient (ratio of the period of one level to the total period of the waveform of one cycle...duty cycle) of 50%. Comparator (2) The output waveform of the comparator αa is shown as waveform (b) in FIG. The time constant of the low-pass filter αQ is determined by the comparator (6)
The half period of the square wave output signal is also very long. Therefore, the signal supplied to the non-inverting input terminal (→) of the comparator Q4 has a shape as shown in the waveform (c) in FIG. It has a limited slewrite. ,] A DC voltage (waveform (d) in FIG. 2) generated as described later is applied to the step change input ←) of the L-shape device 04. Therefore, as shown in the waveform (,) in Fig. 2, the impact coefficient of the output signal generated at the non-inverting output terminal of the comparator 04 is
determined according to the level of As shown in comparison with FIGS. 2A and 2B, the rising edge can change the phase of the string while the falling edge is multi-edge. In FIGS. 2A and 2B, the levels of the DC voltage signals (,l) are different.

Note that the circuits C1O, CI2, and 0Q constitute pulse generating means according to the present invention.

The DC signal supplied to the inverting input terminal (→) of comparator q4 is
Generated within Return Rogue. This feedback loop consists of low-pass filters Q and (A) connected to the inverting output terminal and non-inverting output terminal of comparator 0, respectively, and the low-pass filter Q and (A) connected to the inverting input terminal 0 and the non-inverting input terminal (→ It is equipped with an operational amplifier □□□ connected to θ→ and a wire, respectively.The inverting input terminal (→ to the potentiometer) of the amplifier is connected through a resistor (T). The value of this resistor (2) is also very large compared to the value of the resistor in the filter 6 and the wire.

The output terminal of the amplifier (c) is connected to the inverting input terminal (→) of the comparator α→.

The signal generated by the low-pass filter 0 and 0 is sent to the comparator a4.
Al at the DC level (average level) of each of the two output signals generated.

The DC level of each output signal generated by the comparator α◆ is determined according to the impulse coefficient of the signal generated at the non-inverting output terminal of the comparator α◆. Therefore, the effects of temperature and power supply voltage dependent variations in the output voltage level of the comparator can be removed by common mode rejection.

Since the level of the DC voltage supplied to the inverting input terminal (→) of the comparator Q4 can be shifted using a potentiometer,
The impulse coefficient of the non-inverted output signal from the comparator (14) can be adjusted. Since the resistance value of the resistor (G) is large, this resistor (C) acts as a current source. Therefore, the potentiometer (C) , does not have a large effect on the correction performed by the common mode removal action of the amplifier (A). Note that the circuit αe-
(C) is the DC voltage level generating means according to the present invention.

The illustrated square wave pulse generator can be used to generate clock pulse signals with clock edges (negative or positive) whose phase can be precisely controlled and adjusted. That is, by using a pulse generator of 4, it is possible to generate an accurately delayed clock pulse for the second conversion stage of a dual flash analog-to-digital converter. Further, the clock pulse for the first conversion stage is obtained from the output terminal of the comparator 0→.

The present invention can be modified in various ways without departing from the spirit thereof, and the embodiments described above are not intended to limit the present invention in any way. For example, generally all you need to do is change the green phase of one of the output signals of comparator a→, so comparator α→
It is not necessary that both edges of the signal applied to the non-inverting input terminal (g) of the signal be sloped.

〔Effect of the invention〕

As described above, according to the present invention, a voltage signal having at least one of the leading edge and the trailing edge is sloped is supplied to one input terminal of the comparator, and the DC voltage of the output square wave voltage signal of the comparator is Since the DC voltage level corresponding to the variable DC voltage is supplied to the other input terminal of the comparator, the phase of at least one of the front and trailing edges can be accurately maintained without being affected by fluctuations in temperature and power supply voltage. Controlled square wave pulses can be generated.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of a preferred embodiment of the present invention, and FIGS. 2A and 2B are waveform diagrams for explaining the operation of FIG. 1. In the figure, θ1. αL(+(? is)) (Lus generation means,
α◆ is a comparison means, and 0→~(A) is a DC voltage level generation means. Agent Sada Ito

Claims (1)

[Claims] A pulse generating means for generating a voltage noise having at least one of a substantially sloped leading edge and a trailing edge, a comparing means, a variable DC voltage, and a DC voltage level corresponding to the DC voltage of the output rectangular wave pulse of the comparing means. and a DC voltage level generating means, wherein the comparison means controls the phase of at least one of a leading edge and a trailing edge of the output rectangular wave A4 pulse in accordance with the voltage pulse and the DC voltage level. Features a square wave nolus generator.