JPS6092610A - Control method of quantity of boron diffused - Google Patents

Control method of quantity of boron diffused

Info

Publication number
JPS6092610A
JPS6092610A JP20053483A JP20053483A JPS6092610A JP S6092610 A JPS6092610 A JP S6092610A JP 20053483 A JP20053483 A JP 20053483A JP 20053483 A JP20053483 A JP 20053483A JP S6092610 A JPS6092610 A JP S6092610A
Authority
JP
Japan
Prior art keywords
boron
diffusion
glass layer
wafer
diffusion region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP20053483A
Other languages
Japanese (ja)
Other versions
JPH0228246B2 (en
Inventor
Takanori Hitomi
隆典 人見
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP20053483A priority Critical patent/JPS6092610A/en
Publication of JPS6092610A publication Critical patent/JPS6092610A/en
Publication of JPH0228246B2 publication Critical patent/JPH0228246B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Formation Of Insulating Films (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Bipolar Transistors (AREA)

Abstract

PURPOSE:To obtain a wafer, in which there are few crystal defects and in a diffusion region therein inequality is not generated, by using a poly-boron film (PBF) by changing over gases at a first step and a second step in an atmosphere in a diffusion furnace and controlling time at the first step. CONSTITUTION:A PBF5 is applied on a wafer 4 in which an SiO2 layer 2 is formed on an Si substrate 1. A quartz pipe 13 is put into a diffusion furnace 11, and N2 and O2 are forwarded, and the PBF layer 5 is burnt to form a boron glass layer 6. When a temperature is elevated to 900 deg.C, boron is diffused into the substrate 1 from the boron glass layer 6, and a boron diffusion region 7 is shaped. The generation of the inequality of projections at both ends of the bottom of the boron diffusion region 7 and an extent in the lateral direction is inhibited because said first process is executed for approximately 10min or 2hr and boron is supplied uniformly from the boron glass layer 6 in a short time. When a temperature is elevated to 1,100 deg.C and gases, etc. are changed over to O2 in a second process, diffustion from the boron glass layer 6 is stopped, and shifted to the extending diffusion only of the inside of the boron diffusion region 7.

Description

【発明の詳細な説明】 この発明は、半導体ウェハのボロン拡散量の制御方法、
特にポリボロンフィルム(PBF)を用いてボロンを拡
fI&する場合のボロン拡散量の制御方法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention provides a method for controlling the amount of boron diffused in a semiconductor wafer;
In particular, the present invention relates to a method of controlling the amount of boron diffusion when expanding fI& of boron using a polyboron film (PBF).

従来、トランジスタのベース拡散等を行うのに、ソース
としてBN(ボロンナイトライド)を使用していた。し
かしBNは熱容量が大きい等の原因から、形成されたウ
ェハに結晶欠陥が発生するという欠点があった。そこで
この欠点を解消するために、有機ポリマー内にボロンを
含んだP、BFをスピンオン法でウェハに塗布し、この
PBFが塗布されたウェハを拡散炉に入れて、窒素ガス
と微量の酸素ガス雰囲気中で加熱し、拡散する方法が試
みられている。
Conventionally, BN (boron nitride) has been used as a source for base diffusion of transistors. However, BN has a disadvantage in that crystal defects occur in the formed wafer due to its large heat capacity. Therefore, in order to eliminate this drawback, P and BF containing boron in an organic polymer were applied to the wafer using a spin-on method, and the wafer coated with this PBF was placed in a diffusion furnace, and nitrogen gas and a trace amount of oxygen were added to the wafer. A method of heating and diffusing in an atmosphere has been attempted.

しかしながらこの方法では、ボロンの拡散中は拡散量を
制御することが出来ず、ある所定の拡散量とするために
は、シート抵抗値が所定値になったらウェハを拡散炉か
ら取出さねばならなかった。
However, with this method, it is not possible to control the amount of boron diffusion during diffusion, and in order to achieve a certain amount of diffusion, the wafer must be removed from the diffusion furnace when the sheet resistance value reaches a certain value. Ta.

またPBFの塗布時に、ウェハのパターンの凹凸等のた
めに、拡散領域の上に膜厚のむらができ、そのまま拡散
を続けると拡散領域の底面両端に突起が出来たり、構法
がりが不均一になるという欠点があった。そのためこの
PBFによるボロン拡散量は、ベース拡散等、素子形成
には使用しにくいという問題があった。
Also, when applying PBF, unevenness in the wafer pattern causes uneven film thickness on the diffusion area, and if diffusion continues, protrusions will form on both ends of the bottom of the diffusion area and the construction will be uneven. There was a drawback. Therefore, there is a problem in that the amount of boron diffused by this PBF is difficult to use for element formation such as base diffusion.

この発明の目的は、PBFを用いて結晶欠陥の少ないも
のを得るとともに、拡散領域の底面両端に突起や、横広
がりの不均一の生じないウェハが得られ、その上シート
抵抗を容易に制御可能なボロン拡散量の制御方法を提供
することである。
The purpose of this invention is to use PBF to obtain a wafer with few crystal defects, without protrusions on both ends of the bottom surface of the diffusion region, and with no non-uniform lateral spread, and furthermore, the sheet resistance can be easily controlled. An object of the present invention is to provide a method for controlling the amount of boron diffusion.

上記目的を達成するために、この発明のボロン拡散量の
制御方法は、拡散炉内の雰囲気を第1の段階で、窒素ガ
スと微量の酸素ガスとし、第2の段階で酸化性のガスに
切替え、前記第1の段階の時間を制御することによりボ
ロンの拡散を制御するようにしている。
In order to achieve the above object, the method of controlling the boron diffusion amount of the present invention is to change the atmosphere in the diffusion furnace to nitrogen gas and a trace amount of oxygen gas in the first step, and to change it to oxidizing gas in the second step. The diffusion of boron is controlled by switching and controlling the time of the first stage.

以下、実施例により、この発明をさらに詳細に説明する
Hereinafter, the present invention will be explained in more detail with reference to Examples.

この発明の1実施例として、トランジスタのペース拡散
を行う場合を説明する。
As one embodiment of the present invention, a case will be described in which transistor pace diffusion is performed.

まず第1図(a)に示すように、シリコン(Si)基板
1上に二酸化シリコン(SiO2)12カ形成され、こ
の二酸化シリコン層2にベース開口3が設けられてなる
ウェハ4のパターン上に、第1図(b)に示すようにP
BF5を塗布する。
First, as shown in FIG. 1(a), 12 layers of silicon dioxide (SiO2) are formed on a silicon (Si) substrate 1, and a base opening 3 is formed in this silicon dioxide layer 2 on a pattern of a wafer 4. , as shown in Figure 1(b), P
Apply BF5.

この塗布はスピンオン法で行われる。This application is performed by a spin-on method.

ウェハ4を拡散炉に入れた状態を第2図に示している。FIG. 2 shows the state in which the wafer 4 is placed in the diffusion furnace.

第2図において、拡散炉11は加熱部12を有し、この
加熱部12に石英管13が挿入されるようになっており
、石英管13には、ボート】4上に数十枚のウェハ4が
立てて配置され収納されている。石英管13には、側方
より窒素ガスN2や酸素ガス02や水蒸気H2Qが供給
されるようになっており、また加熱部12は温度制御が
可能なように構成されている。もっともここに示した拡
散炉11自体は、すでによく知られたものである。
In FIG. 2, the diffusion furnace 11 has a heating section 12 into which a quartz tube 13 is inserted. 4 are arranged and stored vertically. The quartz tube 13 is supplied with nitrogen gas N2, oxygen gas 02, and water vapor H2Q from the side, and the heating section 12 is configured to be temperature controllable. However, the diffusion furnace 11 itself shown here is already well known.

拡散炉11に入れられたウェハ4は、第3図に示す順に
したがい、温度制御及びガス制御が行われる。
The wafer 4 placed in the diffusion furnace 11 is subjected to temperature control and gas control in accordance with the order shown in FIG.

拡散炉11内は、最初800℃に保たれており、この拡
散炉11内に石英管13が入れられ、石英管13に窒素
ガスN2と酸素ガス02が送られると、そのガス雰囲気
でウェハ4のPBF層5は燃焼して、第1図(C)に示
すように、ボロンガラス層6となる。
The inside of the diffusion furnace 11 is initially maintained at 800°C. When the quartz tube 13 is put into the diffusion furnace 11 and nitrogen gas N2 and oxygen gas 02 are sent to the quartz tube 13, the wafer 4 is heated in the gas atmosphere. The PBF layer 5 burns and becomes a boron glass layer 6 as shown in FIG. 1(C).

第1のプロセスprlでは、上記ガス雰囲気で温度をさ
らに加熱して800℃から900℃にすると、ボロンガ
ラス層6からシリコン基板1中にボロンが拡散していき
、ボロン拡散領域7が形成される。この第1のプロセス
prlは、約10分ないし2時間程度なされるが、この
時間によってボロン濃度が、したがってシート抵抗Rs
がコントロールされる。この時間を長くすればボロン濃
度が濃くなり、したがってシーI・抵抗Rsは小さくな
り、逆に時間を短くすればシート抵抗Rsは大となる。
In the first process prl, when the temperature is further heated from 800° C. to 900° C. in the above gas atmosphere, boron diffuses from the boron glass layer 6 into the silicon substrate 1, forming a boron diffusion region 7. . This first process prl is carried out for approximately 10 minutes to 2 hours, and during this time the boron concentration and therefore the sheet resistance Rs
is controlled. If this time is made longer, the boron concentration becomes higher and the sheet resistance Rs becomes smaller, and if the time is made shorter, the sheet resistance Rs becomes larger.

また、このプロセスprlの時間が小さい間は、ボロン
ガラスN6からのボロンの供給が均一であるために、ボ
ロン拡散領域7の底面も均一であり、また横広がりの不
均一も生じない。
Further, while the time of this process prl is short, since boron is supplied uniformly from the boron glass N6, the bottom surface of the boron diffusion region 7 is also uniform, and non-uniform lateral spread does not occur.

次に、第2のプロセスpr2で温度を1100℃に上昇
するとともに、ガスをN2+微量02から02に切替え
る。これによりボロンガラス層6からの拡散は停止し、
ボロン拡散領域7内のみの拡散が進行する。すなわぢ、
ガス雰囲気をN2 +02から02に切替えることによ
り、ボロンガラス層6からのエラー関数で表されるボロ
ンの拡散を打切り、ガウス分布で表される引き伸し拡散
に移る。
Next, in the second process pr2, the temperature is raised to 1100° C., and the gas is switched from N2 + trace amount 02 to 02. This stops the diffusion from the boron glass layer 6,
Diffusion progresses only within the boron diffusion region 7. Sunawaji,
By switching the gas atmosphere from N2+02 to 02, the diffusion of boron expressed by an error function from the boron glass layer 6 is terminated, and the process shifts to stretching diffusion expressed by a Gaussian distribution.

続いて、第3のプロセスでは温度は1100℃のままで
、石英管13内にN20を送り、ボロン拡散領域7上に
ボロン拡散のSiO2膜を形成し、高濃度ボロンガラス
の濃度を落とし、その影響をなくするようにしている。
Next, in the third process, the temperature remains at 1100°C, N20 is sent into the quartz tube 13, a boron-diffused SiO2 film is formed on the boron diffusion region 7, the concentration of the high concentration boron glass is reduced, and the I'm trying to eliminate the impact.

そしてプロセスpr4では、同温度でガスをN2 +0
2にもどして形成されたSiO2層のアニールを行って
いる。
And in process pr4, the gas is changed to N2 +0 at the same temperature.
The SiO2 layer formed after reverting to No. 2 is annealed.

なお、実施例における雰囲気ガスは、第1のプロセスで
窒素ガスN2、第2のプロセス以降で酸素ガス02+水
蒸気H20、水蒸気H20のみまたは窒素ガスN2+酸
素ガス02多量などが適用可能である。
As the atmospheric gas in the embodiment, nitrogen gas N2 may be used in the first process, and oxygen gas 02+water vapor H20, only water vapor H20, or nitrogen gas N2+a large amount of oxygen gas 02 may be used in the second and subsequent processes.

以上のように、この発明によれば、第1の段階でガス雰
囲気と窒素ガスと微量の酸素ガスとしてボロンガラス層
からのボロンの供給拡散を行い、第2の段階で酸化性の
ガスに切替えて、ボロンガラス層からのボロン供給を停
止し、ボリン拡散領域内の拡散のみにとどめ、そして第
1の段階の時間をIIIIIするものであるから、この
第1の段階から第2の段階への切替を適正に行うことに
より、拡散領域の底面の両端の突起の発生や積法がりの
不均一の発生を未然に抑えることができる。したがって
PBFのボロン拡散を素子の形成、たとえばベース拡散
に適用でき、結晶欠陥の発生が少ないというPBFの特
質を有効に利用した素子ウェハを得ることができる。ま
た任意の時間にボロンガラス層からのボロンの拡散を中
断できるので、シート抵抗の制御も簡単であり、そのバ
ラツキも小さくできる。
As described above, according to the present invention, in the first step, boron is supplied and diffused from the boron glass layer as a gas atmosphere, nitrogen gas, and a trace amount of oxygen gas, and in the second step, the gas is switched to an oxidizing gas. Then, the boron supply from the boron glass layer is stopped, and the diffusion is limited to the boron diffusion region, and the time of the first stage is increased to three times, so the transition from the first stage to the second stage is By appropriately performing the switching, it is possible to prevent the occurrence of protrusions on both ends of the bottom surface of the diffusion region and the occurrence of non-uniformity in the thickness. Therefore, boron diffusion in PBF can be applied to element formation, for example, base diffusion, and it is possible to obtain an element wafer that effectively utilizes the characteristic of PBF that fewer crystal defects occur. Furthermore, since the diffusion of boron from the boron glass layer can be interrupted at any time, the sheet resistance can be easily controlled and its variation can be reduced.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の1実施例の各段階におけるウェハの
断面図、第2図はこの発明の実施に使用される拡散炉を
示す図、第3図はこの発明の1実施例の各工程における
温度制御とガス制御の状態を示す図である。 1:シリコン基板、4:半導体ウェハ、5:ポリボロン
フィルム層、 11:拡散炉 特許出願人 ローム株式会社 代理人 弁理士 中 村 茂 信 第1図 第2図 第3図
Fig. 1 is a cross-sectional view of a wafer at each stage in an embodiment of the present invention, Fig. 2 is a diagram showing a diffusion furnace used in carrying out the invention, and Fig. 3 is a diagram showing each step in an embodiment of the invention. It is a figure showing the state of temperature control and gas control in . 1: Silicon substrate, 4: Semiconductor wafer, 5: Polyboron film layer, 11: Diffusion furnace Patent applicant: ROHM Co., Ltd. Agent, Patent attorney: Shin Nakamura Shigeru Nakamura Figure 1 Figure 2 Figure 3

Claims (1)

【特許請求の範囲】[Claims] (1)半導体ウェハ上にポリボロンフィルムを塗布し、
塗布後の半導体ウェハを拡散炉内に収納して加熱し、ボ
ロン拡散を行う場合のボロン拡散量の制御方法であって
、 前記拡散炉内の雰囲気を第1の段階で、窒素ガスと微量
の酸素ガスとし、第2の段階で酸化性のガスに切替え、
前記第1の段階の時間を制御することによりボロンの拡
散を制御するようにしたことを特徴とするボロン拡散量
の制御方法。
(1) Coating a polyboron film on a semiconductor wafer,
A method for controlling the amount of boron diffusion when a coated semiconductor wafer is housed in a diffusion furnace and heated to perform boron diffusion, the method comprising: controlling the atmosphere in the diffusion furnace in a first step by adding nitrogen gas and a small amount of nitrogen gas; Oxygen gas, then switched to oxidizing gas in the second stage,
A method for controlling the amount of boron diffusion, characterized in that boron diffusion is controlled by controlling the time of the first step.
JP20053483A 1983-10-26 1983-10-26 Control method of quantity of boron diffused Granted JPS6092610A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20053483A JPS6092610A (en) 1983-10-26 1983-10-26 Control method of quantity of boron diffused

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20053483A JPS6092610A (en) 1983-10-26 1983-10-26 Control method of quantity of boron diffused

Publications (2)

Publication Number Publication Date
JPS6092610A true JPS6092610A (en) 1985-05-24
JPH0228246B2 JPH0228246B2 (en) 1990-06-22

Family

ID=16425900

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20053483A Granted JPS6092610A (en) 1983-10-26 1983-10-26 Control method of quantity of boron diffused

Country Status (1)

Country Link
JP (1) JPS6092610A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62160718A (en) * 1986-01-08 1987-07-16 フィリップス エレクトロニクス ネムローゼ フェンノートシャップ Manufacture of semiconductor device by diffusing dopant intosemiconductor substance from oxide of the dopant
EP0472012A2 (en) * 1990-08-22 1992-02-26 Shin-Etsu Handotai Company Limited Method of boron diffusion into semiconductor wafers
US5753530A (en) * 1992-04-21 1998-05-19 Seiko Instruments, Inc. Impurity doping method with diffusion source of boron-silicide film
WO2013180244A1 (en) * 2012-05-31 2013-12-05 富士電機株式会社 Method for manufacturing semiconductor device
RU2594652C1 (en) * 2014-02-25 2016-08-20 Федеральное Государственное Бюджетное Образовательное Учреждение Высшего Профессионального Образования "Дагестанский Государственный Технический Университет" (Дгту) Production of power transistor gate area

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5674924A (en) * 1979-11-26 1981-06-20 Toshiba Corp Method of manufacturing semiconductor element
JPS58147113A (en) * 1982-02-11 1983-09-01 オ−エンス−イリノイ・インコ−ポレ−テツド Doped oxidized film and method of producing doped semiconductor

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5674924A (en) * 1979-11-26 1981-06-20 Toshiba Corp Method of manufacturing semiconductor element
JPS58147113A (en) * 1982-02-11 1983-09-01 オ−エンス−イリノイ・インコ−ポレ−テツド Doped oxidized film and method of producing doped semiconductor

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62160718A (en) * 1986-01-08 1987-07-16 フィリップス エレクトロニクス ネムローゼ フェンノートシャップ Manufacture of semiconductor device by diffusing dopant intosemiconductor substance from oxide of the dopant
EP0472012A2 (en) * 1990-08-22 1992-02-26 Shin-Etsu Handotai Company Limited Method of boron diffusion into semiconductor wafers
US5171708A (en) * 1990-08-22 1992-12-15 Shin-Etsu Handotai Co., Ltd. Method of boron diffusion into semiconductor wafers having reduced stacking faults
US5753530A (en) * 1992-04-21 1998-05-19 Seiko Instruments, Inc. Impurity doping method with diffusion source of boron-silicide film
WO2013180244A1 (en) * 2012-05-31 2013-12-05 富士電機株式会社 Method for manufacturing semiconductor device
JPWO2013180244A1 (en) * 2012-05-31 2016-01-21 富士電機株式会社 Manufacturing method of semiconductor device
US9450070B2 (en) 2012-05-31 2016-09-20 Fuji Electric Co., Ltd. Method for manufacturing a silicon semiconductor substrate including a diffusion layer prior to forming a semiconductor device thereon
RU2594652C1 (en) * 2014-02-25 2016-08-20 Федеральное Государственное Бюджетное Образовательное Учреждение Высшего Профессионального Образования "Дагестанский Государственный Технический Университет" (Дгту) Production of power transistor gate area

Also Published As

Publication number Publication date
JPH0228246B2 (en) 1990-06-22

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