JPS6091455A - Simulation system of logical circuit - Google Patents

Abstract

PURPOSE:To simplify the operation of a simulation system without increasing the load on a simulator by using an exclusive device which actuates individually and continuously various types of LSIs by an indication given from the simulator. CONSTITUTION:A simulator set on a host computer 1 receives the input data from outside for a logical circuit which performs simulation. Then the simulator extracts an element having varied input in response to the received input data and outputs both the identification code and the input pattern of the corresponding element to an exclusive device 3. This device 3 receives the data from a computer 1 through a drive control part 31 to select the element corresponding to the received identification code. At the same time, the device 3 feeds the received data pattern to a drive part 32, and sends the output data fed from the corresponding element back to the simulation on the computer 1.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a simulation method for digital logic circuits including large-scale integrated circuits (hereinafter referred to as LSIs).

(bl) Prior Art and Problems As a conventional logic simulation method, there are, for example, the following two methods. One of them is called the function-above method, in which the function of each logic element (especially LSI) is This is described above using symbols (language), and the simulator interprets and executes them.

Another method is a gate level expansion method in which each logic element is expanded into a gate level equivalent circuit and simulated.

However, the former method requires considerable skill to perform the functional description, and has the drawback that the number of man-hours required for the functional description is also large. Furthermore, there is also a concern that the scale of the simulator will increase. On the other hand, the latter method is more advantageous than the former in terms of the number of man-hours required for development at the gate level and the scale of the simulator. However, commercially available LSIs are often installed in logic circuits that perform simulations. This kind of LS
Generally, the gate-level equivalent circuit for 1 has not been published.

Therefore, in order to expand this type of LSI to the gate level, a new logic design must be performed based on the operational functions of the LSI, which has the drawback of requiring a large number of man-hours.

Tel Object of the Invention The object of the present invention is to eliminate the above-mentioned drawbacks of the conventional technology, and to provide a simulator that can be easily operated without increasing the load on the simulator, even for logic circuits including LSIs that are not easy to develop at the gate level. The purpose of this invention is to provide a simulation method for logic circuits that can be simulated.

ld) Structure of the Invention In order to achieve the above object, in the present invention, any method of processing a commercially available LSI using software in a simulation places a large burden on the simulator and operation and is not easy, so this method is processed using hardware. This year,
As an internal circuit or input/output device of the simulator's host computer, various L
A dedicated device that can operate each SI individually and continuously is provided, and by organically combining its control with software processing other than the LSI section, it is possible to simulate the entire circuit including the LSI. The present invention will be explained in detail below using Examples.

(el Embodiment of the Invention FIG. 1 is an explanatory diagram showing the principle of logic simulation of the invention, FIG. 2 is a diagram showing an embodiment of the invention, and FIG. 3 is an illustration of the dedicated device 3 shown in FIG. 2. FIG. 3 is a diagram showing a detailed configuration.

As shown in FIG. 1, in the present invention, each logic element LC1, Lc in a logic circuit 20 for which simulation
:lL, . . . are modeled in software using a gate-level equivalent circuit. However, as mentioned above, for integrated circuit LSIs for which gate level development is difficult, the corresponding LSI is actually operated.

In FIG. 2, 1 is a host computer that executes the above-mentioned software simulation, 2 is a signal line, and 3 is a dedicated device, which controls the drive section 32 and drive control section 31 that actually operate the above-mentioned LSI. Be prepared. That is, this embodiment shows an example in which the dedicated device 3 is implemented as an external device (input/output device) of the host computer 1. It is also assumed that the simulation method of the software simulator on the host computer 1 uses an event method.

Further, the LSI driven in the dedicated device 3 corresponds to the LSI included in the circuit to be simulated 20. The operation of the embodiment apparatus will be explained below.

First, the simulator of the host computer 1'' receives input data for the logic circuit 20 to be simulated from the outside.

The simulator takes out the element whose input has changed according to the received input data IN. For example, assume that the input (input) 1al changes. Then the simulator takes out element A and
It is determined whether element A is an LSI or not. In this case, since element A is not an LSI, calculations corresponding to the function of element A are performed using software, and the output value Oa is calculated. After that, it is determined whether or not this output value Oa has changed. If there is a change as a result of the determination, that is, the input value 1c of element C has changed, so the simulator takes out element C next. Here, since the element C is an LSI, the simulator outputs the identification code and input cover pattern Ic of the LSI to the dedicated device 3. The dedicated device 3 receives output data from the computer 1 at the drive control section 31 . Then, an LSI corresponding to the received identification code is selected, and the supported data pattern Ic is given to the driving section 32 to obtain output data Oc from the corresponding LSI. The obtained output data Oc is sent to the host computer 1 via the signal line 2.
It will be sent back to the simulator above. In response to this, the simulator performs event generation processing in the same way as each element developed at the gate level other than LSI.

As shown in FIG. 3, the dedicated device 3 includes an LSI 16. Input registers 15 provided corresponding to these LS116. Entering hippo sofa gate 14.
Decover Sofa Gate 17. and LSI equipped with a decoder
It consists of a drive section 32 and a drive control section 31. As described above, the drive control unit 31 receives the identification code and input data sent from the simulator on the host computer 1 via the signal line 2. Drive control section 31 supplies the received identification code to decoder 13 via signal 1118.

Next, the control unit 31 sends the received input data onto the bus 11, and also sends a clock signal for operating the input register 15 and an input/output buffer gate 14.1.
Input and output control signals for controlling 7 are supplied on signal lines 19 and 10, respectively.

In the driving section 32, the decoder 31 selects the LSI specified by the given identification code. This selection is performed in register 15. corresponding to the designated LSI. This is done by selectively driving the buffer gates 14 and 17.

As a result, the input data sent onto the bus 11 is input to the LSI selected by the decoder 13 at the timing created by each signal line 10.about.19. Furthermore, the output data of the LSI corresponding to this input data is the bus 11.
is read by the drive control section 31 via.

The data read by the drive control section 31 is then transmitted to the host computer 1 via the signal line 2. As already mentioned, the host combinator executes subsequent simulations using this received data.

As described above, according to this embodiment, extremely simple and accurate simulation is possible even for a logic circuit including an LSI with a delicate gate level expansion.

In the embodiment described above, the dedicated device for driving the LSI is realized as an external device of the host computer, but it can also be incorporated as an internal calculation circuit of the computer.

In this case, this can be achieved by setting a dedicated instruction for operating this internal arithmetic circuit. That is, the software simulator can perform event generation processing by executing the above instruction when an event reaches the LSI and reading the result set in an arithmetic register or the like. With such a configuration, the simulation speed can be further increased, and depending on the configuration of the embedded circuit, it is possible to perform a simulation that also takes into account the detailed operation timing of the LSI.

(fl) Effects of the Invention According to the present invention, in the simulation of a commercially available general-purpose LSI-equipped circuit, there is no need to define the functions of the LSI or create a gate-level equivalent circuit, and the number of man-hours required for simulation operation is greatly reduced.

Also, the simulator itself is simplified, making development easier.

[Brief explanation of drawings]

FIG. 1 is an explanatory diagram showing the principle of the simulation method of the present invention, FIG. 2 is a diagram showing an embodiment of the present invention, and FIG. 3 is a diagram showing the detailed configuration of the dedicated device 3 shown in FIG. 2. . 1 is a host computer, 2 is a signal line, 3 is a dedicated device, 31
3 represents a drive control section, and 32 represents an LSI drive section.

Claims (1)

[Claims] A device for simulating a logic circuit including a large-scale integrated circuit and a logic element, including a computer that simulates the operation of the logic element, and an operation that causes the large-scale integrated circuit to operate based on information provided by the computer. means, when the input data to the large-scale integrated circuit changes due to the simulated operation of the logic element by the computer, the input data is given to the operating means, and the large-scale integrated circuit is operated by the operating means according to the input data. A logic circuit simulation method characterized in that the operation results of are used as simulated operation results in a large-scale integrated circuit.