JPS6088552U - Packages such as IC - Google Patents
Packages such as ICInfo
- Publication number
- JPS6088552U JPS6088552U JP1983179962U JP17996283U JPS6088552U JP S6088552 U JPS6088552 U JP S6088552U JP 1983179962 U JP1983179962 U JP 1983179962U JP 17996283 U JP17996283 U JP 17996283U JP S6088552 U JPS6088552 U JP S6088552U
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- chip
- packages
- top surface
- base
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は本考案の一実施例の斜視図、第2図は第1図■
−■線における横断面図、第3図は製法を示す一部省略
展開斜視図、第4図は他の実施例の縦断面図である。
1・・・・・・リードフレーム、1d・・・・・・リー
ド、2・・・・・・チップ、4,14・・・・・・ベー
ス、5.15・・・・・・キャップ、5a・・・・・・
収納空間。Figure 1 is a perspective view of one embodiment of the present invention, and Figure 2 is the same as Figure 1.
3 is a partially omitted exploded perspective view showing the manufacturing method, and FIG. 4 is a longitudinal sectional view of another embodiment. 1... Lead frame, 1d... Lead, 2... Chip, 4, 14... Base, 5.15... Cap, 5a...
Storage space.
Claims (1)
れ各リードと接続されたICなどのチップと、上記リー
ドフレームの下面に位置するベースと、上記リードフレ
ームの上面に位置し上記チップを収納する収納空間を形
成してあり、上記ベースとともに上記リードフレームに
固定されるキャップとを設けたICなどのパッケージ。A lead frame, a chip such as an IC fixed on the top surface of the lead frame and connected to each lead, a base located on the bottom surface of the lead frame, and a storage space located on the top surface of the lead frame for storing the chip. A package for an IC or the like, which has a base and a cap fixed to the lead frame.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1983179962U JPS6088552U (en) | 1983-11-21 | 1983-11-21 | Packages such as IC |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1983179962U JPS6088552U (en) | 1983-11-21 | 1983-11-21 | Packages such as IC |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6088552U true JPS6088552U (en) | 1985-06-18 |
Family
ID=30390324
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1983179962U Pending JPS6088552U (en) | 1983-11-21 | 1983-11-21 | Packages such as IC |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6088552U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62252154A (en) * | 1986-04-24 | 1987-11-02 | Shinko Electric Ind Co Ltd | Semiconductor package |
-
1983
- 1983-11-21 JP JP1983179962U patent/JPS6088552U/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62252154A (en) * | 1986-04-24 | 1987-11-02 | Shinko Electric Ind Co Ltd | Semiconductor package |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS6088552U (en) | Packages such as IC | |
JPS6033068U (en) | blister packaging | |
JPS60144233U (en) | Semiconductor pellet packaging box | |
JPS5820599U (en) | electronic parts storage container | |
JPS58111997U (en) | Carrier tape for chip parts | |
JPS6127249U (en) | integrated circuit package | |
JPS6015490U (en) | solder paste packaging | |
JPS6076098U (en) | Conductive tray for storing semiconductor integrated circuit devices | |
JPS583042U (en) | IC package | |
JPS60101737U (en) | IC container tray | |
JPS5849776U (en) | packaging tools | |
JPS5996131U (en) | packaging box | |
JPS59109149U (en) | Package for semiconductors | |
JPS619858U (en) | semiconductor IC | |
JPS59172137U (en) | packaging containers | |
JPS60151137U (en) | Chippukiyariya | |
JPS5894685U (en) | refrigerator packaging equipment | |
JPS6112298U (en) | Tray for semiconductor devices | |
JPS5872844U (en) | LSI package | |
JPS5821987U (en) | LSI socket for leadless package | |
JPS6127258U (en) | semiconductor equipment | |
JPS5974727U (en) | Semiconductor device tray | |
JPS60179045U (en) | Chip carrier type element | |
JPS58158467U (en) | electronic components | |
JPS60113632U (en) | Lead frame storage magazine for semiconductor devices |