JPS6088552U - Packages such as IC - Google Patents

Packages such as IC

Info

Publication number
JPS6088552U
JPS6088552U JP1983179962U JP17996283U JPS6088552U JP S6088552 U JPS6088552 U JP S6088552U JP 1983179962 U JP1983179962 U JP 1983179962U JP 17996283 U JP17996283 U JP 17996283U JP S6088552 U JPS6088552 U JP S6088552U
Authority
JP
Japan
Prior art keywords
lead frame
chip
packages
top surface
base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1983179962U
Other languages
Japanese (ja)
Inventor
昌弘 中村
Original Assignee
株式会社精工舎
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社精工舎 filed Critical 株式会社精工舎
Priority to JP1983179962U priority Critical patent/JPS6088552U/en
Publication of JPS6088552U publication Critical patent/JPS6088552U/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の一実施例の斜視図、第２図は第１図■
−■線における横断面図、第３図は製法を示す一部省略
展開斜視図、第４図は他の実施例の縦断面図である。 １・・・・・・リードフレーム、１ｄ・・・・・・リー
ド、２・・・・・・チップ、４，１４・・・・・・ベー
ス、５．１５・・・・・・キャップ、５ａ・・・・・・
収納空間。Figure 1 is a perspective view of one embodiment of the present invention, and Figure 2 is the same as Figure 1.
3 is a partially omitted exploded perspective view showing the manufacturing method, and FIG. 4 is a longitudinal sectional view of another embodiment. 1... Lead frame, 1d... Lead, 2... Chip, 4, 14... Base, 5.15... Cap, 5a...
Storage space.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] リードフレームと、このリードフレームの上面に固着さ
れ各リードと接続されたＩＣなどのチップと、上記リー
ドフレームの下面に位置するベースと、上記リードフレ
ームの上面に位置し上記チップを収納する収納空間を形
成してあり、上記ベースとともに上記リードフレームに
固定されるキャップとを設けたＩＣなどのパッケージ。A lead frame, a chip such as an IC fixed on the top surface of the lead frame and connected to each lead, a base located on the bottom surface of the lead frame, and a storage space located on the top surface of the lead frame for storing the chip. A package for an IC or the like, which has a base and a cap fixed to the lead frame.
JP1983179962U 1983-11-21 1983-11-21 Packages such as IC Pending JPS6088552U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1983179962U JPS6088552U (en) 1983-11-21 1983-11-21 Packages such as IC

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1983179962U JPS6088552U (en) 1983-11-21 1983-11-21 Packages such as IC

Publications (1)

Publication Number Publication Date
JPS6088552U true JPS6088552U (en) 1985-06-18

Family

ID=30390324

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1983179962U Pending JPS6088552U (en) 1983-11-21 1983-11-21 Packages such as IC

Country Status (1)

Country Link
JP (1) JPS6088552U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62252154A (en) * 1986-04-24 1987-11-02 Shinko Electric Ind Co Ltd Semiconductor package

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62252154A (en) * 1986-04-24 1987-11-02 Shinko Electric Ind Co Ltd Semiconductor package

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