JPS6076098U - Conductive tray for storing semiconductor integrated circuit devices - Google Patents

Conductive tray for storing semiconductor integrated circuit devices

Info

Publication number
JPS6076098U
JPS6076098U JP16905883U JP16905883U JPS6076098U JP S6076098 U JPS6076098 U JP S6076098U JP 16905883 U JP16905883 U JP 16905883U JP 16905883 U JP16905883 U JP 16905883U JP S6076098 U JPS6076098 U JP S6076098U
Authority
JP
Japan
Prior art keywords
integrated circuit
semiconductor integrated
circuit devices
conductive tray
storing semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16905883U
Other languages
Japanese (ja)
Other versions
JPH0333670Y2 (en
Inventor
健司 鍋田
花原 勇
Original Assignee
電気化学工業株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 電気化学工業株式会社 filed Critical 電気化学工業株式会社
Priority to JP16905883U priority Critical patent/JPS6076098U/en
Publication of JPS6076098U publication Critical patent/JPS6076098U/en
Application granted granted Critical
Publication of JPH0333670Y2 publication Critical patent/JPH0333670Y2/ja
Granted legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、Icを収納する従来の導電性トレーの平面図
であり、第2図は、その断面図、第3図は、本考案の実
施例の平面図、第4図A及びBは、その断面図である。 符号1・・・導電性トレー、2・・・底面、3・・・収
納′壁、4・・・収納壁側面、5・・・突起物、6・・
・金属リード、7・・・半導体集積回路装置(Ic)。
FIG. 1 is a plan view of a conventional conductive tray for storing ICs, FIG. 2 is a sectional view thereof, FIG. 3 is a plan view of an embodiment of the present invention, and FIGS. 4A and B are , is a sectional view thereof. Code 1...Conductive tray, 2...Bottom surface, 3...Storage wall, 4...Storage wall side surface, 5...Protrusion, 6...
- Metal lead, 7... semiconductor integrated circuit device (Ic).

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] フラットタイプの半導体集積回路装置を収納する導電性
トレーにおいて、該トレー1の底面2に突起物5を設け
、しかも該突起物5の高さが、半導体集積回路装置7よ
り配設する金属リード6と前記半導体集積回路装置7の
底部との空間部高さより低いことを特徴とする半導体集
積回路装置収納用導電性トレー。
In a conductive tray for storing a flat type semiconductor integrated circuit device, a protrusion 5 is provided on the bottom surface 2 of the tray 1, and the height of the protrusion 5 is higher than that of the metal lead 6 disposed from the semiconductor integrated circuit device 7. A conductive tray for storing a semiconductor integrated circuit device, characterized in that the height of the space is lower than that of the bottom of the semiconductor integrated circuit device 7.
JP16905883U 1983-10-31 1983-10-31 Conductive tray for storing semiconductor integrated circuit devices Granted JPS6076098U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16905883U JPS6076098U (en) 1983-10-31 1983-10-31 Conductive tray for storing semiconductor integrated circuit devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16905883U JPS6076098U (en) 1983-10-31 1983-10-31 Conductive tray for storing semiconductor integrated circuit devices

Publications (2)

Publication Number Publication Date
JPS6076098U true JPS6076098U (en) 1985-05-28
JPH0333670Y2 JPH0333670Y2 (en) 1991-07-17

Family

ID=30369428

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16905883U Granted JPS6076098U (en) 1983-10-31 1983-10-31 Conductive tray for storing semiconductor integrated circuit devices

Country Status (1)

Country Link
JP (1) JPS6076098U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6099881A (en) * 1983-11-07 1985-06-03 松下電器産業株式会社 Carrier for flat type ic package
JPH0251237A (en) * 1988-08-12 1990-02-21 Yamamoto Hoso Shoji:Kk Aging method for ic chip and ic chip

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55181398U (en) * 1979-06-15 1980-12-26
JPS5636150U (en) * 1979-08-30 1981-04-07

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5495627A (en) * 1978-01-12 1979-07-28 Sanyo Kokusaku Pulp Co Mixing agent for mortarrconcrete and method of making same

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55181398U (en) * 1979-06-15 1980-12-26
JPS5636150U (en) * 1979-08-30 1981-04-07

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6099881A (en) * 1983-11-07 1985-06-03 松下電器産業株式会社 Carrier for flat type ic package
JPH0251237A (en) * 1988-08-12 1990-02-21 Yamamoto Hoso Shoji:Kk Aging method for ic chip and ic chip

Also Published As

Publication number Publication date
JPH0333670Y2 (en) 1991-07-17

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