JPS607149A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS607149A
JPS607149A JP11380683A JP11380683A JPS607149A JP S607149 A JPS607149 A JP S607149A JP 11380683 A JP11380683 A JP 11380683A JP 11380683 A JP11380683 A JP 11380683A JP S607149 A JPS607149 A JP S607149A
Authority
JP
Grant status
Application
Patent type
Prior art keywords
wiring
formed
elements
hole
functional elements
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11380683A
Inventor
Tadayoshi Enomoto
Masaaki Yasumoto
Original Assignee
Nec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

Links

Abstract

PURPOSE:To implement longitudinal wiring, by providing a deep hole or a through hole, which is deeper than functional elements or the wirings, at a part where the functional elements or the wiring is not formed, on a semiconductor substrate, in the surface of which the functional elements and the wiring are formed. CONSTITUTION:In the surface of a semiconductor substrate 1, functional elements 5, 6 and 6' are formed. A deep hole 2 or a through hole, which is deeper than the elements 5, 6 and 6' are provided at a part other than the elements. An insulating wall 9 is formed on the hole 2. Then a conductive material 8 is formed at least on the film 9. By using a conductive material, a flat wiring 10, which connects the elements 5, 6 and 6' and a longitudinal wiring or between said elements and other functional elements, is formed. Since the hole 2, wherein metal for wiring is embedded, is provided on the substrate 1, the longitudinal wiring, which electrically connects both surfaces of the semiconductor substrate or electrically connects the layers, can be provided.
JP11380683A 1983-06-24 1983-06-24 Manufacture of semiconductor device Pending JPS607149A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11380683A JPS607149A (en) 1983-06-24 1983-06-24 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11380683A JPS607149A (en) 1983-06-24 1983-06-24 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS607149A true true JPS607149A (en) 1985-01-14

Family

ID=14621530

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11380683A Pending JPS607149A (en) 1983-06-24 1983-06-24 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS607149A (en)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62219954A (en) * 1986-03-20 1987-09-28 Fujitsu Ltd Manufacture of three-dimensional ic
JPS62272556A (en) * 1986-05-20 1987-11-26 Fujitsu Ltd Three-dimensional semiconductor integrated circuit device and manufacture thereof
WO1998019337A1 (en) 1996-10-29 1998-05-07 Trusi Technologies, Llc Integrated circuits and methods for their fabrication
WO2003079430A1 (en) * 2002-03-19 2003-09-25 Seiko Epson Corporation Semiconductor device and its manufacturing method, circuit board and electronic apparatus
WO2003079431A1 (en) * 2002-03-19 2003-09-25 Seiko Epson Corporation Semiconductor device and its manufacturing method, circuit board, and electric apparatus
US6882030B2 (en) 1996-10-29 2005-04-19 Tru-Si Technologies, Inc. Integrated circuit structures with a conductor formed in a through hole in a semiconductor substrate and protruding from a surface of the substrate
WO2006019156A1 (en) * 2004-08-20 2006-02-23 Zycube Co., Ltd. Method for manufacturing semiconductor device having three-dimensional multilayer structure
JP2006173637A (en) * 2004-12-17 2006-06-29 Interuniv Micro Electronica Centrum Vzw Formation of deep via-airgap for interconnecting three-dimensional wafer to wafer
US7335517B2 (en) 1996-12-02 2008-02-26 Kabushiki Kaisha Toshiba Multichip semiconductor device, chip therefor and method of formation thereof
EP1387401A3 (en) * 1996-10-29 2008-12-10 Tru-Si Technologies Inc. Integrated circuits and methods for their fabrication
US7528476B2 (en) 2004-12-21 2009-05-05 Seiko Epson Corporation Semiconductor device, method for manufacturing semiconductor device, circuit board, and electronic instrument

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57113267A (en) * 1980-11-19 1982-07-14 Ibm Method of producing semiconductor device
JPS57145367A (en) * 1981-03-03 1982-09-08 Mitsubishi Electric Corp Three-dimensional semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57113267A (en) * 1980-11-19 1982-07-14 Ibm Method of producing semiconductor device
JPS57145367A (en) * 1981-03-03 1982-09-08 Mitsubishi Electric Corp Three-dimensional semiconductor device

Cited By (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62219954A (en) * 1986-03-20 1987-09-28 Fujitsu Ltd Manufacture of three-dimensional ic
JPH0374508B2 (en) * 1986-03-20 1991-11-27
JPS62272556A (en) * 1986-05-20 1987-11-26 Fujitsu Ltd Three-dimensional semiconductor integrated circuit device and manufacture thereof
WO1998019337A1 (en) 1996-10-29 1998-05-07 Trusi Technologies, Llc Integrated circuits and methods for their fabrication
EP0948808A1 (en) * 1996-10-29 1999-10-13 Trusi Technologies, Llc Integrated circuits and methods for their fabrication
EP1503406A3 (en) * 1996-10-29 2009-07-08 Tru-Si Technologies, Inc. Back-side contact pads of a semiconductor chip
EP2270845A3 (en) * 1996-10-29 2013-04-03 Invensas Corporation Integrated circuits and methods for their fabrication
US6639303B2 (en) 1996-10-29 2003-10-28 Tru-Si Technolgies, Inc. Integrated circuits and methods for their fabrication
EP1387401A3 (en) * 1996-10-29 2008-12-10 Tru-Si Technologies Inc. Integrated circuits and methods for their fabrication
US6882030B2 (en) 1996-10-29 2005-04-19 Tru-Si Technologies, Inc. Integrated circuit structures with a conductor formed in a through hole in a semiconductor substrate and protruding from a surface of the substrate
EP2270846A3 (en) * 1996-10-29 2011-12-21 ALLVIA, Inc. Integrated circuits and methods for their fabrication
US8283755B2 (en) 1996-12-02 2012-10-09 Kabushiki Kaisha Toshiba Multichip semiconductor device, chip therefor and method of formation thereof
US7335517B2 (en) 1996-12-02 2008-02-26 Kabushiki Kaisha Toshiba Multichip semiconductor device, chip therefor and method of formation thereof
US8174093B2 (en) 1996-12-02 2012-05-08 Kabushiki Kaisha Toshiba Multichip semiconductor device, chip therefor and method of formation thereof
US7829975B2 (en) 1996-12-02 2010-11-09 Kabushiki Kaisha Toshiba Multichip semiconductor device, chip therefor and method of formation thereof
US7029937B2 (en) 2002-03-19 2006-04-18 Seiko Epson Corporation Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument
US6841849B2 (en) 2002-03-19 2005-01-11 Seiko Epson Corporation Semiconductor device and method of manufacturing the same, circuit board and electronic instrument
WO2003079431A1 (en) * 2002-03-19 2003-09-25 Seiko Epson Corporation Semiconductor device and its manufacturing method, circuit board, and electric apparatus
WO2003079430A1 (en) * 2002-03-19 2003-09-25 Seiko Epson Corporation Semiconductor device and its manufacturing method, circuit board and electronic apparatus
JP5354765B2 (en) * 2004-08-20 2013-11-27 カミヤチョウ アイピー ホールディングス The method of manufacturing a semiconductor device having a three-dimensional stacked structure
US7906363B2 (en) 2004-08-20 2011-03-15 Zycube Co., Ltd. Method of fabricating semiconductor device having three-dimensional stacked structure
JPWO2006019156A1 (en) * 2004-08-20 2008-05-08 株式会社ザイキューブ The method of manufacturing a semiconductor device having a three-dimensional stacked structure
WO2006019156A1 (en) * 2004-08-20 2006-02-23 Zycube Co., Ltd. Method for manufacturing semiconductor device having three-dimensional multilayer structure
JP2006173637A (en) * 2004-12-17 2006-06-29 Interuniv Micro Electronica Centrum Vzw Formation of deep via-airgap for interconnecting three-dimensional wafer to wafer
US7528476B2 (en) 2004-12-21 2009-05-05 Seiko Epson Corporation Semiconductor device, method for manufacturing semiconductor device, circuit board, and electronic instrument

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