JPS6070783A - 発光ダイオ−ド表示装置 - Google Patents

発光ダイオ−ド表示装置

Info

Publication number
JPS6070783A
JPS6070783A JP58181708A JP18170883A JPS6070783A JP S6070783 A JPS6070783 A JP S6070783A JP 58181708 A JP58181708 A JP 58181708A JP 18170883 A JP18170883 A JP 18170883A JP S6070783 A JPS6070783 A JP S6070783A
Authority
JP
Japan
Prior art keywords
emitting diode
light
diode element
light emitting
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58181708A
Other languages
English (en)
Other versions
JPH0158874B2 (ja
Inventor
Yoshizo Mihashi
三橋 由蔵
Masataka Miyata
正高 宮田
Masanao Koba
木場 正直
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP58181708A priority Critical patent/JPS6070783A/ja
Publication of JPS6070783A publication Critical patent/JPS6070783A/ja
Publication of JPH0158874B2 publication Critical patent/JPH0158874B2/ja
Granted legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0756Stacked arrangements of devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124Aluminium (Al) as principal constituent
    • HELECTRICITY
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48257Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49113Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12041LED
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Led Device Packages (AREA)
  • Led Devices (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 く技術分野〉 本発明は発光ダイオード素子と、この素子の駆動用IC
とを一体的にモールドした構造の発光ダイオード装置に
関する。
〈発明の背景〉 発光ダイオード装置に特別な機能を付加するた1に駆動
用ICを一つの樹脂内に一体化することが検討されてい
る。例えば、バッテリーチェッカと称し、発光ダイオー
ド素子の印加電圧が一定の範囲内にあるときだけ、発光
ダイオード素子が点灯するICが使用される。このIC
の回路図は第1図に示す通りである。
SCは3個の端子を有し、第1端子lは電源の子端子に
接続され、第2端子2は出力端子で、第1端子lと第2
端子2間に発光ダイオード素子30が接続される。第3
端子3は電源の一端子に接続され、第1端子1と第3端
子3間に電源が接続される。第1端子Iと第3端子3間
に電源電圧を検出するため、2つの抵抗4と5が直列接
続されて、その接続点が2つの比較器6と7の+側入力
端子に加えられる。電源の両端子1,3間に2つの基準
電圧を作るため、2つの基準電圧素子8と9が接続され
る。この素子8,9はツェナーダイオードやPN接合の
順方向降下電圧を利用する回路で構成される。素子8の
基準電圧は比較器6の一側端子に加えられる。素子9の
基準電圧は比較器7の一側端子に加えられる。比較器8
と9の出力はインバータ10.11と12を介してフリ
ップフロップを構成する2つのナントゲート13.14
のセット端子とリセット端子にそれぞれ加えられる。ナ
ントゲート14の出力はインバー%15’(i=介し出
力トランジスタ16のゲートに加えられる。
トランジスタ16は限流抵抗17を経て第2端子2に接
続される。
従って、電源電圧が16ボルトから10ボルトの間を変
化し、基準電圧素子8は検出電圧が315ボルト、素子
9は検出電圧が30ボルトに設定されていたとすると、
電源電圧が充分高い場合、比較器6,7はともにHig
hレベル出力となり、ナントゲート13.14が構成す
るフリップフロップの出力けHi g hレベルであり
、トランジスタ16はオフ状態にあり1発光ダイオード
素子30は不灯状態である。次に電源電圧が少し低下し
て基準電圧素子8の検出電圧以下に低下した場合、比較
器6はLowレベル出力となり、インバータ10゜11
を通してナントゲートI3に加えられる。し会しナント
ゲート14の出力を変化させることができないので、ト
ランジスタ16のオフは続き、発光ダイオード30は不
灯のままである。更に電圧が低下すると、比較器7の出
力もLowとなり、これがインバータ]2を介して加え
られるのでナントゲート14の出力t Lowレベルに
変化させ、トランジスタ+6iオンにするので発光ダイ
オード30は点灯する。以上の動作を第2図に示す。
第1図のICid1mJ以下の面積に構成することが可
能で、発光ダイオード素子をマウントするリードフレー
ムにマウントすることができる。
〈発明の目的〉 本発明は上述のような回路を組込んだICチップが発光
ダイオードチップに比較して同様に小さい形状に形成し
得ることに鑑み、発光ダイオード金駆動するICを一体
的にモールドして、来示装置の小型化を図り経済性を高
めた表示装置を提供する。
〈実施例〉 本発明のIC内蔵発光ダイオード装置の構成図面全第3
図に示す。
リードフレームは3本足で構成されており、中央のリー
ド片3Iは幅広に形成されている。この幅広部分の中央
部は、リードフレームを作る際に凹部36が形成されて
いる。リード片31の頂部に周知の方法で発光ダイオー
ド素子30がマウントされ、そしてAlワイヤ32が発
光ダイオード素子30の電極とリード片33間にボンデ
ィングされる。上記凹部36の中にIC40がマウント
される。IC40の第1端子I1、第2端子2、第3端
子3、はそれぞれリード片33,81,34にそれぞ汎
ワイヤボンディングされる。I C40fl黒色樹脂3
5で封止される。発光ダイオード素子30は赤外発光を
するので、暗赤色樹脂37で発光ダイオード素子30と
IC40iモールドする。
このように、本発明(は発光ダイオード素子30をリー
ドフレームの頂部にマウントし、IC’40をリードフ
レームの側面にマウント口・、たから、IC40は発光
ダイオード素子30の自発□光による光の影響を受ける
ことがない。捷た赤色発光ダイオード素子30に対し暗
赤色樹脂でモールドしたから、発光ダイオード素子30
の発光は透過させ、且つ外部光がIC40に照射される
のを防止する。
暗赤色樹脂の光透過特性は第4図に示す通りである。ま
たI C4,0はリードフレームに凹部36を形成し、
この凹部36の中にマウントし、更に黒色樹脂で封止し
たから外部光の影響を除くことができる。また上記実施
例は発光ダイオード装置の外形を全く変化させることな
くrcを一体にモールドすることができる。以上のよう
にして発光ダイオード素子とその駆動ICを一体的にモ
ールドして使用することができる。
〈効 果〉 以上本発明によれば、発光ダイオードの発光にほとんど
影響されることなくICを発光ダイオードと共に樹脂封
止することができ、IC内蔵の発光ダイオードを得るこ
とができ、発光ダイオードの用途を著しく拡大すること
ができる。
図、第2図は同バッテリチェッカ回路の動作ケ説明する
ためのタイムチャート、第3図は本発明による一実施例
を示す側面図、第4図は同実施例のモールド樹脂の光透
過特性を示す図である。

Claims (1)

    【特許請求の範囲】
  1. 1、 発光ダイオード素子ヲリードフレーム頂部にマウ
    ントし、上記リードフレームの側面に凹部を形成し、上
    記凹部に上記発光ダイオード素子の駆動用ICiマウン
    ドし、上記ICを黒色樹脂で封止し、上記発光ダイオー
    ド素子、上記リードフレーム先端部及び上記ICt上記
    発光ダ
JP58181708A 1983-09-27 1983-09-27 発光ダイオ−ド表示装置 Granted JPS6070783A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58181708A JPS6070783A (ja) 1983-09-27 1983-09-27 発光ダイオ−ド表示装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58181708A JPS6070783A (ja) 1983-09-27 1983-09-27 発光ダイオ−ド表示装置

Publications (2)

Publication Number Publication Date
JPS6070783A true JPS6070783A (ja) 1985-04-22
JPH0158874B2 JPH0158874B2 (ja) 1989-12-13

Family

ID=16105466

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58181708A Granted JPS6070783A (ja) 1983-09-27 1983-09-27 発光ダイオ−ド表示装置

Country Status (1)

Country Link
JP (1) JPS6070783A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7473014B2 (en) * 2002-07-17 2009-01-06 Sharp Kabushiki Kaisha Light emitting diode lamp and light emitting diode display unit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51137268U (ja) * 1975-04-28 1976-11-05
JPS51162670U (ja) * 1975-06-18 1976-12-24

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51137268U (ja) * 1975-04-28 1976-11-05
JPS51162670U (ja) * 1975-06-18 1976-12-24

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7473014B2 (en) * 2002-07-17 2009-01-06 Sharp Kabushiki Kaisha Light emitting diode lamp and light emitting diode display unit

Also Published As

Publication number Publication date
JPH0158874B2 (ja) 1989-12-13

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