JPS6070734A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS6070734A
JPS6070734A JP58176921A JP17692183A JPS6070734A JP S6070734 A JPS6070734 A JP S6070734A JP 58176921 A JP58176921 A JP 58176921A JP 17692183 A JP17692183 A JP 17692183A JP S6070734 A JPS6070734 A JP S6070734A
Authority
JP
Japan
Prior art keywords
beryllia
substrate
transistor
semiconductor wafer
solder material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58176921A
Other languages
English (en)
Inventor
Kyoichi Ishii
恭一 石井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58176921A priority Critical patent/JPS6070734A/ja
Publication of JPS6070734A publication Critical patent/JPS6070734A/ja
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 発明の技術分野 本発明は高周波高出力SL バイポーラトランジスタに
関し、詳しくはべりリア絶縁基板を予じめトランジスタ
チップに接着し、そのベリリア片とトランジスタチップ
が一体と7r−)たものヲハッケージ内(;固着載置し
ん構造に関するものである。
従来技術と間聰点 従来高周波高出力トランジスタは下記のような理由によ
り熱伝導性の良好な絶縁基板であるベリリア基板からな
るパッケージに収容されている。
1)トランジスタチップは大きなコレクタ電流が均一に
流れやすいように半導体基板をコレクタ領域にし、チッ
ソの背面にコレクタ電極を設置する0 2)トランジスタテップとパッケージとの@械的接着保
持はチップ背面においt、金−シリコン等のロー材によ
り実施され1いる。コレクタの電気的接続も大部分はこ
こで兼ね1いる。
3)トランジスタチップ内で発生1−る熱を効果的(二
放散するためチップ背面から熱を放熱器へ伝導放熱する
4)高周波特性をできるだけ劣化させず、かつ回路への
実装性が好都合であるためシニ、トランジスタチップの
コレクタ電極と放熱器(接地電極と兼用し工いる場合が
多い)は電気的に絶縁され゛〔いる。
即ち接地電極を兼ねた金属放熱フランジの上Cニベリリ
ア基板な載置し、そのべIJ IJ了基板の上表面I:
必要なメタライズを施し、そのメタライズノくターンに
半導体チップを固着し、コレクタ電極と接続させ、さら
(二接他電極を兼ねた放熱フランジから絶縁されたもの
となっている。
このようなベリリアを使用し1こ高周波高出力トランジ
スタ用のパッケージはべりリアの材料費及び構造の複雑
なこと等の点で高価6ユなるという問題があったO 発明の目的 本発明の目的は前記問題点を解決するため(−ベリリア
絶絃基板牙あらかじめトランジスタチップに接層し工お
いて、そのベリリア片とトランジスタチッソとか一体6
:なり1こものi〕くツケージ内C:固着載置した構造
体を提案−づ−ることである。
発明の構成 本発明は半導体装置において、半導体ウェーッ・をメタ
ライズされたベリリア薄板に低融点ロー利を用いて溶融
接着させた後、この二層構造体を格子状に切断し、ベリ
リア基板付トランジスタチップとし、このベレット半導
体収容パッケージに固着載置せしめるよう(二したもの
である0即ち本発明は一つの主表面上に所定の機能が作
り込まれた半導体ウェーッ・のもう一つの主表面金メタ
ライズし、このウェーッ)をメタライズされたベリリア
薄板上に低融点ロー材によ−1接着張り合せた後、この
二層構造体を格子状に切断して個個の半導体装置ベレッ
トとし、前記ベレーyトf:半導体収容パッケージ又は
ノ・イブリット集積装置の放熱もしくは接地用金属基台
上により低い作梨温度で固着載置せしめた半導体装置を
提供する0以下本発明の構成及び実施例を第1図〜第3
図ζ二もとづいて説明する0 本発明におい1多数個のトランシフタパターンからなる
ウェーッーの製造は通常の技術により行われる。しかし
ながら本発明のトランシフタチップのコレクタ電極は、
一般的には半導体基板の背面に設けられているのに対し
1、基板の表面側に形成される。このコレクタ電極と外
部リードとの接続はワイヤボンディングにより行なうこ
とができる。即ちコレクタのボンディング用のパッドも
エミッタ及ヒベースのポンディングパッドと同様にチッ
プの表面上に設けることができる。ここでそれらの設計
技術及びウェーハ処理技術は通常知られた技術で適用さ
れ得る。特に注意すべきことは基板上に高周波でかつ大
電流が損失なく均一に流れるような構造並びにコレクタ
配線電極及びボ:/ディングパッドを形成することであ
る。このように半導体ウェーハfニホトエッチング、拡
散、蒸着技術等により多数個のトランジスタパターンを
形成せしめた後、トランジスタパターンのある面とは反
対側の面から半導体基板をラッピング又はエツチング法
により所定の厚さに減少させる。その後金を例えば5o
ooX程度の厚さ≦:蒸着し、密着性を良好々らしめる
ため380〜400℃に加熱し、金とシリコンをなじ1
せて構成させる。
あるいは、この金蒸着の代りにTi 、 Pt 、 A
uの順序で厚さをそれぞれ500〜] tl 0 OA
、蒸着又はスパッタ法によシ被着することができる。
一方JWさ02〜0.6 wmのベリリア基板の両面を
例えばモリブデンによりメタライズし、その表面を金メ
ツキ仕上げしたものを準備する。次いで前記半導体ウェ
ーハの背面側全準備しておいfこベリリア基板に張り合
ぜ接着する。この接着は半[コ」、Au−8n合金、A
u −Ge合金又はAu−3i 合金等の比較的低融点
(400℃以下)のロー材を用いて、半導体ウェーハと
ベリリア基板との両面から均等に加圧しながら加熱し、
両者間にはさんだロー材を耐融させて接着する。この加
圧を一定時間保持して冷却し接着を完了させる。
以上のような接着工程を真空中で行なうことにより、気
泡の残留が減少し良好な接着が得られる。
得られた半導体ウェーハ13とベリリア基板15との二
層構造体をダイシングソーを使用して格子状に切断する
ことによジ、背面にべ111J了基板を有するトランジ
スタチップを作製することができる(第2図径照)。こ
こで半導体A1113は30〜150μの範囲にあり、
ロー材による持・着1藉14は20〜40μの範囲にあ
り、メタライズ1916を含めたチップ全体の厚さ鉱0
25〜0.7門の範囲にある。着た前記メタライズ層は
高融点金属、汐11えばW、MO等、で構成される。
前記ベリリア基板を有するトランジスタチップ21は第
3図「二足されるようなパッケージ内に先に使用したロ
ー材よVも低融点のロー材または接着用ペースト’l使
用して固着載置される。エミッタ、ベース、コレクタ等
に対して必要なワイヤボンディングを行なった後、これ
らはキャップ封止され、トランジスタ装置として完成さ
れる。ワイヤはAu又はAt製のもので直径10〜15
μのものである。
次いで本発明と従来例との比較を行なう。
従来例をW1図に示すが、本発明の方法によれば従来の
場合に比べて使用されるべIJ IJアの容積が格段に
少なく低コストであるばかりでなく、従来よくベリリア
基板に発生していたクラックも皆無となるメリットも生
じた。従来は大きな面積のベリIJア基板金熱膨張係数
の格段に大きな銅製の放熱ベースの上に銀ロー材してい
1こため、その熱膨張応力によりクラックが発生するな
ど信頼性の上で問題があった。ここで銀o−+Jは商品
名BAG−8のCu−Ag自金でm、 p、 B O0
℃のものを使用した。しかしながらこの点はべりリア基
板の寸法が小さく八つたために改善され/rn’*lこ
同時にベリリア基板の厚さも湖〈1−ることがてきるの
で、トランジスタ装置の熱抵抗も改@′□g−ることか
できた。
発明の効果 本発明(二よればパッケージ内ニはべりリア基板を使用
せず、トランジスタチップの背向に接着し7ζベリリア
片はパッケージにべIJ リア基板74 bi用した場
合より体積的に格段に少なり一〇よく、コスト的に安く
なる。さC)にトランジスタチップフの背IH」にはべ
りリア片が接着されているので、接着されていない場合
に比べて厚みかJf動uL、チップのハンドリングが界
易になるとい5メリツトがある。
【図面の簡単な説明】
第1図は従来の半導体装置の断面図であり、第2図は本
発明のベリリア基板付きトランジスタチップの断面図で
あり、 第3図は本発明のベリリア基板付きトランジスタチップ
を組込んだパッケージの断面図である。 ト・・・・・セラミックキャップ、2・・・・・・接着
用樹脂、3・・・・ベースリード、4・・・・・・内部
同調用MO8型キャパシタ、5・・・・・・トランジス
タチップ、6・・・・・・エミッタワイヤボンディング
用ブリッヂ、7・・・・・・ワイヤ、8・・・・・・コ
レクタリード、9・・・・・銀ローイ」、1()・・・
・・・べIJ IJア基板、11・・・・・・放熱ベー
ス(Cu)エミッタ、12・・・・・・トランジスタパ
ターン形成面、13・・・・・・半導体層、14・・・
・・・ロー材接着9.15・・・・・・ベリリア基板層
、16・・・・・・メタライズ層、17・・・・・・セ
ラミックキャップ、18・・・・・・接着用樹脂、19
・・・・・・ベースリード、20・・・・・・内部同調
用MO8型キャパシタ、21・・・・・・ベリリア基板
付トランジスタチップ、22・・・・・・コレクタリー
ド、23・・・・・・銀ロー材、24・・・・・・ワイ
ヤ、25・・・・・・セラミック(アルミナ)、26・
・・・・・放熱ベースエミッタ(Cu)。 第1図 第2図 2

Claims (1)

    【特許請求の範囲】
  1. 一つの主表面上(二所定の機能が作り込゛まれ九半導体
    ウェーハのもう一つの主表面をメタライズし、このウェ
    ーハをメタライズされたベリリア薄板上に低融点ロー材
    によって接眉張り合せ、これ全格子状に切断しtなる牛
    導体装置ベレyトを半導体収容パッケージ又はハイブリ
    ッド集yt装置の放熱もしくは接地用金属基台上に固着
    滅ばせしめた半導体装置。
JP58176921A 1983-09-27 1983-09-27 半導体装置 Pending JPS6070734A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58176921A JPS6070734A (ja) 1983-09-27 1983-09-27 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58176921A JPS6070734A (ja) 1983-09-27 1983-09-27 半導体装置

Publications (1)

Publication Number Publication Date
JPS6070734A true JPS6070734A (ja) 1985-04-22

Family

ID=16022088

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58176921A Pending JPS6070734A (ja) 1983-09-27 1983-09-27 半導体装置

Country Status (1)

Country Link
JP (1) JPS6070734A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114401933A (zh) * 2019-08-15 2022-04-26 万腾荣公司 氧化铍基座

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114401933A (zh) * 2019-08-15 2022-04-26 万腾荣公司 氧化铍基座
CN114401933B (zh) * 2019-08-15 2023-11-24 万腾荣公司 氧化铍基座

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