JPS60641U - DMA monitor control circuit - Google Patents
DMA monitor control circuitInfo
- Publication number
- JPS60641U JPS60641U JP9103683U JP9103683U JPS60641U JP S60641 U JPS60641 U JP S60641U JP 9103683 U JP9103683 U JP 9103683U JP 9103683 U JP9103683 U JP 9103683U JP S60641 U JPS60641 U JP S60641U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- tri
- setting
- state buffer
- timing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Debugging And Monitoring (AREA)
- Bus Control (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は実施例にかかる全体のシステムブロック図、第
２図はチャンネルメモリにおけるアドレスデータの格納
状態を示す図、第３図はアドレスデータのタイミングチ
ャート図である。
１・・・・・・ＤＭＡモニタ制御回路、２・・・・・・
タイミングジェネレータ、３・・・・・・チャンネルメ
モリ、４−１．４−２．４−３・・・・・・トライステ
ートバッファ、５・・・・・・入出力部、６・・・・・
・Ｄ／Ａコンバータ。FIG. 1 is a block diagram of the entire system according to the embodiment, FIG. 2 is a diagram showing a storage state of address data in a channel memory, and FIG. 3 is a timing chart of address data. 1...DMA monitor control circuit, 2...
Timing generator, 3... Channel memory, 4-1.4-2.4-3... Tri-state buffer, 5... Input/output section, 6...・
・D/A converter.
Claims (1)
イミングジェネレータと、チャンネル情報を格納し、タ
イミングジェネレータからのタイミング信号に応じてチ
ャンネル情報に基づいたアドレス選択情報を出力するチ
ャンネルメモリと、チャンネルメモリにデータバスを介
して接続されたタイミング信号設定用トライステートバ
ッファとモニタアドレス設定用トライステートバッファ
と、上記アドレス設定用トライステートバッファの信号
とタイミングジェネレータの信号に応じて外部データを
入力する入出力部と、入出力部から出力されたデータを
モニタアドレス設定用トライステートバッファの出力信
号に応じて所定のアドレスに受入れ、当該ディジタル信
号をアナログ信号に変換して各種モニタ用機器に出力す
るディジタル・アナログ変換器とを備え、外部データを
リアルタイムでモニタ出力するようにしたことをＤＭＡ
モニタ制御回路。A timing generator that generates various timing signals at predetermined timings, a channel memory that stores channel information and outputs address selection information based on the channel information in response to the timing signal from the timing generator, and a data bus in the channel memory. a tri-state buffer for setting a timing signal and a tri-state buffer for setting a monitor address, which are connected via a tri-state buffer for setting a timing signal, and an input/output section that inputs external data in accordance with the signal of the tri-state buffer for setting the address and the signal of the timing generator; A digital-to-analog converter that accepts data output from the input/output section at a predetermined address according to the output signal of the monitor address setting tri-state buffer, converts the digital signal into an analog signal, and outputs the analog signal to various monitoring devices. DMA is equipped with a DMA system that monitors and outputs external data in real time.
Monitor control circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9103683U JPS60641U (en) | 1983-06-13 | 1983-06-13 | DMA monitor control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9103683U JPS60641U (en) | 1983-06-13 | 1983-06-13 | DMA monitor control circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60641U true JPS60641U (en) | 1985-01-07 |
| JPS6324507Y2 JPS6324507Y2 (en) | 1988-07-05 |
Family
ID=30221007
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9103683U Granted JPS60641U (en) | 1983-06-13 | 1983-06-13 | DMA monitor control circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60641U (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5136841A (en) * | 1974-09-17 | 1976-03-27 | Nippon Electric Co | |
| JPS54130849A (en) * | 1978-04-03 | 1979-10-11 | Nissan Motor | Data bus monitor |
| JPS55119720A (en) * | 1979-03-09 | 1980-09-13 | Tokyo Electric Power Co Inc:The | Operation processing unit |
-
1983
- 1983-06-13 JP JP9103683U patent/JPS60641U/en active Granted
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5136841A (en) * | 1974-09-17 | 1976-03-27 | Nippon Electric Co | |
| JPS54130849A (en) * | 1978-04-03 | 1979-10-11 | Nissan Motor | Data bus monitor |
| JPS55119720A (en) * | 1979-03-09 | 1980-09-13 | Tokyo Electric Power Co Inc:The | Operation processing unit |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6324507Y2 (en) | 1988-07-05 |
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